Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 44739981 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 42532811 1 T1 84853 T2 17251 T3 19294



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 41433529 1 T1 83499 T2 19345 T3 21756
values[0x0] 21468981 1 T1 43030 T2 8880 T3 9655
values[0x1] 24370282 1 T1 48041 T2 10232 T3 11844



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34418884 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 52853908 1 T1 105200 T2 22088 T3 24881



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2264960 1 T1 691 T2 159 T3 161
valid_sources[0x01] 271702 1 T1 663 T2 142 T3 268
valid_sources[0x02] 266682 1 T1 737 T2 171 T3 152
valid_sources[0x03] 268064 1 T1 683 T2 161 T3 225
valid_sources[0x04] 278787 1 T1 705 T2 153 T3 99
valid_sources[0x05] 278029 1 T1 647 T2 149 T3 135
valid_sources[0x06] 274189 1 T1 729 T2 150 T3 105
valid_sources[0x07] 1014544 1 T1 689 T2 153 T3 100
valid_sources[0x08] 269569 1 T1 705 T2 162 T3 245
valid_sources[0x09] 280248 1 T1 715 T2 151 T3 179
valid_sources[0x0a] 2185675 1 T1 673 T2 139 T3 157
valid_sources[0x0b] 281513 1 T1 599 T2 143 T3 103
valid_sources[0x0c] 271238 1 T1 683 T2 136 T3 122
valid_sources[0x0d] 610820 1 T1 653 T2 151 T3 291
valid_sources[0x0e] 272257 1 T1 754 T2 160 T3 177
valid_sources[0x0f] 268540 1 T1 684 T2 123 T3 176
valid_sources[0x10] 875086 1 T1 719 T2 168 T3 168
valid_sources[0x11] 291599 1 T1 703 T2 166 T3 155
valid_sources[0x12] 498503 1 T1 707 T2 148 T3 100
valid_sources[0x13] 276423 1 T1 650 T2 131 T3 63
valid_sources[0x14] 1400252 1 T1 728 T2 174 T3 211
valid_sources[0x15] 331670 1 T1 708 T2 181 T3 90
valid_sources[0x16] 277606 1 T1 622 T2 153 T3 75
valid_sources[0x17] 315337 1 T1 673 T2 152 T3 197
valid_sources[0x18] 318969 1 T1 659 T2 184 T3 176
valid_sources[0x19] 470373 1 T1 667 T2 141 T3 185
valid_sources[0x1a] 279076 1 T1 722 T2 149 T3 158
valid_sources[0x1b] 1211351 1 T1 671 T2 186 T3 65
valid_sources[0x1c] 277208 1 T1 709 T2 150 T3 41
valid_sources[0x1d] 269730 1 T1 730 T2 137 T3 96
valid_sources[0x1e] 267951 1 T1 667 T2 170 T3 124
valid_sources[0x1f] 269452 1 T1 732 T2 185 T3 244
valid_sources[0x20] 271224 1 T1 696 T2 136 T3 98
valid_sources[0x21] 389168 1 T1 662 T2 161 T3 243
valid_sources[0x22] 645166 1 T1 748 T2 139 T3 309
valid_sources[0x23] 264825 1 T1 684 T2 151 T3 163
valid_sources[0x24] 274860 1 T1 696 T2 179 T3 180
valid_sources[0x25] 269196 1 T1 708 T2 152 T3 112
valid_sources[0x26] 286381 1 T1 671 T2 164 T3 75
valid_sources[0x27] 271963 1 T1 684 T2 123 T3 201
valid_sources[0x28] 266061 1 T1 676 T2 133 T3 101
valid_sources[0x29] 346108 1 T1 647 T2 122 T3 32
valid_sources[0x2a] 271128 1 T1 714 T2 168 T3 226
valid_sources[0x2b] 273701 1 T1 700 T2 130 T3 99
valid_sources[0x2c] 373414 1 T1 643 T2 169 T3 111
valid_sources[0x2d] 284761 1 T1 702 T2 145 T3 118
valid_sources[0x2e] 282797 1 T1 704 T2 191 T3 190
valid_sources[0x2f] 267338 1 T1 749 T2 138 T3 181
valid_sources[0x30] 276230 1 T1 630 T2 155 T3 224
valid_sources[0x31] 350769 1 T1 663 T2 130 T3 197
valid_sources[0x32] 268670 1 T1 665 T2 143 T3 62
valid_sources[0x33] 685155 1 T1 664 T2 125 T3 186
valid_sources[0x34] 266989 1 T1 702 T2 180 T3 67
valid_sources[0x35] 322945 1 T1 704 T2 144 T3 49
valid_sources[0x36] 281114 1 T1 706 T2 153 T3 135
valid_sources[0x37] 956587 1 T1 674 T2 157 T3 298
valid_sources[0x38] 333961 1 T1 734 T2 145 T3 108
valid_sources[0x39] 383396 1 T1 679 T2 166 T3 229
valid_sources[0x3a] 275706 1 T1 642 T2 159 T3 244
valid_sources[0x3b] 281568 1 T1 738 T2 172 T3 92
valid_sources[0x3c] 277870 1 T1 652 T2 140 T3 280
valid_sources[0x3d] 320117 1 T1 672 T2 181 T3 132
valid_sources[0x3e] 358706 1 T1 683 T2 156 T3 142
valid_sources[0x3f] 274347 1 T1 662 T2 133 T3 166
valid_sources[0x40] 295732 1 T1 648 T2 161 T3 303
valid_sources[0x41] 277989 1 T1 633 T2 167 T3 319
valid_sources[0x42] 358008 1 T1 700 T2 175 T3 43
valid_sources[0x43] 274421 1 T1 670 T2 157 T3 173
valid_sources[0x44] 273502 1 T1 696 T2 148 T3 28
valid_sources[0x45] 499724 1 T1 733 T2 170 T3 157
valid_sources[0x46] 275892 1 T1 672 T2 157 T3 82
valid_sources[0x47] 270507 1 T1 574 T2 126 T3 195
valid_sources[0x48] 271668 1 T1 685 T2 134 T3 139
valid_sources[0x49] 273394 1 T1 654 T2 144 T3 94
valid_sources[0x4a] 307194 1 T1 677 T2 111 T3 178
valid_sources[0x4b] 281940 1 T1 720 T2 159 T3 139
valid_sources[0x4c] 317299 1 T1 651 T2 143 T3 132
valid_sources[0x4d] 390952 1 T1 705 T2 146 T3 214
valid_sources[0x4e] 281924 1 T1 690 T2 130 T3 140
valid_sources[0x4f] 323924 1 T1 664 T2 159 T3 148
valid_sources[0x50] 271396 1 T1 696 T2 168 T3 240
valid_sources[0x51] 269977 1 T1 680 T2 139 T3 171
valid_sources[0x52] 282135 1 T1 656 T2 162 T3 76
valid_sources[0x53] 1418261 1 T1 671 T2 145 T3 173
valid_sources[0x54] 270342 1 T1 696 T2 160 T3 180
valid_sources[0x55] 272645 1 T1 722 T2 150 T3 233
valid_sources[0x56] 414124 1 T1 663 T2 145 T3 91
valid_sources[0x57] 278026 1 T1 679 T2 139 T3 144
valid_sources[0x58] 280046 1 T1 689 T2 135 T3 159
valid_sources[0x59] 274395 1 T1 643 T2 157 T3 140
valid_sources[0x5a] 288559 1 T1 696 T2 148 T3 54
valid_sources[0x5b] 281266 1 T1 731 T2 165 T3 269
valid_sources[0x5c] 276679 1 T1 666 T2 149 T3 63
valid_sources[0x5d] 266673 1 T1 660 T2 172 T3 126
valid_sources[0x5e] 278567 1 T1 694 T2 146 T3 80
valid_sources[0x5f] 264730 1 T1 722 T2 160 T3 147
valid_sources[0x60] 275796 1 T1 706 T2 139 T3 396
valid_sources[0x61] 276532 1 T1 678 T2 134 T3 305
valid_sources[0x62] 268383 1 T1 758 T2 137 T3 262
valid_sources[0x63] 283103 1 T1 678 T2 136 T3 429
valid_sources[0x64] 331881 1 T1 617 T2 162 T3 186
valid_sources[0x65] 277598 1 T1 639 T2 131 T3 215
valid_sources[0x66] 264829 1 T1 647 T2 164 T3 347
valid_sources[0x67] 370453 1 T1 650 T2 149 T3 256
valid_sources[0x68] 292606 1 T1 670 T2 139 T3 198
valid_sources[0x69] 268078 1 T1 676 T2 141 T3 232
valid_sources[0x6a] 301891 1 T1 670 T2 142 T3 153
valid_sources[0x6b] 264613 1 T1 708 T2 136 T3 170
valid_sources[0x6c] 275906 1 T1 709 T2 159 T3 126
valid_sources[0x6d] 375440 1 T1 720 T2 144 T3 51
valid_sources[0x6e] 346701 1 T1 689 T2 157 T3 126
valid_sources[0x6f] 395234 1 T1 679 T2 132 T3 139
valid_sources[0x70] 344038 1 T1 670 T2 163 T3 117
valid_sources[0x71] 263918 1 T1 699 T2 155 T3 91
valid_sources[0x72] 292525 1 T1 646 T2 154 T3 164
valid_sources[0x73] 266735 1 T1 664 T2 158 T3 250
valid_sources[0x74] 275046 1 T1 714 T2 167 T3 188
valid_sources[0x75] 273235 1 T1 698 T2 147 T3 212
valid_sources[0x76] 287745 1 T1 727 T2 145 T3 292
valid_sources[0x77] 284917 1 T1 685 T2 146 T3 115
valid_sources[0x78] 276002 1 T1 690 T2 158 T3 194
valid_sources[0x79] 344636 1 T1 649 T2 158 T3 178
valid_sources[0x7a] 328026 1 T1 636 T2 148 T3 51
valid_sources[0x7b] 272933 1 T1 669 T2 128 T3 115
valid_sources[0x7c] 265837 1 T1 690 T2 178 T3 210
valid_sources[0x7d] 275625 1 T1 677 T2 153 T3 101
valid_sources[0x7e] 275352 1 T1 637 T2 156 T3 119
valid_sources[0x7f] 288465 1 T1 663 T2 138 T3 251
valid_sources[0x80] 285139 1 T1 687 T2 147 T3 134



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20537581 1 T1 41695 T2 9655 T3 10800
values[0x0] all_enables biggest_size 11847026 1 T1 23268 T2 4197 T3 4636
values[0x1] all_enables biggest_size 10148204 1 T1 19890 T2 3399 T3 3858

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%