Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44919956	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

42577920

1

T1

8143

T2

2

T3

584

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	41617240	1			T1	6448		T2	1		T3	589
values[0x0]	21475247	1			T1	3451		T2	6		T3	271
values[0x1]	24405389	1			T1	3487		T2	9		T3	316

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34540200	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52957676

1

T1

9544

T2

4

T3

712

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	262832	1			T1	50		T4	168		T6	325
valid_sources[0x01]	272919	1			T1	56		T4	191		T6	202
valid_sources[0x02]	294237	1			T1	63		T4	148		T6	149
valid_sources[0x03]	267834	1			T1	57		T4	173		T6	52
valid_sources[0x04]	262501	1			T1	45		T4	142		T6	134
valid_sources[0x05]	311601	1			T1	43		T4	179		T6	60
valid_sources[0x06]	264430	1			T1	55		T4	157		T6	290
valid_sources[0x07]	604244	1			T1	40		T4	152		T6	195
valid_sources[0x08]	267328	1			T1	55		T4	170		T6	108
valid_sources[0x09]	262403	1			T1	43		T4	146		T6	128
valid_sources[0x0a]	261753	1			T1	57		T4	164		T6	232
valid_sources[0x0b]	265535	1			T1	46		T4	166		T6	146
valid_sources[0x0c]	264380	1			T1	53		T4	163		T6	110
valid_sources[0x0d]	262291	1			T1	59		T4	134		T6	235
valid_sources[0x0e]	267475	1			T1	55		T4	143		T6	86
valid_sources[0x0f]	393299	1			T1	48		T4	149		T6	106
valid_sources[0x10]	260100	1			T1	39		T4	187		T6	100
valid_sources[0x11]	265037	1			T1	61		T4	138		T6	213
valid_sources[0x12]	263899	1			T1	45		T4	152		T6	140
valid_sources[0x13]	265267	1			T1	55		T4	161		T6	272
valid_sources[0x14]	266031	1			T1	42		T4	153		T6	162
valid_sources[0x15]	263693	1			T1	66		T4	175		T6	207
valid_sources[0x16]	264659	1			T1	55		T4	137		T6	93
valid_sources[0x17]	321081	1			T1	46		T4	186		T6	119
valid_sources[0x18]	265781	1			T1	51		T4	162		T6	149
valid_sources[0x19]	265804	1			T1	52		T4	161		T6	131
valid_sources[0x1a]	263503	1			T1	42		T4	167		T6	74
valid_sources[0x1b]	262919	1			T1	42		T4	147		T6	216
valid_sources[0x1c]	263401	1			T1	39		T4	158		T6	248
valid_sources[0x1d]	573000	1			T1	49		T4	161		T6	269
valid_sources[0x1e]	392084	1			T1	54		T4	126		T6	166
valid_sources[0x1f]	371426	1			T1	64		T4	147		T6	213
valid_sources[0x20]	263496	1			T1	51		T4	173		T6	95
valid_sources[0x21]	264018	1			T1	51		T4	167		T6	47
valid_sources[0x22]	260547	1			T1	54		T4	131		T6	132
valid_sources[0x23]	264075	1			T1	42		T4	133		T6	181
valid_sources[0x24]	294228	1			T1	51		T4	137		T6	137
valid_sources[0x25]	265266	1			T1	52		T4	158		T6	244
valid_sources[0x26]	261093	1			T1	44		T4	156		T6	138
valid_sources[0x27]	263347	1			T1	62		T4	155		T6	222
valid_sources[0x28]	262016	1			T1	53		T4	161		T6	120
valid_sources[0x29]	263266	1			T1	44		T4	166		T6	159
valid_sources[0x2a]	292397	1			T1	42		T4	150		T6	187
valid_sources[0x2b]	289447	1			T1	60		T4	137		T6	155
valid_sources[0x2c]	262457	1			T1	41		T4	119		T6	57
valid_sources[0x2d]	548632	1			T1	66		T4	120		T6	200
valid_sources[0x2e]	779619	1			T1	53		T4	175		T6	138
valid_sources[0x2f]	265596	1			T1	44		T4	171		T6	243
valid_sources[0x30]	259640	1			T1	47		T4	132		T6	183
valid_sources[0x31]	544128	1			T1	56		T4	172		T6	156
valid_sources[0x32]	327534	1			T1	50		T4	145		T6	148
valid_sources[0x33]	346453	1			T1	60		T4	154		T6	134
valid_sources[0x34]	262705	1			T1	58		T4	138		T6	313
valid_sources[0x35]	265244	1			T1	51		T4	160		T6	214
valid_sources[0x36]	364314	1			T1	61		T4	167		T6	138
valid_sources[0x37]	266049	1			T1	42		T4	187		T6	154
valid_sources[0x38]	268599	1			T1	65		T4	158		T6	241
valid_sources[0x39]	268799	1			T1	49		T4	159		T6	185
valid_sources[0x3a]	596476	1			T1	58		T4	175		T6	339
valid_sources[0x3b]	262877	1			T1	67		T4	159		T6	231
valid_sources[0x3c]	265660	1			T1	60		T4	165		T6	119
valid_sources[0x3d]	291905	1			T1	52		T4	158		T6	161
valid_sources[0x3e]	266544	1			T1	55		T4	145		T6	144
valid_sources[0x3f]	996156	1			T1	54		T4	148		T6	181
valid_sources[0x40]	259376	1			T1	32		T4	142		T6	269
valid_sources[0x41]	262932	1			T1	45		T4	154		T6	250
valid_sources[0x42]	266193	1			T1	57		T4	196		T6	32
valid_sources[0x43]	267856	1			T1	49		T4	154		T6	152
valid_sources[0x44]	265700	1			T1	58		T4	154		T6	69
valid_sources[0x45]	263927	1			T1	40		T4	164		T6	95
valid_sources[0x46]	397632	1			T1	39		T4	160		T6	208
valid_sources[0x47]	261456	1			T1	55		T4	161		T6	109
valid_sources[0x48]	265694	1			T1	46		T4	153		T6	159
valid_sources[0x49]	262393	1			T1	59		T4	158		T6	67
valid_sources[0x4a]	273628	1			T1	49		T4	166		T6	103
valid_sources[0x4b]	292351	1			T1	48		T4	152		T6	193
valid_sources[0x4c]	264318	1			T1	66		T4	134		T6	105
valid_sources[0x4d]	262310	1			T1	44		T4	146		T6	96
valid_sources[0x4e]	264919	1			T1	53		T4	147		T6	122
valid_sources[0x4f]	267875	1			T1	49		T4	170		T6	231
valid_sources[0x50]	270518	1			T1	52		T4	147		T6	215
valid_sources[0x51]	324892	1			T1	48		T4	150		T6	137
valid_sources[0x52]	261960	1			T1	60		T4	150		T15	16
valid_sources[0x53]	330373	1			T1	59		T4	131		T6	241
valid_sources[0x54]	261116	1			T1	41		T4	149		T6	273
valid_sources[0x55]	265395	1			T1	53		T4	162		T6	132
valid_sources[0x56]	262763	1			T1	52		T4	153		T6	178
valid_sources[0x57]	262749	1			T1	52		T4	162		T6	293
valid_sources[0x58]	475685	1			T1	48		T4	166		T6	178
valid_sources[0x59]	442846	1			T1	72		T4	157		T6	96
valid_sources[0x5a]	289342	1			T1	62		T4	179		T6	120
valid_sources[0x5b]	325505	1			T1	54		T4	160		T6	223
valid_sources[0x5c]	267253	1			T1	40		T4	161		T6	183
valid_sources[0x5d]	263967	1			T1	51		T4	135		T6	197
valid_sources[0x5e]	267976	1			T1	57		T4	136		T6	99
valid_sources[0x5f]	265505	1			T1	48		T4	165		T6	129
valid_sources[0x60]	264620	1			T1	52		T4	147		T6	302
valid_sources[0x61]	260030	1			T1	49		T4	123		T6	192
valid_sources[0x62]	423404	1			T1	60		T4	159		T6	197
valid_sources[0x63]	261900	1			T1	56		T2	16		T4	167
valid_sources[0x64]	307435	1			T1	62		T4	139		T6	169
valid_sources[0x65]	263571	1			T1	66		T4	165		T6	272
valid_sources[0x66]	262832	1			T1	57		T4	162		T6	246
valid_sources[0x67]	263605	1			T1	72		T4	147		T6	183
valid_sources[0x68]	263444	1			T1	61		T4	174		T6	194
valid_sources[0x69]	262441	1			T1	38		T4	160		T6	156
valid_sources[0x6a]	263124	1			T1	54		T4	135		T6	124
valid_sources[0x6b]	363917	1			T1	70		T4	146		T6	102
valid_sources[0x6c]	264150	1			T1	43		T4	141		T6	158
valid_sources[0x6d]	270075	1			T1	51		T4	152		T6	38
valid_sources[0x6e]	265832	1			T1	44		T4	164		T6	226
valid_sources[0x6f]	272767	1			T1	64		T4	141		T6	178
valid_sources[0x70]	313975	1			T1	51		T4	183		T6	242
valid_sources[0x71]	265628	1			T1	60		T4	142		T6	92
valid_sources[0x72]	261189	1			T1	62		T4	164		T6	105
valid_sources[0x73]	263872	1			T1	38		T4	170		T6	352
valid_sources[0x74]	263971	1			T1	57		T4	151		T6	244
valid_sources[0x75]	264335	1			T1	48		T4	150		T6	183
valid_sources[0x76]	265879	1			T1	43		T4	155		T6	122
valid_sources[0x77]	309317	1			T1	51		T4	149		T6	175
valid_sources[0x78]	264234	1			T1	45		T4	176		T6	285
valid_sources[0x79]	269592	1			T1	52		T4	164		T6	138
valid_sources[0x7a]	283626	1			T1	50		T4	140		T6	295
valid_sources[0x7b]	263438	1			T1	45		T4	151		T6	102
valid_sources[0x7c]	258505	1			T1	64		T4	152		T6	240
valid_sources[0x7d]	267063	1			T1	46		T4	136		T6	234
valid_sources[0x7e]	397024	1			T1	57		T4	179		T6	97
valid_sources[0x7f]	262718	1			T1	48		T4	156		T6	119
valid_sources[0x80]	299760	1			T1	45		T4	156		T6	142

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

20573395

1

T1

2465

T2

1

T3

286

values[0x0]

all_enables

biggest_size

11845209

1

T1

2918

T2

1

T3

148

values[0x1]

all_enables

biggest_size

10159316

1

T1

2760

T3

150

T4

3396