Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 39289727 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 37971169 1 T1 424645 T2 2009 T3 41537



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 36486819 1 T1 440379 T2 824 T3 39273
values[0x0] 19122727 1 T1 213618 T2 918 T3 17898
values[0x1] 21651350 1 T1 244222 T2 963 T3 19266



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 30231439 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 47029457 1 T1 534425 T2 2204 T3 49646



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 229067 1 T1 3352 T3 304 T17 66
valid_sources[0x01] 560701 1 T1 3496 T3 342 T6 13
valid_sources[0x02] 226935 1 T1 3507 T3 214 T6 4
valid_sources[0x03] 227613 1 T1 3722 T3 504 T6 5
valid_sources[0x04] 229906 1 T1 3428 T3 276 T17 19
valid_sources[0x05] 225428 1 T1 3441 T3 371 T6 8
valid_sources[0x06] 599542 1 T1 3625 T3 336 T6 12
valid_sources[0x07] 225181 1 T1 3595 T3 332 T6 8
valid_sources[0x08] 247290 1 T1 3470 T3 236 T6 1
valid_sources[0x09] 226209 1 T1 3210 T3 195 T6 27
valid_sources[0x0a] 224949 1 T1 3559 T3 355 T6 1
valid_sources[0x0b] 226624 1 T1 3288 T3 268 T17 58
valid_sources[0x0c] 226331 1 T1 3372 T3 257 T6 1
valid_sources[0x0d] 229923 1 T1 3509 T3 274 T17 26
valid_sources[0x0e] 224648 1 T1 3473 T3 307 T17 9
valid_sources[0x0f] 227402 1 T1 3488 T3 356 T17 65
valid_sources[0x10] 227841 1 T1 3400 T3 198 T17 54
valid_sources[0x11] 281874 1 T1 3594 T3 245 T17 75
valid_sources[0x12] 248373 1 T1 3797 T3 315 T17 58
valid_sources[0x13] 1167171 1 T1 3535 T3 246 T17 34
valid_sources[0x14] 227926 1 T1 3468 T3 250 T17 12
valid_sources[0x15] 229097 1 T1 3391 T3 329 T6 10
valid_sources[0x16] 252637 1 T1 3495 T3 201 T17 14
valid_sources[0x17] 245427 1 T1 3374 T3 277 T17 28
valid_sources[0x18] 225633 1 T1 3558 T3 347 T6 25
valid_sources[0x19] 349268 1 T1 3550 T3 176 T17 100
valid_sources[0x1a] 223299 1 T1 3378 T3 369 T6 6
valid_sources[0x1b] 228714 1 T1 3478 T3 365 T6 13
valid_sources[0x1c] 226611 1 T1 3517 T3 387 T17 35
valid_sources[0x1d] 324261 1 T1 3708 T3 349 T17 62
valid_sources[0x1e] 225603 1 T1 3480 T3 306 T6 4
valid_sources[0x1f] 225418 1 T1 3459 T3 352 T6 3
valid_sources[0x20] 227256 1 T1 3696 T3 281 T17 30
valid_sources[0x21] 440284 1 T1 3425 T3 430 T17 42
valid_sources[0x22] 225692 1 T1 3527 T3 356 T6 9
valid_sources[0x23] 253203 1 T1 3531 T3 227 T17 15
valid_sources[0x24] 223861 1 T1 3414 T3 390 T17 28
valid_sources[0x25] 225033 1 T1 3503 T3 205 T17 40
valid_sources[0x26] 234764 1 T1 3345 T3 262 T17 36
valid_sources[0x27] 226893 1 T1 3393 T3 280 T17 46
valid_sources[0x28] 291818 1 T1 3548 T3 203 T17 47
valid_sources[0x29] 226198 1 T1 3658 T3 190 T6 18
valid_sources[0x2a] 249196 1 T1 3622 T3 328 T4 1
valid_sources[0x2b] 333967 1 T1 3406 T3 309 T17 50
valid_sources[0x2c] 225784 1 T1 3457 T3 343 T17 73
valid_sources[0x2d] 229735 1 T1 3360 T3 272 T17 88
valid_sources[0x2e] 273627 1 T1 3465 T3 244 T17 32
valid_sources[0x2f] 226047 1 T1 3370 T3 212 T17 33
valid_sources[0x30] 228337 1 T1 3793 T3 283 T6 2
valid_sources[0x31] 229206 1 T1 3581 T3 315 T17 97
valid_sources[0x32] 266045 1 T1 3390 T3 264 T17 15
valid_sources[0x33] 226843 1 T1 3608 T3 305 T17 50
valid_sources[0x34] 226946 1 T1 3502 T3 219 T6 4
valid_sources[0x35] 240556 1 T1 3606 T3 328 T17 65
valid_sources[0x36] 223345 1 T1 3658 T3 149 T16 1
valid_sources[0x37] 223840 1 T1 3368 T3 172 T17 20
valid_sources[0x38] 2177532 1 T1 3624 T3 305 T6 6
valid_sources[0x39] 226493 1 T1 3552 T3 371 T6 6
valid_sources[0x3a] 228037 1 T1 3486 T3 252 T17 33
valid_sources[0x3b] 778223 1 T1 3570 T3 318 T17 76
valid_sources[0x3c] 225821 1 T1 3592 T3 240 T17 28
valid_sources[0x3d] 470899 1 T1 3691 T3 340 T17 45
valid_sources[0x3e] 227777 1 T1 3468 T3 343 T6 4
valid_sources[0x3f] 324541 1 T1 3490 T3 258 T17 56
valid_sources[0x40] 230669 1 T1 3438 T3 340 T17 19
valid_sources[0x41] 225021 1 T1 3410 T3 393 T17 12
valid_sources[0x42] 315923 1 T1 3350 T3 298 T17 66
valid_sources[0x43] 366158 1 T1 3682 T3 283 T17 21
valid_sources[0x44] 234612 1 T1 3546 T3 295 T6 5
valid_sources[0x45] 266689 1 T1 3629 T3 350 T17 24
valid_sources[0x46] 330045 1 T1 3583 T3 431 T17 14
valid_sources[0x47] 308394 1 T1 3533 T3 290 T4 1
valid_sources[0x48] 230143 1 T1 3619 T3 533 T17 23
valid_sources[0x49] 240043 1 T1 3447 T3 260 T17 36
valid_sources[0x4a] 722793 1 T1 3579 T3 197 T17 53
valid_sources[0x4b] 313789 1 T1 3614 T3 382 T6 7
valid_sources[0x4c] 229299 1 T1 3388 T3 268 T17 33
valid_sources[0x4d] 230237 1 T1 3585 T3 119 T6 19
valid_sources[0x4e] 226788 1 T1 3433 T3 327 T17 18
valid_sources[0x4f] 227227 1 T1 3695 T3 166 T17 35
valid_sources[0x50] 226773 1 T1 3459 T3 432 T17 10
valid_sources[0x51] 224818 1 T1 3611 T3 309 T17 12
valid_sources[0x52] 236851 1 T1 3436 T3 346 T6 7
valid_sources[0x53] 1287940 1 T1 3530 T3 294 T6 10
valid_sources[0x54] 233123 1 T1 3606 T3 243 T17 19
valid_sources[0x55] 226998 1 T1 3610 T3 352 T6 69
valid_sources[0x56] 227368 1 T1 3623 T3 251 T6 33
valid_sources[0x57] 226167 1 T1 3452 T3 545 T17 48
valid_sources[0x58] 224918 1 T1 3367 T3 367 T17 31
valid_sources[0x59] 240506 1 T1 3375 T3 545 T6 6
valid_sources[0x5a] 227111 1 T1 3655 T3 237 T6 1
valid_sources[0x5b] 224078 1 T1 3470 T3 283 T17 49
valid_sources[0x5c] 226540 1 T1 3543 T3 205 T6 7
valid_sources[0x5d] 2215527 1 T1 3630 T3 354 T6 12
valid_sources[0x5e] 286964 1 T1 3454 T3 210 T17 12
valid_sources[0x5f] 228221 1 T1 3405 T3 277 T6 7
valid_sources[0x60] 225805 1 T1 3297 T3 242 T6 4
valid_sources[0x61] 359429 1 T1 3525 T3 501 T17 73
valid_sources[0x62] 228863 1 T1 3703 T3 273 T17 42
valid_sources[0x63] 226588 1 T1 3618 T3 476 T17 37
valid_sources[0x64] 224517 1 T1 3475 T3 335 T17 49
valid_sources[0x65] 229140 1 T1 3404 T3 372 T17 68
valid_sources[0x66] 253077 1 T1 3582 T3 291 T17 7
valid_sources[0x67] 226650 1 T1 3482 T3 333 T17 33
valid_sources[0x68] 2155116 1 T1 3575 T3 219 T6 4
valid_sources[0x69] 228668 1 T1 3471 T3 250 T6 11
valid_sources[0x6a] 225538 1 T1 3329 T3 287 T6 12
valid_sources[0x6b] 230604 1 T1 3449 T3 402 T6 10
valid_sources[0x6c] 224797 1 T1 3210 T3 202 T17 93
valid_sources[0x6d] 227388 1 T1 3658 T3 198 T17 50
valid_sources[0x6e] 279634 1 T1 3704 T3 328 T17 28
valid_sources[0x6f] 276761 1 T1 3692 T3 496 T6 43
valid_sources[0x70] 228576 1 T1 3479 T3 270 T17 33
valid_sources[0x71] 229609 1 T1 3779 T3 323 T6 4
valid_sources[0x72] 249484 1 T1 3550 T3 281 T6 1
valid_sources[0x73] 226490 1 T1 3422 T3 286 T17 46
valid_sources[0x74] 330713 1 T1 3355 T3 234 T17 8
valid_sources[0x75] 226786 1 T1 3412 T3 259 T17 61
valid_sources[0x76] 228596 1 T1 3558 T3 143 T6 3
valid_sources[0x77] 249638 1 T1 3549 T3 202 T17 48
valid_sources[0x78] 236270 1 T1 3639 T3 133 T17 53
valid_sources[0x79] 316578 1 T1 3704 T3 300 T6 15
valid_sources[0x7a] 266842 1 T1 3559 T3 220 T16 1
valid_sources[0x7b] 226662 1 T1 3792 T3 359 T4 1
valid_sources[0x7c] 225793 1 T1 3417 T3 336 T4 1
valid_sources[0x7d] 227481 1 T1 3624 T3 458 T6 1
valid_sources[0x7e] 224983 1 T1 3532 T3 350 T17 21
valid_sources[0x7f] 260510 1 T1 3582 T3 265 T17 60
valid_sources[0x80] 354971 1 T1 3583 T3 293 T17 33



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 18106344 1 T1 214989 T2 331 T3 19299
values[0x0] all_enables biggest_size 10681277 1 T1 113399 T2 828 T3 11532
values[0x1] all_enables biggest_size 9183548 1 T1 96257 T2 850 T3 10706

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%