Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46721556	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

44276503

1

T1

39224

T2

8504

T3

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	43308750	1			T1	44090		T2	9545		T3	1
values[0x0]	22304400	1			T1	20322		T2	4447		T3	4
values[0x1]	25384909	1			T1	23393		T2	5129		T3	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35897228	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

55100831

1

T1

50153

T2

10911

T3

4

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	280701	1			T1	369		T2	62		T4	924
valid_sources[0x01]	357503	1			T1	331		T2	71		T4	912
valid_sources[0x02]	280931	1			T1	317		T2	88		T4	873
valid_sources[0x03]	373877	1			T1	311		T2	67		T4	869
valid_sources[0x04]	262490	1			T1	331		T2	72		T4	920
valid_sources[0x05]	721252	1			T1	394		T2	73		T4	952
valid_sources[0x06]	423290	1			T1	331		T2	91		T4	839
valid_sources[0x07]	271481	1			T1	346		T2	78		T4	802
valid_sources[0x08]	271889	1			T1	352		T2	78		T4	850
valid_sources[0x09]	269483	1			T1	304		T2	78		T4	827
valid_sources[0x0a]	259951	1			T1	366		T2	73		T3	2
valid_sources[0x0b]	716041	1			T1	306		T2	65		T4	808
valid_sources[0x0c]	275888	1			T1	346		T2	66		T4	861
valid_sources[0x0d]	266125	1			T1	341		T2	67		T4	823
valid_sources[0x0e]	267641	1			T1	321		T2	80		T4	795
valid_sources[0x0f]	266085	1			T1	312		T2	66		T4	844
valid_sources[0x10]	268734	1			T1	360		T2	61		T4	940
valid_sources[0x11]	565588	1			T1	336		T2	81		T4	857
valid_sources[0x12]	285875	1			T1	330		T2	63		T4	923
valid_sources[0x13]	325466	1			T1	330		T2	76		T4	826
valid_sources[0x14]	353500	1			T1	348		T2	70		T4	894
valid_sources[0x15]	282491	1			T1	330		T2	86		T4	931
valid_sources[0x16]	292237	1			T1	343		T2	62		T4	871
valid_sources[0x17]	264783	1			T1	353		T2	70		T4	861
valid_sources[0x18]	276554	1			T1	340		T2	76		T4	760
valid_sources[0x19]	1500232	1			T1	362		T2	94		T4	769
valid_sources[0x1a]	265442	1			T1	318		T2	84		T4	855
valid_sources[0x1b]	287223	1			T1	342		T2	63		T4	844
valid_sources[0x1c]	574793	1			T1	341		T2	63		T4	994
valid_sources[0x1d]	259867	1			T1	343		T2	76		T4	902
valid_sources[0x1e]	265518	1			T1	339		T2	74		T3	1
valid_sources[0x1f]	387894	1			T1	385		T2	97		T4	837
valid_sources[0x20]	304633	1			T1	313		T2	77		T4	758
valid_sources[0x21]	258021	1			T1	341		T2	63		T4	739
valid_sources[0x22]	270217	1			T1	360		T2	64		T4	836
valid_sources[0x23]	285329	1			T1	280		T2	92		T4	835
valid_sources[0x24]	277699	1			T1	349		T2	82		T4	862
valid_sources[0x25]	288010	1			T1	341		T2	85		T4	869
valid_sources[0x26]	270380	1			T1	364		T2	89		T4	845
valid_sources[0x27]	279581	1			T1	331		T2	98		T4	852
valid_sources[0x28]	1313494	1			T1	343		T2	74		T4	827
valid_sources[0x29]	330127	1			T1	322		T2	91		T4	861
valid_sources[0x2a]	265346	1			T1	317		T2	62		T4	816
valid_sources[0x2b]	287957	1			T1	324		T2	86		T4	918
valid_sources[0x2c]	335719	1			T1	315		T2	69		T4	831
valid_sources[0x2d]	340508	1			T1	336		T2	77		T4	890
valid_sources[0x2e]	263288	1			T1	352		T2	85		T4	819
valid_sources[0x2f]	269641	1			T1	346		T2	70		T4	936
valid_sources[0x30]	266023	1			T1	333		T2	59		T4	901
valid_sources[0x31]	264483	1			T1	311		T2	70		T4	977
valid_sources[0x32]	265424	1			T1	372		T2	70		T4	858
valid_sources[0x33]	2209162	1			T1	359		T2	96		T4	845
valid_sources[0x34]	261834	1			T1	331		T2	77		T4	881
valid_sources[0x35]	442958	1			T1	378		T2	82		T4	795
valid_sources[0x36]	264726	1			T1	349		T2	77		T4	1007
valid_sources[0x37]	392456	1			T1	328		T2	75		T4	784
valid_sources[0x38]	304655	1			T1	329		T2	99		T4	923
valid_sources[0x39]	326259	1			T1	348		T2	69		T4	887
valid_sources[0x3a]	279027	1			T1	347		T2	72		T4	857
valid_sources[0x3b]	267948	1			T1	333		T2	75		T4	885
valid_sources[0x3c]	255831	1			T1	343		T2	81		T4	930
valid_sources[0x3d]	306947	1			T1	336		T2	72		T4	831
valid_sources[0x3e]	263539	1			T1	350		T2	62		T4	868
valid_sources[0x3f]	263250	1			T1	334		T2	63		T4	941
valid_sources[0x40]	274289	1			T1	333		T2	70		T4	918
valid_sources[0x41]	266787	1			T1	327		T2	79		T4	896
valid_sources[0x42]	271734	1			T1	382		T2	70		T4	792
valid_sources[0x43]	270322	1			T1	373		T2	76		T4	958
valid_sources[0x44]	277962	1			T1	330		T2	67		T4	814
valid_sources[0x45]	337763	1			T1	354		T2	55		T3	3
valid_sources[0x46]	267719	1			T1	355		T2	68		T4	936
valid_sources[0x47]	305857	1			T1	311		T2	46		T4	843
valid_sources[0x48]	2344487	1			T1	355		T2	77		T4	852
valid_sources[0x49]	275965	1			T1	342		T2	63		T4	831
valid_sources[0x4a]	269801	1			T1	414		T2	55		T4	893
valid_sources[0x4b]	490262	1			T1	343		T2	70		T4	923
valid_sources[0x4c]	260796	1			T1	329		T2	77		T4	849
valid_sources[0x4d]	374630	1			T1	351		T2	93		T4	903
valid_sources[0x4e]	266418	1			T1	346		T2	67		T4	783
valid_sources[0x4f]	262443	1			T1	342		T2	70		T4	875
valid_sources[0x50]	307829	1			T1	344		T2	75		T4	891
valid_sources[0x51]	269857	1			T1	345		T2	108		T4	908
valid_sources[0x52]	264439	1			T1	357		T2	71		T4	891
valid_sources[0x53]	959895	1			T1	325		T2	88		T4	827
valid_sources[0x54]	262559	1			T1	351		T2	67		T4	906
valid_sources[0x55]	264594	1			T1	336		T2	78		T4	805
valid_sources[0x56]	272107	1			T1	319		T2	89		T4	890
valid_sources[0x57]	425582	1			T1	330		T2	49		T4	859
valid_sources[0x58]	267798	1			T1	338		T2	90		T4	866
valid_sources[0x59]	258757	1			T1	317		T2	70		T4	897
valid_sources[0x5a]	260119	1			T1	326		T2	95		T4	882
valid_sources[0x5b]	276509	1			T1	334		T2	69		T4	867
valid_sources[0x5c]	267367	1			T1	373		T2	74		T4	915
valid_sources[0x5d]	302343	1			T1	366		T2	67		T4	836
valid_sources[0x5e]	548300	1			T1	333		T2	59		T4	917
valid_sources[0x5f]	284069	1			T1	349		T2	72		T4	796
valid_sources[0x60]	572056	1			T1	345		T2	65		T4	888
valid_sources[0x61]	263931	1			T1	325		T2	63		T4	838
valid_sources[0x62]	264518	1			T1	321		T2	69		T4	905
valid_sources[0x63]	388221	1			T1	346		T2	65		T4	860
valid_sources[0x64]	266919	1			T1	357		T2	73		T4	848
valid_sources[0x65]	331229	1			T1	335		T2	92		T4	927
valid_sources[0x66]	330815	1			T1	323		T2	63		T4	828
valid_sources[0x67]	278710	1			T1	330		T2	93		T4	953
valid_sources[0x68]	406513	1			T1	330		T2	73		T4	803
valid_sources[0x69]	284299	1			T1	390		T2	83		T4	763
valid_sources[0x6a]	273783	1			T1	342		T2	81		T4	804
valid_sources[0x6b]	267805	1			T1	318		T2	71		T4	820
valid_sources[0x6c]	2340137	1			T1	385		T2	84		T4	896
valid_sources[0x6d]	266845	1			T1	346		T2	86		T4	900
valid_sources[0x6e]	297942	1			T1	352		T2	57		T4	907
valid_sources[0x6f]	399134	1			T1	310		T2	73		T4	849
valid_sources[0x70]	348567	1			T1	345		T2	68		T4	841
valid_sources[0x71]	266416	1			T1	323		T2	68		T4	939
valid_sources[0x72]	270508	1			T1	327		T2	79		T4	842
valid_sources[0x73]	273618	1			T1	321		T2	77		T4	903
valid_sources[0x74]	272722	1			T1	328		T2	90		T4	809
valid_sources[0x75]	280930	1			T1	337		T2	79		T4	826
valid_sources[0x76]	262372	1			T1	344		T2	77		T4	830
valid_sources[0x77]	264637	1			T1	332		T2	77		T4	886
valid_sources[0x78]	267889	1			T1	387		T2	69		T4	869
valid_sources[0x79]	256618	1			T1	325		T2	86		T4	868
valid_sources[0x7a]	356836	1			T1	386		T2	73		T4	825
valid_sources[0x7b]	292469	1			T1	371		T2	99		T4	815
valid_sources[0x7c]	271331	1			T1	339		T2	75		T4	720
valid_sources[0x7d]	270077	1			T1	339		T2	78		T4	847
valid_sources[0x7e]	262376	1			T1	325		T2	57		T4	845
valid_sources[0x7f]	766442	1			T1	345		T2	78		T4	908
valid_sources[0x80]	260472	1			T1	325		T2	68		T4	917

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

21404384

1

T1

22086

T2

4803

T3

1

values[0x0]

all_enables

biggest_size

12307728

1

T1

9494

T2

2027

T3

2

values[0x1]

all_enables

biggest_size

10564391

1

T1

7644

T2

1674

T3

1