Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 38277660 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 35660966 1 T1 1 T2 4 T3 119762



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 35328119 1 T1 1 T2 1 T3 136032
values[0x0] 18122656 1 T1 6 T2 6 T3 62463
values[0x1] 20487851 1 T1 10 T2 10 T3 73378



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29542076 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 44396550 1 T1 3 T2 5 T3 154597



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 453874 1 T3 1062 T6 42 T7 372
valid_sources[0x01] 207428 1 T1 1 T3 997 T6 47
valid_sources[0x02] 203084 1 T3 1025 T6 55 T7 379
valid_sources[0x03] 201008 1 T2 1 T3 1011 T6 16
valid_sources[0x04] 234580 1 T3 1090 T6 44 T7 415
valid_sources[0x05] 204070 1 T3 1108 T6 46 T7 379
valid_sources[0x06] 2172516 1 T3 1066 T6 63 T7 360
valid_sources[0x07] 203059 1 T3 1035 T6 56 T7 388
valid_sources[0x08] 206829 1 T2 1 T3 1005 T6 38
valid_sources[0x09] 202681 1 T3 1093 T6 42 T7 421
valid_sources[0x0a] 267772 1 T3 1066 T6 58 T7 390
valid_sources[0x0b] 202459 1 T3 1099 T6 21 T7 349
valid_sources[0x0c] 224673 1 T3 1039 T6 55 T7 356
valid_sources[0x0d] 209338 1 T3 1047 T6 61 T7 363
valid_sources[0x0e] 202535 1 T1 1 T3 1044 T6 43
valid_sources[0x0f] 201002 1 T3 1102 T6 20 T7 362
valid_sources[0x10] 598174 1 T3 1097 T6 42 T7 447
valid_sources[0x11] 200468 1 T3 1036 T6 34 T7 416
valid_sources[0x12] 201022 1 T3 1073 T6 24 T7 376
valid_sources[0x13] 201787 1 T3 1078 T6 27 T7 355
valid_sources[0x14] 201186 1 T1 1 T3 1077 T6 35
valid_sources[0x15] 203140 1 T3 1093 T6 65 T7 345
valid_sources[0x16] 202108 1 T3 1041 T6 42 T7 394
valid_sources[0x17] 201523 1 T3 1007 T6 34 T7 360
valid_sources[0x18] 201605 1 T3 1041 T6 33 T7 352
valid_sources[0x19] 202742 1 T2 1 T3 1052 T6 35
valid_sources[0x1a] 202871 1 T3 1127 T6 64 T7 346
valid_sources[0x1b] 203944 1 T3 1038 T6 60 T7 358
valid_sources[0x1c] 200911 1 T2 1 T3 1066 T6 56
valid_sources[0x1d] 202705 1 T3 1039 T6 50 T7 362
valid_sources[0x1e] 201630 1 T3 1075 T6 49 T7 392
valid_sources[0x1f] 208887 1 T3 1127 T6 51 T7 408
valid_sources[0x20] 200804 1 T3 1067 T6 48 T7 349
valid_sources[0x21] 269085 1 T3 1096 T6 31 T7 360
valid_sources[0x22] 208450 1 T3 1044 T6 65 T7 388
valid_sources[0x23] 198598 1 T3 1077 T6 55 T7 300
valid_sources[0x24] 262922 1 T3 1059 T6 65 T7 320
valid_sources[0x25] 202407 1 T3 1064 T6 40 T7 363
valid_sources[0x26] 201877 1 T3 1057 T6 29 T7 356
valid_sources[0x27] 231544 1 T3 1054 T6 44 T7 379
valid_sources[0x28] 202046 1 T3 994 T6 57 T7 401
valid_sources[0x29] 202442 1 T3 1041 T6 81 T7 354
valid_sources[0x2a] 2298493 1 T3 1034 T6 46 T7 376
valid_sources[0x2b] 205859 1 T3 1080 T6 56 T7 338
valid_sources[0x2c] 204330 1 T3 1039 T6 40 T7 340
valid_sources[0x2d] 253866 1 T3 1016 T6 43 T7 347
valid_sources[0x2e] 202802 1 T3 1060 T6 41 T7 350
valid_sources[0x2f] 299069 1 T3 1034 T6 28 T7 423
valid_sources[0x30] 200417 1 T3 1056 T6 63 T7 363
valid_sources[0x31] 203141 1 T3 1001 T6 29 T7 365
valid_sources[0x32] 343458 1 T3 1105 T6 50 T7 347
valid_sources[0x33] 205765 1 T3 1051 T6 68 T7 356
valid_sources[0x34] 205147 1 T3 1023 T6 22 T7 423
valid_sources[0x35] 200794 1 T3 1104 T6 24 T7 326
valid_sources[0x36] 203710 1 T3 1117 T6 50 T7 347
valid_sources[0x37] 203853 1 T3 1072 T6 44 T7 401
valid_sources[0x38] 530596 1 T3 1060 T6 45 T7 397
valid_sources[0x39] 210448 1 T3 1084 T6 51 T7 309
valid_sources[0x3a] 200009 1 T3 1057 T6 55 T7 364
valid_sources[0x3b] 201228 1 T2 1 T3 1098 T6 27
valid_sources[0x3c] 204472 1 T3 1077 T6 23 T7 325
valid_sources[0x3d] 201242 1 T3 1005 T6 54 T7 366
valid_sources[0x3e] 203620 1 T3 1062 T6 27 T7 356
valid_sources[0x3f] 202561 1 T1 1 T3 1070 T6 54
valid_sources[0x40] 202897 1 T1 1 T3 1085 T6 46
valid_sources[0x41] 203505 1 T3 1066 T6 42 T7 356
valid_sources[0x42] 202283 1 T3 1034 T6 38 T7 324
valid_sources[0x43] 205284 1 T3 1002 T6 51 T7 398
valid_sources[0x44] 222899 1 T3 1080 T6 34 T7 312
valid_sources[0x45] 269534 1 T3 1031 T6 37 T7 321
valid_sources[0x46] 208381 1 T3 1044 T6 27 T7 384
valid_sources[0x47] 201628 1 T3 1036 T6 30 T7 350
valid_sources[0x48] 885123 1 T3 1040 T6 35 T7 390
valid_sources[0x49] 207662 1 T3 1113 T6 57 T7 345
valid_sources[0x4a] 200299 1 T3 1023 T6 59 T7 401
valid_sources[0x4b] 201650 1 T3 1077 T6 33 T7 371
valid_sources[0x4c] 205018 1 T3 1062 T6 18 T7 386
valid_sources[0x4d] 206986 1 T3 1067 T6 60 T7 348
valid_sources[0x4e] 200688 1 T3 1081 T6 48 T7 347
valid_sources[0x4f] 203859 1 T3 1119 T6 48 T7 337
valid_sources[0x50] 263958 1 T1 1 T3 985 T6 44
valid_sources[0x51] 252713 1 T3 1113 T6 49 T7 341
valid_sources[0x52] 223203 1 T3 1048 T6 48 T7 381
valid_sources[0x53] 280467 1 T2 2 T3 1076 T6 41
valid_sources[0x54] 203953 1 T3 1096 T6 48 T7 325
valid_sources[0x55] 2210641 1 T3 1017 T6 56 T7 339
valid_sources[0x56] 216544 1 T3 1078 T6 44 T7 366
valid_sources[0x57] 203364 1 T3 1009 T6 23 T7 361
valid_sources[0x58] 206160 1 T3 1019 T6 67 T7 353
valid_sources[0x59] 232097 1 T3 1055 T6 39 T7 369
valid_sources[0x5a] 232255 1 T3 1049 T6 47 T7 375
valid_sources[0x5b] 201678 1 T3 1026 T6 61 T7 377
valid_sources[0x5c] 203284 1 T3 1091 T6 45 T7 349
valid_sources[0x5d] 203437 1 T3 1070 T6 58 T7 358
valid_sources[0x5e] 1008417 1 T3 982 T6 19 T7 364
valid_sources[0x5f] 206531 1 T3 1065 T6 32 T7 398
valid_sources[0x60] 259396 1 T3 1110 T6 45 T7 336
valid_sources[0x61] 238719 1 T3 1105 T6 22 T7 345
valid_sources[0x62] 201602 1 T3 1038 T6 27 T7 430
valid_sources[0x63] 203913 1 T3 1016 T6 26 T7 354
valid_sources[0x64] 202635 1 T3 1005 T6 35 T7 345
valid_sources[0x65] 241980 1 T3 1040 T6 61 T7 354
valid_sources[0x66] 271715 1 T3 1109 T6 33 T7 345
valid_sources[0x67] 206627 1 T3 1052 T6 38 T7 353
valid_sources[0x68] 201256 1 T3 1063 T6 54 T7 392
valid_sources[0x69] 202095 1 T3 1080 T6 38 T7 338
valid_sources[0x6a] 1285209 1 T3 1093 T6 56 T7 325
valid_sources[0x6b] 201162 1 T3 1019 T6 16 T7 346
valid_sources[0x6c] 201212 1 T3 1064 T6 63 T7 309
valid_sources[0x6d] 204619 1 T3 1114 T6 21 T7 362
valid_sources[0x6e] 202992 1 T3 1075 T6 49 T7 388
valid_sources[0x6f] 202309 1 T3 1052 T6 17 T7 398
valid_sources[0x70] 203576 1 T3 1100 T6 65 T7 360
valid_sources[0x71] 388333 1 T3 1036 T6 25 T7 289
valid_sources[0x72] 213386 1 T3 1064 T6 43 T7 352
valid_sources[0x73] 205707 1 T3 1053 T6 71 T7 378
valid_sources[0x74] 421050 1 T3 1051 T6 41 T7 360
valid_sources[0x75] 202393 1 T3 1076 T6 63 T7 314
valid_sources[0x76] 201435 1 T3 1090 T6 50 T7 340
valid_sources[0x77] 340831 1 T3 1017 T6 68 T7 359
valid_sources[0x78] 202754 1 T2 1 T3 1098 T6 35
valid_sources[0x79] 225154 1 T3 1083 T6 56 T7 356
valid_sources[0x7a] 210161 1 T3 1032 T6 41 T7 343
valid_sources[0x7b] 202357 1 T3 1090 T6 57 T7 355
valid_sources[0x7c] 202705 1 T3 1099 T6 44 T7 360
valid_sources[0x7d] 221096 1 T3 1024 T6 34 T7 361
valid_sources[0x7e] 201619 1 T3 1107 T6 38 T7 394
valid_sources[0x7f] 199991 1 T3 1068 T6 84 T7 376
valid_sources[0x80] 200997 1 T3 1053 T6 43 T7 331



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 17462517 1 T2 1 T3 67872 T6 2908
values[0x0] all_enables biggest_size 9832851 1 T1 1 T2 1 T3 28816
values[0x1] all_enables biggest_size 8365598 1 T2 2 T3 23074 T6 983

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%