Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39930618	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

37956137

1

T1

9013

T2

2

T3

39536

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	37098116	1			T1	10050		T2	1		T3	45118
values[0x0]	19158838	1			T1	4611		T2	5		T3	20727
values[0x1]	21629801	1			T1	5289		T2	5		T3	24125

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30815260	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

47071495

1

T1

11527

T2

5

T3

50998

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	248882	1			T1	61		T3	362		T6	144
valid_sources[0x01]	263486	1			T1	39		T3	316		T6	68
valid_sources[0x02]	246989	1			T1	52		T3	312		T6	96
valid_sources[0x03]	247200	1			T1	71		T3	261		T6	73
valid_sources[0x04]	248062	1			T1	69		T3	444		T6	75
valid_sources[0x05]	2113769	1			T1	72		T3	407		T6	58
valid_sources[0x06]	246826	1			T1	58		T3	269		T6	133
valid_sources[0x07]	324816	1			T1	64		T3	382		T6	94
valid_sources[0x08]	251784	1			T1	85		T3	341		T6	76
valid_sources[0x09]	244889	1			T1	86		T3	315		T6	122
valid_sources[0x0a]	245547	1			T1	70		T3	433		T6	58
valid_sources[0x0b]	291829	1			T1	56		T3	352		T6	127
valid_sources[0x0c]	245941	1			T1	55		T3	257		T6	112
valid_sources[0x0d]	279993	1			T1	82		T3	357		T6	58
valid_sources[0x0e]	256311	1			T1	84		T3	330		T6	107
valid_sources[0x0f]	254173	1			T1	108		T3	348		T6	116
valid_sources[0x10]	248964	1			T1	84		T3	349		T6	53
valid_sources[0x11]	321843	1			T1	54		T3	335		T6	134
valid_sources[0x12]	718220	1			T1	67		T3	337		T6	86
valid_sources[0x13]	251616	1			T1	95		T3	371		T6	117
valid_sources[0x14]	246475	1			T1	42		T3	465		T6	108
valid_sources[0x15]	244951	1			T1	58		T3	375		T6	71
valid_sources[0x16]	320631	1			T1	106		T3	298		T6	119
valid_sources[0x17]	272684	1			T1	71		T3	456		T6	123
valid_sources[0x18]	245198	1			T1	95		T3	375		T6	86
valid_sources[0x19]	247518	1			T1	93		T3	464		T6	79
valid_sources[0x1a]	251489	1			T1	90		T3	424		T6	82
valid_sources[0x1b]	258737	1			T1	89		T3	303		T6	104
valid_sources[0x1c]	546577	1			T1	71		T3	314		T6	110
valid_sources[0x1d]	340537	1			T1	98		T3	341		T6	77
valid_sources[0x1e]	248834	1			T1	84		T3	313		T6	53
valid_sources[0x1f]	245852	1			T1	63		T3	309		T6	85
valid_sources[0x20]	247575	1			T1	106		T3	365		T6	130
valid_sources[0x21]	249288	1			T1	76		T3	395		T6	91
valid_sources[0x22]	246190	1			T1	68		T3	317		T6	80
valid_sources[0x23]	243711	1			T1	69		T3	346		T6	96
valid_sources[0x24]	246685	1			T1	59		T3	382		T6	132
valid_sources[0x25]	248003	1			T1	59		T3	349		T6	77
valid_sources[0x26]	251588	1			T1	74		T3	505		T6	110
valid_sources[0x27]	292426	1			T1	68		T3	325		T6	143
valid_sources[0x28]	246194	1			T1	38		T3	265		T6	81
valid_sources[0x29]	245602	1			T1	73		T3	339		T6	94
valid_sources[0x2a]	246811	1			T1	81		T3	353		T6	135
valid_sources[0x2b]	246055	1			T1	79		T3	369		T6	77
valid_sources[0x2c]	480612	1			T1	60		T3	380		T6	29
valid_sources[0x2d]	245716	1			T1	56		T3	308		T6	111
valid_sources[0x2e]	274205	1			T1	77		T3	339		T6	104
valid_sources[0x2f]	345765	1			T1	123		T3	350		T6	66
valid_sources[0x30]	246851	1			T1	69		T3	293		T6	97
valid_sources[0x31]	246508	1			T1	97		T3	368		T6	65
valid_sources[0x32]	247733	1			T1	91		T3	454		T6	132
valid_sources[0x33]	246678	1			T1	90		T3	314		T6	156
valid_sources[0x34]	254694	1			T1	91		T3	274		T6	156
valid_sources[0x35]	246281	1			T1	95		T3	338		T6	75
valid_sources[0x36]	966730	1			T1	88		T3	328		T6	133
valid_sources[0x37]	245764	1			T1	63		T3	371		T6	87
valid_sources[0x38]	247700	1			T1	93		T3	424		T6	116
valid_sources[0x39]	247735	1			T1	61		T3	264		T6	88
valid_sources[0x3a]	264827	1			T1	85		T3	349		T6	107
valid_sources[0x3b]	486197	1			T1	81		T3	324		T6	65
valid_sources[0x3c]	360628	1			T1	93		T3	377		T6	153
valid_sources[0x3d]	576940	1			T1	86		T3	366		T6	114
valid_sources[0x3e]	261224	1			T1	74		T3	254		T6	122
valid_sources[0x3f]	248184	1			T1	84		T3	356		T6	118
valid_sources[0x40]	259330	1			T1	84		T3	359		T6	74
valid_sources[0x41]	245154	1			T1	74		T3	434		T6	117
valid_sources[0x42]	270524	1			T1	101		T3	378		T6	207
valid_sources[0x43]	377193	1			T1	75		T3	232		T6	147
valid_sources[0x44]	256936	1			T1	92		T3	331		T6	79
valid_sources[0x45]	250223	1			T1	76		T3	374		T6	82
valid_sources[0x46]	653857	1			T1	86		T3	336		T6	182
valid_sources[0x47]	245695	1			T1	93		T3	336		T6	73
valid_sources[0x48]	894066	1			T1	85		T3	345		T6	129
valid_sources[0x49]	246424	1			T1	55		T3	261		T6	89
valid_sources[0x4a]	246374	1			T1	74		T3	454		T6	177
valid_sources[0x4b]	245824	1			T1	98		T3	297		T6	126
valid_sources[0x4c]	248712	1			T1	58		T3	356		T6	68
valid_sources[0x4d]	251703	1			T1	59		T3	334		T6	125
valid_sources[0x4e]	249472	1			T1	67		T3	379		T6	209
valid_sources[0x4f]	249559	1			T1	94		T3	355		T6	86
valid_sources[0x50]	272091	1			T1	55		T3	313		T6	156
valid_sources[0x51]	518637	1			T1	68		T3	297		T6	75
valid_sources[0x52]	299171	1			T1	78		T3	324		T6	117
valid_sources[0x53]	248487	1			T1	61		T3	408		T6	131
valid_sources[0x54]	246838	1			T1	55		T3	415		T6	125
valid_sources[0x55]	455223	1			T1	80		T3	328		T6	119
valid_sources[0x56]	342940	1			T1	66		T3	365		T6	114
valid_sources[0x57]	323962	1			T1	70		T3	366		T6	127
valid_sources[0x58]	290761	1			T1	59		T3	379		T6	131
valid_sources[0x59]	574488	1			T1	77		T3	378		T6	116
valid_sources[0x5a]	249112	1			T1	69		T3	332		T6	119
valid_sources[0x5b]	698712	1			T1	82		T3	342		T6	194
valid_sources[0x5c]	246092	1			T1	73		T3	240		T6	75
valid_sources[0x5d]	246188	1			T1	87		T3	367		T6	136
valid_sources[0x5e]	247360	1			T1	36		T3	302		T6	105
valid_sources[0x5f]	247498	1			T1	64		T3	417		T6	74
valid_sources[0x60]	247553	1			T1	79		T3	462		T6	78
valid_sources[0x61]	357245	1			T1	99		T3	434		T6	97
valid_sources[0x62]	247556	1			T1	79		T3	347		T6	52
valid_sources[0x63]	246811	1			T1	48		T3	380		T6	51
valid_sources[0x64]	335865	1			T1	77		T3	285		T6	103
valid_sources[0x65]	274550	1			T1	90		T3	392		T6	60
valid_sources[0x66]	635252	1			T1	85		T3	333		T6	99
valid_sources[0x67]	248918	1			T1	66		T3	516		T6	60
valid_sources[0x68]	244326	1			T1	90		T3	371		T6	19
valid_sources[0x69]	247076	1			T1	94		T3	356		T6	178
valid_sources[0x6a]	438557	1			T1	66		T3	301		T6	122
valid_sources[0x6b]	248001	1			T1	107		T3	402		T6	78
valid_sources[0x6c]	247002	1			T1	70		T3	305		T6	110
valid_sources[0x6d]	246009	1			T1	73		T3	357		T6	158
valid_sources[0x6e]	246856	1			T1	68		T3	304		T6	114
valid_sources[0x6f]	256308	1			T1	104		T3	307		T6	136
valid_sources[0x70]	270594	1			T1	78		T3	339		T6	98
valid_sources[0x71]	246854	1			T1	58		T3	447		T6	138
valid_sources[0x72]	347186	1			T1	88		T3	376		T6	159
valid_sources[0x73]	246193	1			T1	76		T3	342		T6	108
valid_sources[0x74]	246169	1			T1	107		T3	350		T6	149
valid_sources[0x75]	263473	1			T1	82		T3	278		T6	106
valid_sources[0x76]	246546	1			T1	78		T3	310		T6	61
valid_sources[0x77]	254083	1			T1	117		T3	305		T6	126
valid_sources[0x78]	247050	1			T1	106		T3	289		T6	133
valid_sources[0x79]	246880	1			T1	72		T3	359		T6	66
valid_sources[0x7a]	247107	1			T1	113		T3	294		T6	134
valid_sources[0x7b]	248527	1			T1	49		T3	341		T6	110
valid_sources[0x7c]	249064	1			T1	38		T3	336		T6	91
valid_sources[0x7d]	250789	1			T1	93		T3	290		T6	132
valid_sources[0x7e]	247997	1			T1	89		T3	332		T6	188
valid_sources[0x7f]	247115	1			T1	79		T3	238		T6	60
valid_sources[0x80]	244076	1			T1	54		T3	399		T6	80

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18362882

1

T1

5092

T3

22460

T6

6724

values[0x0]

all_enables

biggest_size

10557040

1

T1

2182

T2

1

T3

9480

values[0x1]

all_enables

biggest_size

9036215

1

T1

1739

T2

1

T3

7596