Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	38118400	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

35552907

1

T1

36150

T2

238016

T3

49

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	35207090	1			T1	36927		T2	223186		T3	39
values[0x0]	18062485	1			T1	17407		T2	116049		T3	16
values[0x1]	20401732	1			T1	19608		T2	128519		T3	21

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	29441961	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

44229346

1

T1

44749

T2

294164

T3

54

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	255913	1			T2	1787		T7	465		T4	20
valid_sources[0x01]	208513	1			T2	1827		T7	537		T4	8
valid_sources[0x02]	193726	1			T2	1922		T7	497		T4	20
valid_sources[0x03]	194252	1			T2	1760		T7	563		T4	12
valid_sources[0x04]	195228	1			T2	1919		T7	523		T4	21
valid_sources[0x05]	202622	1			T2	1862		T7	547		T4	17
valid_sources[0x06]	1046979	1			T2	1903		T7	496		T4	25
valid_sources[0x07]	252942	1			T2	1813		T7	500		T4	24
valid_sources[0x08]	192732	1			T2	1828		T7	513		T4	23
valid_sources[0x09]	195443	1			T2	1902		T7	529		T4	22
valid_sources[0x0a]	193496	1			T2	1782		T7	514		T4	15
valid_sources[0x0b]	221358	1			T2	1880		T17	3		T7	565
valid_sources[0x0c]	236298	1			T2	1844		T7	532		T4	18
valid_sources[0x0d]	195481	1			T2	1732		T7	505		T4	22
valid_sources[0x0e]	194487	1			T2	1847		T7	554		T4	16
valid_sources[0x0f]	460593	1			T2	1842		T7	565		T4	18
valid_sources[0x10]	207173	1			T2	1951		T7	536		T4	24
valid_sources[0x11]	318318	1			T2	1878		T7	502		T4	14
valid_sources[0x12]	195049	1			T2	1780		T7	564		T4	31
valid_sources[0x13]	232092	1			T2	1714		T7	549		T4	15
valid_sources[0x14]	200852	1			T2	1752		T7	512		T4	17
valid_sources[0x15]	192820	1			T2	1845		T7	555		T4	13
valid_sources[0x16]	255084	1			T2	1883		T7	538		T4	26
valid_sources[0x17]	192634	1			T2	1826		T7	512		T4	19
valid_sources[0x18]	194601	1			T2	1890		T7	497		T4	17
valid_sources[0x19]	244661	1			T2	1809		T7	514		T4	12
valid_sources[0x1a]	213097	1			T2	1797		T7	515		T4	27
valid_sources[0x1b]	203268	1			T2	1784		T7	548		T4	14
valid_sources[0x1c]	194317	1			T2	1874		T7	546		T4	23
valid_sources[0x1d]	221080	1			T2	1792		T7	504		T4	18
valid_sources[0x1e]	213882	1			T2	1881		T7	558		T4	19
valid_sources[0x1f]	2212627	1			T2	1797		T7	531		T4	13
valid_sources[0x20]	199277	1			T2	1744		T7	535		T4	15
valid_sources[0x21]	193204	1			T2	1912		T7	590		T4	25
valid_sources[0x22]	257008	1			T2	1730		T7	536		T4	20
valid_sources[0x23]	196777	1			T2	1852		T7	534		T4	16
valid_sources[0x24]	194278	1			T2	1934		T7	514		T4	16
valid_sources[0x25]	458734	1			T2	1873		T7	527		T4	22
valid_sources[0x26]	194746	1			T2	1962		T7	536		T4	26
valid_sources[0x27]	192085	1			T2	1816		T7	504		T4	11
valid_sources[0x28]	196920	1			T2	1910		T7	524		T4	25
valid_sources[0x29]	236488	1			T2	1803		T7	502		T4	19
valid_sources[0x2a]	193172	1			T2	1781		T7	577		T4	24
valid_sources[0x2b]	193593	1			T2	1779		T7	524		T4	13
valid_sources[0x2c]	194556	1			T2	1659		T7	509		T4	23
valid_sources[0x2d]	372856	1			T2	1700		T7	542		T4	17
valid_sources[0x2e]	249486	1			T2	1901		T7	525		T4	27
valid_sources[0x2f]	194546	1			T2	1726		T7	579		T4	17
valid_sources[0x30]	331895	1			T2	1861		T7	484		T4	22
valid_sources[0x31]	390365	1			T2	1922		T7	524		T4	18
valid_sources[0x32]	194030	1			T2	1855		T7	544		T4	15
valid_sources[0x33]	195362	1			T2	1826		T17	3		T7	509
valid_sources[0x34]	196594	1			T2	1739		T17	2		T7	509
valid_sources[0x35]	191961	1			T2	1793		T7	546		T4	18
valid_sources[0x36]	192926	1			T2	1824		T7	516		T4	20
valid_sources[0x37]	195077	1			T2	1572		T7	527		T4	16
valid_sources[0x38]	613999	1			T1	73942		T2	1931		T7	578
valid_sources[0x39]	194354	1			T2	1993		T7	546		T4	20
valid_sources[0x3a]	198220	1			T2	1874		T7	523		T4	24
valid_sources[0x3b]	194471	1			T2	1801		T7	559		T4	33
valid_sources[0x3c]	194812	1			T2	1907		T7	565		T4	21
valid_sources[0x3d]	194530	1			T2	1871		T7	521		T4	14
valid_sources[0x3e]	194365	1			T2	1772		T7	527		T4	20
valid_sources[0x3f]	225264	1			T2	1876		T7	545		T4	18
valid_sources[0x40]	230363	1			T2	1753		T7	534		T4	13
valid_sources[0x41]	194105	1			T2	1770		T7	554		T4	31
valid_sources[0x42]	195129	1			T2	1870		T7	523		T4	24
valid_sources[0x43]	194843	1			T2	1810		T7	502		T4	23
valid_sources[0x44]	193046	1			T2	1898		T7	515		T4	33
valid_sources[0x45]	206662	1			T2	1907		T17	6		T7	488
valid_sources[0x46]	257810	1			T2	1780		T7	535		T4	16
valid_sources[0x47]	193927	1			T2	2016		T7	492		T4	16
valid_sources[0x48]	250019	1			T2	2093		T7	503		T4	18
valid_sources[0x49]	2105564	1			T2	1858		T7	527		T4	16
valid_sources[0x4a]	520670	1			T2	1744		T7	535		T4	27
valid_sources[0x4b]	257804	1			T2	1829		T7	513		T4	15
valid_sources[0x4c]	288447	1			T2	1701		T7	524		T4	9
valid_sources[0x4d]	323706	1			T2	1778		T7	507		T4	24
valid_sources[0x4e]	191509	1			T2	1882		T7	527		T4	15
valid_sources[0x4f]	195395	1			T2	1851		T7	547		T4	15
valid_sources[0x50]	193709	1			T2	1891		T7	534		T4	20
valid_sources[0x51]	280011	1			T2	1851		T7	505		T4	18
valid_sources[0x52]	193555	1			T2	1843		T7	545		T4	30
valid_sources[0x53]	193236	1			T2	1747		T7	511		T4	19
valid_sources[0x54]	197740	1			T2	1701		T7	538		T4	32
valid_sources[0x55]	192593	1			T2	1857		T7	487		T4	30
valid_sources[0x56]	195652	1			T2	1840		T7	513		T4	27
valid_sources[0x57]	264427	1			T2	1864		T7	520		T4	32
valid_sources[0x58]	194302	1			T2	1761		T7	554		T4	17
valid_sources[0x59]	424785	1			T2	1917		T7	533		T4	26
valid_sources[0x5a]	195499	1			T2	1816		T7	545		T4	18
valid_sources[0x5b]	194753	1			T2	1920		T7	509		T4	18
valid_sources[0x5c]	214895	1			T2	1942		T7	536		T4	17
valid_sources[0x5d]	198066	1			T2	1872		T7	549		T4	15
valid_sources[0x5e]	224337	1			T2	1849		T7	532		T4	22
valid_sources[0x5f]	314712	1			T2	1755		T7	567		T4	15
valid_sources[0x60]	194823	1			T2	1892		T7	531		T4	17
valid_sources[0x61]	204342	1			T2	1806		T7	544		T4	24
valid_sources[0x62]	191891	1			T2	1864		T7	540		T4	7
valid_sources[0x63]	195830	1			T2	1892		T7	539		T4	17
valid_sources[0x64]	196062	1			T2	1991		T7	567		T4	21
valid_sources[0x65]	196814	1			T2	1774		T7	546		T4	13
valid_sources[0x66]	196180	1			T2	1859		T7	532		T4	22
valid_sources[0x67]	306680	1			T2	1855		T7	562		T4	14
valid_sources[0x68]	194628	1			T2	1674		T7	535		T4	10
valid_sources[0x69]	193841	1			T2	1898		T7	527		T4	24
valid_sources[0x6a]	206395	1			T2	1789		T7	505		T4	24
valid_sources[0x6b]	194046	1			T2	1820		T7	519		T4	31
valid_sources[0x6c]	666948	1			T2	1736		T7	532		T4	19
valid_sources[0x6d]	193135	1			T2	1726		T7	509		T4	16
valid_sources[0x6e]	195521	1			T2	1840		T7	533		T4	15
valid_sources[0x6f]	193342	1			T2	1752		T7	556		T4	7
valid_sources[0x70]	258150	1			T2	1780		T7	555		T4	16
valid_sources[0x71]	190755	1			T2	1876		T7	514		T4	18
valid_sources[0x72]	240343	1			T2	1783		T7	557		T4	33
valid_sources[0x73]	2098527	1			T2	1915		T7	524		T4	18
valid_sources[0x74]	192642	1			T2	1860		T7	508		T4	32
valid_sources[0x75]	1037335	1			T2	2026		T7	578		T4	13
valid_sources[0x76]	268549	1			T2	1879		T7	533		T4	19
valid_sources[0x77]	194434	1			T2	1753		T7	536		T4	28
valid_sources[0x78]	220867	1			T2	1868		T7	561		T4	19
valid_sources[0x79]	220658	1			T2	1817		T7	523		T4	17
valid_sources[0x7a]	195969	1			T2	1788		T7	563		T4	31
valid_sources[0x7b]	196108	1			T2	1809		T17	1		T7	554
valid_sources[0x7c]	193474	1			T2	1758		T7	513		T4	16
valid_sources[0x7d]	238662	1			T2	1860		T7	514		T4	28
valid_sources[0x7e]	650049	1			T2	1808		T7	566		T4	33
valid_sources[0x7f]	450281	1			T2	1798		T7	522		T4	25
valid_sources[0x80]	349150	1			T2	1861		T7	545		T4	12

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

17409460

1

T1

18497

T2

102818

T3

16

values[0x0]

all_enables

biggest_size

9804869

1

T1

9347

T2

71675

T3

14

values[0x1]

all_enables

biggest_size

8338578

1

T1

8306

T2

63523

T3

19