Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 38010733 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 36181580 1 T1 45892 T2 69756 T3 9095



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 35408766 1 T1 47260 T2 71520 T3 10355
values[0x0] 18244921 1 T1 22196 T2 35007 T3 4736
values[0x1] 20538626 1 T1 25423 T2 39373 T3 5425



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29324723 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 44867590 1 T1 56953 T2 86875 T3 11706



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 233963 1 T1 341 T3 102 T6 4183
valid_sources[0x01] 231424 1 T1 352 T3 84 T6 4182
valid_sources[0x02] 232849 1 T1 368 T3 81 T6 4145
valid_sources[0x03] 235688 1 T1 379 T3 86 T6 4256
valid_sources[0x04] 247821 1 T1 374 T3 76 T6 4238
valid_sources[0x05] 234263 1 T1 373 T3 77 T6 4045
valid_sources[0x06] 233489 1 T1 348 T3 70 T6 4201
valid_sources[0x07] 232634 1 T1 371 T3 68 T6 4277
valid_sources[0x08] 351559 1 T1 392 T3 70 T6 4105
valid_sources[0x09] 232811 1 T1 325 T3 89 T6 4310
valid_sources[0x0a] 245500 1 T1 397 T3 89 T6 4402
valid_sources[0x0b] 246869 1 T1 336 T3 67 T6 4185
valid_sources[0x0c] 235982 1 T1 376 T3 82 T6 4203
valid_sources[0x0d] 231443 1 T1 398 T3 75 T6 4259
valid_sources[0x0e] 237300 1 T1 350 T3 74 T6 4200
valid_sources[0x0f] 380944 1 T1 382 T3 75 T6 4174
valid_sources[0x10] 271260 1 T1 376 T3 81 T6 4199
valid_sources[0x11] 232668 1 T1 341 T3 90 T6 4345
valid_sources[0x12] 234637 1 T1 386 T3 69 T6 4345
valid_sources[0x13] 233598 1 T1 372 T3 84 T6 4305
valid_sources[0x14] 233488 1 T1 336 T3 81 T6 4294
valid_sources[0x15] 233189 1 T1 374 T3 94 T6 4201
valid_sources[0x16] 1028609 1 T1 371 T3 74 T6 4327
valid_sources[0x17] 232248 1 T1 393 T3 78 T6 4016
valid_sources[0x18] 234678 1 T1 331 T3 86 T6 4059
valid_sources[0x19] 279996 1 T1 360 T3 85 T6 4181
valid_sources[0x1a] 491563 1 T1 380 T3 96 T6 4205
valid_sources[0x1b] 234108 1 T1 354 T3 107 T6 4164
valid_sources[0x1c] 234927 1 T1 342 T3 84 T6 4179
valid_sources[0x1d] 325969 1 T1 373 T3 90 T6 4078
valid_sources[0x1e] 1183983 1 T1 370 T3 80 T6 4197
valid_sources[0x1f] 260079 1 T1 356 T3 87 T6 4098
valid_sources[0x20] 234301 1 T1 391 T3 69 T6 4264
valid_sources[0x21] 234640 1 T1 354 T3 69 T6 4212
valid_sources[0x22] 521740 1 T1 361 T3 84 T6 4199
valid_sources[0x23] 244254 1 T1 333 T3 96 T6 4078
valid_sources[0x24] 403670 1 T1 382 T3 74 T6 4195
valid_sources[0x25] 236268 1 T1 353 T3 68 T6 4330
valid_sources[0x26] 233844 1 T1 391 T3 73 T6 4150
valid_sources[0x27] 233235 1 T1 378 T3 91 T6 4330
valid_sources[0x28] 287134 1 T1 386 T3 80 T6 4263
valid_sources[0x29] 234085 1 T1 368 T3 97 T6 4235
valid_sources[0x2a] 233349 1 T1 389 T3 85 T6 4206
valid_sources[0x2b] 280430 1 T1 343 T3 69 T6 4235
valid_sources[0x2c] 234371 1 T1 353 T3 77 T6 4204
valid_sources[0x2d] 318781 1 T1 391 T3 77 T6 4113
valid_sources[0x2e] 229449 1 T1 387 T3 81 T6 4176
valid_sources[0x2f] 235103 1 T1 391 T3 94 T6 4304
valid_sources[0x30] 234896 1 T1 392 T3 80 T6 4110
valid_sources[0x31] 233487 1 T1 356 T3 83 T6 4334
valid_sources[0x32] 231314 1 T1 391 T3 80 T6 4286
valid_sources[0x33] 235921 1 T1 363 T3 81 T6 4256
valid_sources[0x34] 234889 1 T1 397 T3 82 T6 4297
valid_sources[0x35] 233261 1 T1 407 T3 96 T6 4189
valid_sources[0x36] 232568 1 T1 356 T3 84 T6 4171
valid_sources[0x37] 232959 1 T1 351 T3 80 T6 4176
valid_sources[0x38] 488401 1 T1 397 T3 82 T6 4148
valid_sources[0x39] 231815 1 T1 398 T3 85 T6 4230
valid_sources[0x3a] 235558 1 T1 378 T3 74 T6 4159
valid_sources[0x3b] 235937 1 T1 425 T3 90 T6 4276
valid_sources[0x3c] 231413 1 T1 374 T3 80 T6 4261
valid_sources[0x3d] 277437 1 T1 416 T3 79 T6 4155
valid_sources[0x3e] 241202 1 T1 359 T3 96 T6 4195
valid_sources[0x3f] 2177198 1 T1 380 T3 81 T6 4144
valid_sources[0x40] 235446 1 T1 390 T3 79 T6 4114
valid_sources[0x41] 254913 1 T1 349 T3 80 T6 4230
valid_sources[0x42] 233309 1 T1 388 T3 82 T6 4238
valid_sources[0x43] 233409 1 T1 354 T3 76 T6 4130
valid_sources[0x44] 233995 1 T1 385 T3 71 T6 4150
valid_sources[0x45] 234724 1 T1 393 T3 77 T6 4159
valid_sources[0x46] 234094 1 T1 358 T3 74 T6 4220
valid_sources[0x47] 352258 1 T1 393 T3 89 T6 4201
valid_sources[0x48] 232927 1 T1 398 T3 79 T6 4113
valid_sources[0x49] 234659 1 T1 386 T3 65 T6 4204
valid_sources[0x4a] 231737 1 T1 359 T3 87 T6 4163
valid_sources[0x4b] 232351 1 T1 373 T3 74 T6 4182
valid_sources[0x4c] 232659 1 T1 397 T3 64 T6 4179
valid_sources[0x4d] 231838 1 T1 387 T3 76 T6 4079
valid_sources[0x4e] 246126 1 T1 350 T3 66 T6 4319
valid_sources[0x4f] 241084 1 T1 367 T3 71 T6 4292
valid_sources[0x50] 230643 1 T1 376 T3 83 T6 4240
valid_sources[0x51] 280203 1 T1 369 T3 90 T6 4237
valid_sources[0x52] 231915 1 T1 380 T3 70 T6 4199
valid_sources[0x53] 260947 1 T1 324 T3 94 T6 4240
valid_sources[0x54] 748734 1 T1 368 T3 84 T6 4183
valid_sources[0x55] 234043 1 T1 377 T3 70 T6 4265
valid_sources[0x56] 610931 1 T1 410 T3 85 T6 4215
valid_sources[0x57] 237047 1 T1 404 T3 73 T6 4181
valid_sources[0x58] 231618 1 T1 405 T3 74 T6 4303
valid_sources[0x59] 263647 1 T1 353 T3 95 T6 4249
valid_sources[0x5a] 238120 1 T1 360 T3 65 T6 4064
valid_sources[0x5b] 234926 1 T1 338 T3 80 T6 4243
valid_sources[0x5c] 794829 1 T1 373 T3 78 T6 4248
valid_sources[0x5d] 290515 1 T1 375 T3 56 T6 4178
valid_sources[0x5e] 259130 1 T1 357 T3 77 T6 4069
valid_sources[0x5f] 232526 1 T1 338 T3 89 T6 4131
valid_sources[0x60] 232430 1 T1 390 T3 78 T6 4208
valid_sources[0x61] 241091 1 T1 357 T3 79 T6 4290
valid_sources[0x62] 233729 1 T1 362 T3 75 T6 4236
valid_sources[0x63] 337905 1 T1 365 T3 86 T6 4191
valid_sources[0x64] 333006 1 T1 385 T3 84 T6 4225
valid_sources[0x65] 233452 1 T1 375 T3 68 T6 4392
valid_sources[0x66] 232733 1 T1 353 T3 84 T6 4098
valid_sources[0x67] 233058 1 T1 383 T3 80 T6 4207
valid_sources[0x68] 235283 1 T1 373 T3 87 T6 4273
valid_sources[0x69] 265037 1 T1 418 T3 98 T6 4150
valid_sources[0x6a] 232843 1 T1 402 T3 90 T6 4153
valid_sources[0x6b] 232308 1 T1 344 T3 81 T6 4205
valid_sources[0x6c] 232391 1 T1 369 T3 97 T6 4089
valid_sources[0x6d] 406959 1 T1 347 T3 78 T6 4172
valid_sources[0x6e] 330441 1 T1 367 T3 67 T6 4430
valid_sources[0x6f] 234377 1 T1 370 T3 72 T6 4344
valid_sources[0x70] 276481 1 T1 353 T3 75 T6 4105
valid_sources[0x71] 1244408 1 T1 371 T3 87 T6 4260
valid_sources[0x72] 390643 1 T1 373 T3 90 T6 4307
valid_sources[0x73] 231921 1 T1 350 T3 69 T6 4158
valid_sources[0x74] 232132 1 T1 360 T3 102 T6 4097
valid_sources[0x75] 231515 1 T1 379 T3 83 T6 4143
valid_sources[0x76] 232068 1 T1 369 T3 72 T6 4186
valid_sources[0x77] 232138 1 T1 392 T3 75 T6 4158
valid_sources[0x78] 232918 1 T1 384 T3 104 T6 4172
valid_sources[0x79] 242941 1 T1 357 T3 74 T6 4156
valid_sources[0x7a] 232282 1 T1 361 T3 68 T6 4167
valid_sources[0x7b] 235500 1 T1 337 T3 94 T6 4177
valid_sources[0x7c] 238112 1 T1 367 T3 91 T6 4173
valid_sources[0x7d] 488673 1 T1 354 T3 95 T6 4322
valid_sources[0x7e] 234905 1 T1 345 T3 81 T6 4172
valid_sources[0x7f] 241867 1 T1 373 T3 73 T6 4199
valid_sources[0x80] 264573 1 T1 365 T3 66 T6 4198



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 17461456 1 T1 23644 T2 35760 T3 5094
values[0x0] all_enables biggest_size 10075584 1 T1 11907 T2 18376 T3 2223
values[0x1] all_enables biggest_size 8644540 1 T1 10341 T2 15620 T3 1778

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%