Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/hmac-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39961915	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

37330303

1

T1

5414

T2

6930

T3

16676

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	36922294	1			T1	6253		T2	7141		T3	11272
values[0x0]	18949685	1			T1	2769		T2	3022		T3	7846
values[0x1]	21420239	1			T1	3215		T2	3498		T3	8180

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30843669	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

46448549

1

T1

6987

T2

8532

T3

18772

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	220063	1			T1	44		T2	72		T4	9
valid_sources[0x01]	227596	1			T1	49		T2	63		T4	9
valid_sources[0x02]	249378	1			T1	45		T2	47		T4	15
valid_sources[0x03]	292623	1			T1	44		T2	56		T4	13
valid_sources[0x04]	225574	1			T1	49		T2	81		T4	6
valid_sources[0x05]	565337	1			T1	42		T2	4		T4	15
valid_sources[0x06]	853834	1			T1	61		T2	36		T4	10
valid_sources[0x07]	238057	1			T1	50		T2	105		T4	11
valid_sources[0x08]	221119	1			T1	51		T2	55		T4	11
valid_sources[0x09]	220843	1			T1	62		T2	97		T4	6
valid_sources[0x0a]	227006	1			T1	47		T2	37		T4	6
valid_sources[0x0b]	220859	1			T1	40		T2	25		T4	5
valid_sources[0x0c]	238191	1			T1	48		T2	44		T4	8
valid_sources[0x0d]	221847	1			T1	41		T2	15		T4	7
valid_sources[0x0e]	218689	1			T1	44		T2	30		T4	9
valid_sources[0x0f]	225358	1			T1	48		T2	55		T4	5
valid_sources[0x10]	446070	1			T1	44		T2	12		T4	9
valid_sources[0x11]	388735	1			T1	41		T2	78		T4	8
valid_sources[0x12]	224507	1			T1	51		T2	45		T4	10
valid_sources[0x13]	241777	1			T1	52		T2	78		T4	6
valid_sources[0x14]	256714	1			T1	38		T2	14		T4	11
valid_sources[0x15]	221044	1			T1	49		T2	89		T4	4
valid_sources[0x16]	223551	1			T1	57		T2	66		T4	13
valid_sources[0x17]	286856	1			T1	48		T2	76		T4	15
valid_sources[0x18]	223255	1			T1	44		T2	19		T4	6
valid_sources[0x19]	220589	1			T1	45		T2	45		T4	10
valid_sources[0x1a]	223032	1			T1	45		T2	57		T4	11
valid_sources[0x1b]	219683	1			T1	39		T2	32		T4	12
valid_sources[0x1c]	220752	1			T1	46		T2	25		T4	5
valid_sources[0x1d]	246534	1			T1	45		T2	54		T4	7
valid_sources[0x1e]	221974	1			T1	37		T2	40		T4	12
valid_sources[0x1f]	276853	1			T1	56		T2	9		T4	3
valid_sources[0x20]	314477	1			T1	43		T2	8		T4	8
valid_sources[0x21]	254166	1			T1	40		T2	105		T4	8
valid_sources[0x22]	224114	1			T1	48		T2	37		T4	8
valid_sources[0x23]	218596	1			T1	47		T2	98		T4	11
valid_sources[0x24]	222736	1			T1	33		T2	51		T4	10
valid_sources[0x25]	975594	1			T1	49		T2	30		T4	10
valid_sources[0x26]	260016	1			T1	65		T2	13		T4	7
valid_sources[0x27]	224899	1			T1	48		T2	27		T4	6
valid_sources[0x28]	546122	1			T1	50		T2	74		T4	6
valid_sources[0x29]	220552	1			T1	44		T2	48		T4	7
valid_sources[0x2a]	292155	1			T1	45		T2	47		T4	9
valid_sources[0x2b]	223739	1			T1	39		T2	66		T4	5
valid_sources[0x2c]	222289	1			T1	56		T2	58		T4	14
valid_sources[0x2d]	267001	1			T1	56		T2	40		T4	6
valid_sources[0x2e]	249070	1			T1	45		T2	89		T4	9
valid_sources[0x2f]	221568	1			T1	44		T2	59		T4	13
valid_sources[0x30]	234171	1			T1	45		T2	41		T4	13
valid_sources[0x31]	460273	1			T1	44		T4	7		T10	156
valid_sources[0x32]	2720984	1			T1	58		T2	52		T4	10
valid_sources[0x33]	352530	1			T1	40		T2	37		T4	8
valid_sources[0x34]	222926	1			T1	65		T2	166		T4	9
valid_sources[0x35]	225701	1			T1	51		T2	14		T4	5
valid_sources[0x36]	443335	1			T1	54		T2	130		T4	15
valid_sources[0x37]	222215	1			T1	46		T2	106		T4	8
valid_sources[0x38]	1942617	1			T1	56		T2	34		T4	2
valid_sources[0x39]	221153	1			T1	39		T2	41		T4	8
valid_sources[0x3a]	340072	1			T1	44		T2	74		T4	12
valid_sources[0x3b]	222940	1			T1	47		T2	50		T4	4
valid_sources[0x3c]	286919	1			T1	47		T2	42		T4	11
valid_sources[0x3d]	228503	1			T1	43		T2	29		T4	3
valid_sources[0x3e]	233203	1			T1	60		T2	23		T4	9
valid_sources[0x3f]	222683	1			T1	44		T2	52		T4	10
valid_sources[0x40]	219444	1			T1	48		T2	95		T16	6
valid_sources[0x41]	226763	1			T1	44		T2	60		T4	8
valid_sources[0x42]	219959	1			T1	55		T2	49		T4	11
valid_sources[0x43]	231736	1			T1	42		T2	22		T4	6
valid_sources[0x44]	223361	1			T1	51		T2	41		T4	8
valid_sources[0x45]	222318	1			T1	52		T2	57		T4	17
valid_sources[0x46]	219791	1			T1	47		T2	67		T4	12
valid_sources[0x47]	250803	1			T1	34		T2	29		T4	18
valid_sources[0x48]	366316	1			T1	48		T2	75		T4	11
valid_sources[0x49]	219017	1			T1	44		T2	32		T4	11
valid_sources[0x4a]	221485	1			T1	60		T2	25		T4	11
valid_sources[0x4b]	219823	1			T1	32		T2	95		T4	14
valid_sources[0x4c]	222797	1			T1	43		T2	36		T4	4
valid_sources[0x4d]	293112	1			T1	46		T2	84		T4	16
valid_sources[0x4e]	220203	1			T1	40		T2	32		T4	14
valid_sources[0x4f]	224290	1			T1	54		T2	59		T4	16
valid_sources[0x50]	230531	1			T1	45		T2	80		T4	3
valid_sources[0x51]	358681	1			T1	49		T2	54		T4	7
valid_sources[0x52]	218067	1			T1	47		T2	42		T4	9
valid_sources[0x53]	223255	1			T1	47		T2	67		T4	13
valid_sources[0x54]	234882	1			T1	43		T2	70		T4	7
valid_sources[0x55]	224733	1			T1	55		T2	33		T4	1
valid_sources[0x56]	221956	1			T1	52		T2	42		T4	18
valid_sources[0x57]	219343	1			T1	41		T2	32		T4	9
valid_sources[0x58]	221873	1			T1	55		T2	69		T4	18
valid_sources[0x59]	220943	1			T1	43		T2	118		T4	10
valid_sources[0x5a]	277282	1			T1	44		T2	18		T4	12
valid_sources[0x5b]	330132	1			T1	34		T2	87		T4	15
valid_sources[0x5c]	237686	1			T1	40		T2	15		T4	9
valid_sources[0x5d]	219884	1			T1	57		T2	53		T4	9
valid_sources[0x5e]	363777	1			T1	48		T2	27		T3	27298
valid_sources[0x5f]	302279	1			T1	42		T2	111		T4	6
valid_sources[0x60]	220480	1			T1	50		T2	70		T4	10
valid_sources[0x61]	312543	1			T1	48		T2	49		T4	17
valid_sources[0x62]	220839	1			T1	55		T2	104		T4	7
valid_sources[0x63]	233635	1			T1	32		T2	39		T4	3
valid_sources[0x64]	286948	1			T1	50		T2	13		T4	14
valid_sources[0x65]	222025	1			T1	47		T2	53		T4	6
valid_sources[0x66]	318853	1			T1	44		T2	37		T4	7
valid_sources[0x67]	312888	1			T1	51		T2	23		T4	12
valid_sources[0x68]	2258705	1			T1	46		T2	95		T4	12
valid_sources[0x69]	220879	1			T1	42		T2	114		T4	12
valid_sources[0x6a]	220338	1			T1	48		T2	53		T4	7
valid_sources[0x6b]	222346	1			T1	47		T2	87		T4	12
valid_sources[0x6c]	222935	1			T1	59		T2	99		T4	3
valid_sources[0x6d]	220962	1			T1	53		T2	32		T4	11
valid_sources[0x6e]	241352	1			T1	77		T2	16		T4	9
valid_sources[0x6f]	221985	1			T1	56		T2	13		T4	9
valid_sources[0x70]	293480	1			T1	49		T2	38		T4	19
valid_sources[0x71]	227765	1			T1	39		T2	66		T4	18
valid_sources[0x72]	220189	1			T1	50		T2	59		T4	1
valid_sources[0x73]	221231	1			T1	57		T2	68		T4	5
valid_sources[0x74]	223722	1			T1	42		T2	7		T4	9
valid_sources[0x75]	249148	1			T1	61		T2	51		T4	10
valid_sources[0x76]	221566	1			T1	41		T2	90		T4	5
valid_sources[0x77]	223768	1			T1	47		T2	80		T15	1
valid_sources[0x78]	220224	1			T1	43		T2	27		T4	8
valid_sources[0x79]	227849	1			T1	41		T2	28		T4	12
valid_sources[0x7a]	222261	1			T1	54		T2	47		T4	6
valid_sources[0x7b]	221332	1			T1	45		T2	79		T4	14
valid_sources[0x7c]	261838	1			T1	54		T2	74		T4	10
valid_sources[0x7d]	234753	1			T1	54		T2	28		T4	7
valid_sources[0x7e]	309322	1			T1	39		T2	83		T4	10
valid_sources[0x7f]	332137	1			T1	47		T2	87		T4	1
valid_sources[0x80]	222015	1			T1	39		T2	34		T4	7

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18246401

1

T1

3009

T2

3408

T3

5607

values[0x0]

all_enables

biggest_size

10302965

1

T1

1329

T2

1816

T3

5762

values[0x1]

all_enables

biggest_size

8780937

1

T1

1076

T2

1706

T3

5307