Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_10/hmac-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34994838	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33650395

1

T1

1845

T2

18410

T21

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	32572042	1			T1	1865		T2	12443		T3	1
values[0x0]	16958869	1			T1	793		T2	8548		T21	8
values[0x1]	19114322	1			T1	944		T2	9196		T21	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	26982307	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

41662926

1

T1

2287

T2

20761

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	248354	1			T1	14		T4	32		T9	33
valid_sources[0x01]	244574	1			T1	12		T4	39		T9	29
valid_sources[0x02]	222633	1			T1	17		T4	34		T9	30
valid_sources[0x03]	224141	1			T1	16		T4	58		T9	30
valid_sources[0x04]	263803	1			T1	16		T4	63		T9	40
valid_sources[0x05]	233880	1			T1	18		T4	33		T9	30
valid_sources[0x06]	225075	1			T1	13		T4	72		T9	27
valid_sources[0x07]	224097	1			T1	11		T4	43		T9	38
valid_sources[0x08]	225044	1			T1	16		T21	1		T4	52
valid_sources[0x09]	222660	1			T1	11		T4	45		T9	39
valid_sources[0x0a]	240580	1			T1	15		T4	52		T27	2
valid_sources[0x0b]	424131	1			T1	15		T4	44		T9	29
valid_sources[0x0c]	220799	1			T1	20		T4	37		T9	20
valid_sources[0x0d]	223753	1			T1	17		T4	39		T9	51
valid_sources[0x0e]	221271	1			T1	11		T4	45		T9	28
valid_sources[0x0f]	230140	1			T1	19		T4	36		T9	26
valid_sources[0x10]	342934	1			T1	12		T4	50		T9	50
valid_sources[0x11]	236236	1			T1	17		T4	53		T9	50
valid_sources[0x12]	286498	1			T1	18		T4	57		T9	47
valid_sources[0x13]	222535	1			T1	16		T4	33		T9	29
valid_sources[0x14]	257587	1			T1	12		T4	45		T9	28
valid_sources[0x15]	221274	1			T1	20		T4	50		T27	1
valid_sources[0x16]	243771	1			T1	14		T4	61		T9	39
valid_sources[0x17]	225805	1			T1	13		T4	28		T9	34
valid_sources[0x18]	611963	1			T1	11		T4	45		T9	25
valid_sources[0x19]	223239	1			T1	7		T4	29		T9	22
valid_sources[0x1a]	221246	1			T1	15		T4	55		T9	29
valid_sources[0x1b]	614100	1			T1	21		T4	42		T9	39
valid_sources[0x1c]	221967	1			T1	17		T4	30		T9	39
valid_sources[0x1d]	222196	1			T1	19		T4	41		T9	33
valid_sources[0x1e]	222033	1			T1	14		T4	30		T9	35
valid_sources[0x1f]	223800	1			T1	15		T4	59		T9	34
valid_sources[0x20]	361078	1			T1	14		T4	41		T9	44
valid_sources[0x21]	222760	1			T1	23		T4	46		T9	25
valid_sources[0x22]	222150	1			T1	17		T4	35		T9	25
valid_sources[0x23]	638127	1			T1	13		T4	55		T9	17
valid_sources[0x24]	377693	1			T1	14		T4	33		T9	16
valid_sources[0x25]	223284	1			T1	22		T4	40		T9	44
valid_sources[0x26]	226467	1			T1	18		T4	33		T27	2
valid_sources[0x27]	273438	1			T1	24		T4	46		T9	35
valid_sources[0x28]	285748	1			T1	16		T4	38		T9	21
valid_sources[0x29]	223745	1			T1	12		T4	38		T9	27
valid_sources[0x2a]	224207	1			T1	14		T4	48		T9	53
valid_sources[0x2b]	408273	1			T1	7		T4	54		T9	23
valid_sources[0x2c]	223300	1			T1	11		T4	30		T9	23
valid_sources[0x2d]	227131	1			T1	13		T4	53		T9	29
valid_sources[0x2e]	223530	1			T1	18		T4	27		T9	27
valid_sources[0x2f]	225766	1			T1	17		T4	31		T9	27
valid_sources[0x30]	223484	1			T1	18		T4	27		T9	21
valid_sources[0x31]	250493	1			T1	8		T21	1		T4	40
valid_sources[0x32]	312641	1			T1	18		T4	48		T9	28
valid_sources[0x33]	233669	1			T1	18		T4	65		T9	28
valid_sources[0x34]	339806	1			T1	15		T4	64		T9	24
valid_sources[0x35]	240094	1			T1	10		T4	28		T9	16
valid_sources[0x36]	222718	1			T1	13		T4	38		T9	24
valid_sources[0x37]	223081	1			T1	10		T4	45		T9	37
valid_sources[0x38]	220534	1			T1	18		T4	34		T9	36
valid_sources[0x39]	223576	1			T1	14		T4	35		T9	24
valid_sources[0x3a]	316631	1			T1	23		T4	54		T9	24
valid_sources[0x3b]	227018	1			T1	11		T4	42		T9	33
valid_sources[0x3c]	227930	1			T1	8		T4	44		T9	48
valid_sources[0x3d]	320978	1			T1	17		T21	1		T4	47
valid_sources[0x3e]	284937	1			T1	15		T4	41		T9	60
valid_sources[0x3f]	221841	1			T1	11		T4	30		T9	32
valid_sources[0x40]	266223	1			T1	12		T4	42		T9	28
valid_sources[0x41]	349049	1			T1	12		T4	48		T9	22
valid_sources[0x42]	224137	1			T1	11		T4	35		T9	41
valid_sources[0x43]	226187	1			T1	11		T4	47		T9	40
valid_sources[0x44]	257065	1			T1	21		T4	45		T9	47
valid_sources[0x45]	258080	1			T1	11		T4	44		T9	38
valid_sources[0x46]	224407	1			T1	21		T4	46		T9	42
valid_sources[0x47]	221855	1			T1	16		T4	58		T9	27
valid_sources[0x48]	232829	1			T1	11		T4	62		T9	32
valid_sources[0x49]	224257	1			T1	13		T4	44		T9	45
valid_sources[0x4a]	219760	1			T1	20		T26	1		T4	29
valid_sources[0x4b]	340187	1			T1	16		T3	1		T4	49
valid_sources[0x4c]	224624	1			T1	17		T4	50		T9	44
valid_sources[0x4d]	232332	1			T1	13		T4	35		T9	46
valid_sources[0x4e]	433036	1			T1	16		T4	38		T9	46
valid_sources[0x4f]	222288	1			T1	18		T4	39		T9	32
valid_sources[0x50]	303305	1			T1	8		T4	66		T9	23
valid_sources[0x51]	222189	1			T1	12		T4	22		T9	33
valid_sources[0x52]	223240	1			T1	26		T4	41		T9	28
valid_sources[0x53]	221890	1			T1	14		T4	55		T9	19
valid_sources[0x54]	222809	1			T1	19		T4	47		T9	28
valid_sources[0x55]	223522	1			T1	22		T4	60		T9	32
valid_sources[0x56]	224781	1			T1	13		T21	1		T4	53
valid_sources[0x57]	225473	1			T1	14		T4	35		T9	42
valid_sources[0x58]	224023	1			T1	7		T4	30		T9	27
valid_sources[0x59]	222074	1			T1	10		T4	44		T9	31
valid_sources[0x5a]	222825	1			T1	7		T4	57		T9	39
valid_sources[0x5b]	224996	1			T1	15		T4	40		T9	33
valid_sources[0x5c]	263910	1			T1	2		T4	37		T9	20
valid_sources[0x5d]	222158	1			T1	18		T4	46		T27	1
valid_sources[0x5e]	336732	1			T1	7		T4	35		T9	34
valid_sources[0x5f]	253494	1			T1	17		T4	33		T9	40
valid_sources[0x60]	222305	1			T1	11		T4	36		T9	31
valid_sources[0x61]	290643	1			T1	10		T4	50		T9	28
valid_sources[0x62]	221976	1			T1	4		T4	62		T9	24
valid_sources[0x63]	222931	1			T1	9		T4	26		T9	48
valid_sources[0x64]	222496	1			T1	12		T4	52		T9	20
valid_sources[0x65]	223582	1			T1	17		T4	49		T9	19
valid_sources[0x66]	231324	1			T1	17		T4	50		T9	31
valid_sources[0x67]	223999	1			T1	11		T4	49		T9	31
valid_sources[0x68]	221280	1			T1	12		T4	40		T9	35
valid_sources[0x69]	229208	1			T1	15		T4	41		T9	25
valid_sources[0x6a]	1021553	1			T1	18		T4	31		T9	21
valid_sources[0x6b]	225153	1			T1	10		T4	29		T9	23
valid_sources[0x6c]	299809	1			T1	17		T21	3		T4	35
valid_sources[0x6d]	224267	1			T1	15		T4	45		T9	37
valid_sources[0x6e]	220585	1			T1	17		T4	34		T9	47
valid_sources[0x6f]	239923	1			T1	11		T4	35		T9	36
valid_sources[0x70]	223550	1			T1	15		T4	36		T9	37
valid_sources[0x71]	250394	1			T1	13		T4	40		T9	15
valid_sources[0x72]	221678	1			T1	10		T4	41		T9	25
valid_sources[0x73]	222824	1			T1	15		T4	52		T9	32
valid_sources[0x74]	223070	1			T1	15		T4	33		T9	45
valid_sources[0x75]	224954	1			T1	18		T4	40		T27	1
valid_sources[0x76]	222903	1			T1	9		T4	32		T9	19
valid_sources[0x77]	501198	1			T1	18		T4	35		T9	36
valid_sources[0x78]	224671	1			T1	13		T4	30		T9	27
valid_sources[0x79]	344019	1			T1	12		T4	40		T9	41
valid_sources[0x7a]	222654	1			T1	15		T21	2		T4	42
valid_sources[0x7b]	334377	1			T1	8		T4	34		T9	38
valid_sources[0x7c]	223989	1			T1	16		T4	25		T9	28
valid_sources[0x7d]	224878	1			T1	13		T4	64		T27	1
valid_sources[0x7e]	222760	1			T1	14		T4	43		T9	32
valid_sources[0x7f]	222473	1			T1	11		T4	34		T9	41
valid_sources[0x80]	329770	1			T1	18		T4	35		T9	30

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16099895

1

T1

861

T2

6169

T21

1

values[0x0]

all_enables

biggest_size

9440836

1

T1

500

T2

6293

T21

1

values[0x1]

all_enables

biggest_size

8109664

1

T1

484

T2

5948

T21

1