Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.04 99.07 96.52 100.00 93.04 98.13 100.00 92.54


Total tests in report: 1632
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
71.45 71.45 87.55 87.55 74.70 74.70 92.84 92.84 24.35 24.35 81.67 81.67 91.69 91.69 47.37 47.37 /workspace/coverage/default/40.i2c_host_fifo_watermark.1536870246
81.31 9.85 95.61 8.06 82.33 7.63 94.05 1.21 53.04 28.70 94.40 12.73 93.30 1.61 56.41 9.03 /workspace/coverage/default/5.i2c_target_stretch.3572310426
85.82 4.52 95.61 0.00 82.46 0.13 94.05 0.00 83.48 30.43 94.40 0.00 93.30 0.00 57.46 1.05 /workspace/coverage/default/0.i2c_target_glitch.661812187
90.09 4.27 97.27 1.66 90.29 7.83 96.36 2.31 83.48 0.00 94.84 0.44 93.30 0.00 75.11 17.65 /workspace/coverage/default/8.i2c_host_stress_all.3020686262
91.62 1.53 97.31 0.05 92.37 2.07 97.33 0.97 83.48 0.00 94.95 0.11 97.32 4.02 78.57 3.47 /workspace/coverage/cover_reg_top/13.i2c_tl_errors.2915151225
92.70 1.08 97.71 0.39 92.57 0.20 97.33 0.00 86.09 2.61 95.61 0.66 97.32 0.00 82.25 3.68 /workspace/coverage/default/42.i2c_host_stress_all.4128545660
93.39 0.69 98.14 0.44 93.57 1.00 97.57 0.24 86.09 0.00 96.82 1.21 97.59 0.27 83.93 1.68 /workspace/coverage/default/20.i2c_host_override.1971414972
93.93 0.54 98.19 0.05 94.31 0.74 97.57 0.00 87.83 1.74 97.04 0.22 97.59 0.00 84.98 1.05 /workspace/coverage/default/3.i2c_target_stress_all.1417014866
94.41 0.48 98.24 0.05 94.51 0.20 99.76 2.18 87.83 0.00 97.15 0.11 97.86 0.27 85.50 0.53 /workspace/coverage/default/2.i2c_sec_cm.2805461180
94.78 0.38 98.58 0.34 94.65 0.13 99.76 0.00 89.57 1.74 97.48 0.33 97.86 0.00 85.61 0.11 /workspace/coverage/default/16.i2c_host_mode_toggle.4288918814
95.15 0.37 98.63 0.05 94.78 0.13 99.76 0.00 90.43 0.87 97.59 0.11 98.12 0.27 86.76 1.16 /workspace/coverage/default/46.i2c_host_stress_all.3315678442
95.44 0.29 98.83 0.20 94.98 0.20 99.76 0.00 91.30 0.87 97.91 0.33 98.12 0.00 87.18 0.42 /workspace/coverage/default/7.i2c_host_stress_all.184070323
95.69 0.24 98.83 0.00 94.98 0.00 99.76 0.00 91.30 0.00 97.91 0.00 99.73 1.61 87.29 0.11 /workspace/coverage/cover_reg_top/2.i2c_csr_rw.1209567967
95.89 0.21 98.88 0.05 95.18 0.20 99.76 0.00 92.17 0.87 98.02 0.11 99.73 0.00 87.50 0.21 /workspace/coverage/default/19.i2c_target_bad_addr.3832964944
96.04 0.15 98.88 0.00 95.52 0.33 99.76 0.00 92.17 0.00 98.02 0.00 99.73 0.00 88.24 0.74 /workspace/coverage/cover_reg_top/16.i2c_tl_intg_err.934825407
96.17 0.12 98.88 0.00 95.52 0.00 99.76 0.00 93.04 0.87 98.02 0.00 99.73 0.00 88.24 0.00 /workspace/coverage/default/0.i2c_target_hrst.1053750965
96.28 0.11 99.07 0.20 95.72 0.20 100.00 0.24 93.04 0.00 98.13 0.11 99.73 0.00 88.24 0.00 /workspace/coverage/default/39.i2c_alert_test.783490899
96.38 0.10 99.07 0.00 95.78 0.07 100.00 0.00 93.04 0.00 98.13 0.00 99.73 0.00 88.87 0.63 /workspace/coverage/default/39.i2c_target_stress_all.3940851667
96.45 0.08 99.07 0.00 95.92 0.13 100.00 0.00 93.04 0.00 98.13 0.00 99.73 0.00 89.29 0.42 /workspace/coverage/default/18.i2c_host_fifo_reset_fmt.703506743
96.53 0.08 99.07 0.00 95.92 0.00 100.00 0.00 93.04 0.00 98.13 0.00 99.73 0.00 89.81 0.53 /workspace/coverage/default/45.i2c_host_stress_all.2697565806
96.59 0.06 99.07 0.00 95.92 0.00 100.00 0.00 93.04 0.00 98.13 0.00 99.73 0.00 90.23 0.42 /workspace/coverage/default/14.i2c_target_stress_wr.1390200989
96.65 0.06 99.07 0.00 95.92 0.00 100.00 0.00 93.04 0.00 98.13 0.00 99.73 0.00 90.65 0.42 /workspace/coverage/default/22.i2c_host_perf.4013022601
96.69 0.04 99.07 0.00 95.98 0.07 100.00 0.00 93.04 0.00 98.13 0.00 99.73 0.00 90.86 0.21 /workspace/coverage/default/25.i2c_host_stress_all.552651249
96.73 0.04 99.07 0.00 95.98 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.27 90.86 0.00 /workspace/coverage/cover_reg_top/0.i2c_csr_aliasing.3560059656
96.76 0.03 99.07 0.00 95.98 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.07 0.21 /workspace/coverage/default/10.i2c_host_stress_all.2718381813
96.79 0.03 99.07 0.00 95.98 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.28 0.21 /workspace/coverage/default/18.i2c_target_hrst.2675286669
96.82 0.03 99.07 0.00 95.98 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.49 0.21 /workspace/coverage/default/48.i2c_target_stress_all.774675098
96.85 0.03 99.07 0.00 96.18 0.20 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.49 0.00 /workspace/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.3318912476
96.87 0.02 99.07 0.00 96.25 0.07 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.60 0.11 /workspace/coverage/cover_reg_top/12.i2c_tl_intg_err.1982710202
96.89 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.70 0.11 /workspace/coverage/cover_reg_top/4.i2c_tl_intg_err.2359532338
96.90 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.81 0.11 /workspace/coverage/default/0.i2c_host_fifo_overflow.4044579129
96.92 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 91.91 0.11 /workspace/coverage/default/1.i2c_host_stress_all.2892008918
96.93 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.02 0.11 /workspace/coverage/default/10.i2c_host_rx_oversample.3307334949
96.95 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.12 0.11 /workspace/coverage/default/13.i2c_host_fifo_reset_rx.2474045120
96.96 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.23 0.11 /workspace/coverage/default/14.i2c_host_stress_all.2114069468
96.98 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.33 0.11 /workspace/coverage/default/15.i2c_host_fifo_overflow.746583255
96.99 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.44 0.11 /workspace/coverage/default/16.i2c_target_fifo_reset_acq.1360158722
97.01 0.02 99.07 0.00 96.25 0.00 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.54 0.11 /workspace/coverage/default/48.i2c_host_stress_all.2625844250
97.02 0.01 99.07 0.00 96.32 0.07 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.54 0.00 /workspace/coverage/cover_reg_top/15.i2c_tl_intg_err.3421065950
97.03 0.01 99.07 0.00 96.39 0.07 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.54 0.00 /workspace/coverage/cover_reg_top/18.i2c_tl_intg_err.1373903457
97.03 0.01 99.07 0.00 96.45 0.07 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.54 0.00 /workspace/coverage/default/11.i2c_host_mode_toggle.1006316723
97.04 0.01 99.07 0.00 96.52 0.07 100.00 0.00 93.04 0.00 98.13 0.00 100.00 0.00 92.54 0.00 /workspace/coverage/default/14.i2c_target_fifo_reset_acq.2872745826

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.i2c_csr_bit_bash.3680903416
/workspace/coverage/cover_reg_top/0.i2c_csr_hw_reset.117397352
/workspace/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.682486052
/workspace/coverage/cover_reg_top/0.i2c_csr_rw.1290701096
/workspace/coverage/cover_reg_top/0.i2c_intr_test.4257736673
/workspace/coverage/cover_reg_top/0.i2c_same_csr_outstanding.3241845464
/workspace/coverage/cover_reg_top/0.i2c_tl_errors.2388100547
/workspace/coverage/cover_reg_top/0.i2c_tl_intg_err.2856297022
/workspace/coverage/cover_reg_top/1.i2c_csr_aliasing.2172318677
/workspace/coverage/cover_reg_top/1.i2c_csr_bit_bash.1424957855
/workspace/coverage/cover_reg_top/1.i2c_csr_hw_reset.4161662513
/workspace/coverage/cover_reg_top/1.i2c_csr_rw.3561609962
/workspace/coverage/cover_reg_top/1.i2c_intr_test.1460197160
/workspace/coverage/cover_reg_top/1.i2c_same_csr_outstanding.1235129114
/workspace/coverage/cover_reg_top/1.i2c_tl_errors.350195654
/workspace/coverage/cover_reg_top/1.i2c_tl_intg_err.2679852947
/workspace/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.557823365
/workspace/coverage/cover_reg_top/10.i2c_csr_rw.545983714
/workspace/coverage/cover_reg_top/10.i2c_intr_test.2290097995
/workspace/coverage/cover_reg_top/10.i2c_same_csr_outstanding.662857645
/workspace/coverage/cover_reg_top/10.i2c_tl_errors.875897845
/workspace/coverage/cover_reg_top/10.i2c_tl_intg_err.1435171364
/workspace/coverage/cover_reg_top/11.i2c_csr_mem_rw_with_rand_reset.3953666283
/workspace/coverage/cover_reg_top/11.i2c_csr_rw.4047143879
/workspace/coverage/cover_reg_top/11.i2c_intr_test.4258747570
/workspace/coverage/cover_reg_top/11.i2c_same_csr_outstanding.2986711573
/workspace/coverage/cover_reg_top/11.i2c_tl_errors.3174246410
/workspace/coverage/cover_reg_top/11.i2c_tl_intg_err.3768386978
/workspace/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.2864711554
/workspace/coverage/cover_reg_top/12.i2c_csr_rw.3172424655
/workspace/coverage/cover_reg_top/12.i2c_intr_test.727101227
/workspace/coverage/cover_reg_top/12.i2c_same_csr_outstanding.2911997716
/workspace/coverage/cover_reg_top/12.i2c_tl_errors.3640717415
/workspace/coverage/cover_reg_top/13.i2c_csr_mem_rw_with_rand_reset.4293195210
/workspace/coverage/cover_reg_top/13.i2c_csr_rw.220547398
/workspace/coverage/cover_reg_top/13.i2c_intr_test.2973501622
/workspace/coverage/cover_reg_top/13.i2c_same_csr_outstanding.2120014688
/workspace/coverage/cover_reg_top/13.i2c_tl_intg_err.3870998814
/workspace/coverage/cover_reg_top/14.i2c_csr_mem_rw_with_rand_reset.1583642396
/workspace/coverage/cover_reg_top/14.i2c_csr_rw.2095104781
/workspace/coverage/cover_reg_top/14.i2c_intr_test.552217306
/workspace/coverage/cover_reg_top/14.i2c_same_csr_outstanding.703840212
/workspace/coverage/cover_reg_top/14.i2c_tl_errors.3458183798
/workspace/coverage/cover_reg_top/14.i2c_tl_intg_err.537381756
/workspace/coverage/cover_reg_top/15.i2c_csr_mem_rw_with_rand_reset.3723586891
/workspace/coverage/cover_reg_top/15.i2c_csr_rw.2563569999
/workspace/coverage/cover_reg_top/15.i2c_intr_test.4268105882
/workspace/coverage/cover_reg_top/15.i2c_same_csr_outstanding.653209038
/workspace/coverage/cover_reg_top/15.i2c_tl_errors.3479319615
/workspace/coverage/cover_reg_top/16.i2c_csr_mem_rw_with_rand_reset.202950516
/workspace/coverage/cover_reg_top/16.i2c_csr_rw.305161838
/workspace/coverage/cover_reg_top/16.i2c_intr_test.682252760
/workspace/coverage/cover_reg_top/16.i2c_same_csr_outstanding.4102759757
/workspace/coverage/cover_reg_top/16.i2c_tl_errors.2025487203
/workspace/coverage/cover_reg_top/17.i2c_csr_mem_rw_with_rand_reset.2042420606
/workspace/coverage/cover_reg_top/17.i2c_csr_rw.3504297863
/workspace/coverage/cover_reg_top/17.i2c_intr_test.887713470
/workspace/coverage/cover_reg_top/17.i2c_same_csr_outstanding.1844727074
/workspace/coverage/cover_reg_top/17.i2c_tl_errors.1121638862
/workspace/coverage/cover_reg_top/17.i2c_tl_intg_err.3612762599
/workspace/coverage/cover_reg_top/18.i2c_csr_mem_rw_with_rand_reset.2630319767
/workspace/coverage/cover_reg_top/18.i2c_csr_rw.702764674
/workspace/coverage/cover_reg_top/18.i2c_intr_test.2527313503
/workspace/coverage/cover_reg_top/18.i2c_same_csr_outstanding.1484895620
/workspace/coverage/cover_reg_top/18.i2c_tl_errors.2681454657
/workspace/coverage/cover_reg_top/19.i2c_csr_mem_rw_with_rand_reset.3689295032
/workspace/coverage/cover_reg_top/19.i2c_csr_rw.578600243
/workspace/coverage/cover_reg_top/19.i2c_intr_test.978143266
/workspace/coverage/cover_reg_top/19.i2c_same_csr_outstanding.6443569
/workspace/coverage/cover_reg_top/19.i2c_tl_errors.2481378503
/workspace/coverage/cover_reg_top/19.i2c_tl_intg_err.3893857220
/workspace/coverage/cover_reg_top/2.i2c_csr_aliasing.1955804927
/workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.4198798996
/workspace/coverage/cover_reg_top/2.i2c_csr_hw_reset.1771991414
/workspace/coverage/cover_reg_top/2.i2c_csr_mem_rw_with_rand_reset.4032922089
/workspace/coverage/cover_reg_top/2.i2c_intr_test.2911005296
/workspace/coverage/cover_reg_top/2.i2c_same_csr_outstanding.4157099760
/workspace/coverage/cover_reg_top/2.i2c_tl_errors.2793114039
/workspace/coverage/cover_reg_top/2.i2c_tl_intg_err.2582986653
/workspace/coverage/cover_reg_top/20.i2c_intr_test.3868153579
/workspace/coverage/cover_reg_top/21.i2c_intr_test.755468268
/workspace/coverage/cover_reg_top/22.i2c_intr_test.4115841688
/workspace/coverage/cover_reg_top/23.i2c_intr_test.599829719
/workspace/coverage/cover_reg_top/24.i2c_intr_test.1977881636
/workspace/coverage/cover_reg_top/25.i2c_intr_test.121270157
/workspace/coverage/cover_reg_top/26.i2c_intr_test.1177982511
/workspace/coverage/cover_reg_top/27.i2c_intr_test.1686590254
/workspace/coverage/cover_reg_top/28.i2c_intr_test.3090701867
/workspace/coverage/cover_reg_top/29.i2c_intr_test.1223418565
/workspace/coverage/cover_reg_top/3.i2c_csr_aliasing.4283691577
/workspace/coverage/cover_reg_top/3.i2c_csr_bit_bash.3220039090
/workspace/coverage/cover_reg_top/3.i2c_csr_hw_reset.1372169599
/workspace/coverage/cover_reg_top/3.i2c_csr_mem_rw_with_rand_reset.1142359848
/workspace/coverage/cover_reg_top/3.i2c_csr_rw.547028926
/workspace/coverage/cover_reg_top/3.i2c_intr_test.751650425
/workspace/coverage/cover_reg_top/3.i2c_same_csr_outstanding.1218057084
/workspace/coverage/cover_reg_top/3.i2c_tl_errors.978851298
/workspace/coverage/cover_reg_top/3.i2c_tl_intg_err.3862254821
/workspace/coverage/cover_reg_top/30.i2c_intr_test.4139290592
/workspace/coverage/cover_reg_top/31.i2c_intr_test.3401014427
/workspace/coverage/cover_reg_top/32.i2c_intr_test.899502785
/workspace/coverage/cover_reg_top/33.i2c_intr_test.1884408635
/workspace/coverage/cover_reg_top/34.i2c_intr_test.1074991669
/workspace/coverage/cover_reg_top/35.i2c_intr_test.920391040
/workspace/coverage/cover_reg_top/36.i2c_intr_test.1478355882
/workspace/coverage/cover_reg_top/37.i2c_intr_test.1762865214
/workspace/coverage/cover_reg_top/38.i2c_intr_test.3042018038
/workspace/coverage/cover_reg_top/39.i2c_intr_test.768079785
/workspace/coverage/cover_reg_top/4.i2c_csr_aliasing.1463261793
/workspace/coverage/cover_reg_top/4.i2c_csr_bit_bash.273633881
/workspace/coverage/cover_reg_top/4.i2c_csr_hw_reset.1220211771
/workspace/coverage/cover_reg_top/4.i2c_csr_mem_rw_with_rand_reset.1297172436
/workspace/coverage/cover_reg_top/4.i2c_csr_rw.2813172614
/workspace/coverage/cover_reg_top/4.i2c_intr_test.4152562523
/workspace/coverage/cover_reg_top/4.i2c_same_csr_outstanding.2218908596
/workspace/coverage/cover_reg_top/4.i2c_tl_errors.429208992
/workspace/coverage/cover_reg_top/40.i2c_intr_test.2303882851
/workspace/coverage/cover_reg_top/41.i2c_intr_test.1648752889
/workspace/coverage/cover_reg_top/42.i2c_intr_test.1809183030
/workspace/coverage/cover_reg_top/43.i2c_intr_test.945274524
/workspace/coverage/cover_reg_top/44.i2c_intr_test.372270548
/workspace/coverage/cover_reg_top/45.i2c_intr_test.1144158426
/workspace/coverage/cover_reg_top/46.i2c_intr_test.1127205263
/workspace/coverage/cover_reg_top/47.i2c_intr_test.3801131274
/workspace/coverage/cover_reg_top/48.i2c_intr_test.1585138440
/workspace/coverage/cover_reg_top/49.i2c_intr_test.2412400949
/workspace/coverage/cover_reg_top/5.i2c_csr_mem_rw_with_rand_reset.591946347
/workspace/coverage/cover_reg_top/5.i2c_csr_rw.3140356384
/workspace/coverage/cover_reg_top/5.i2c_intr_test.1632603372
/workspace/coverage/cover_reg_top/5.i2c_same_csr_outstanding.2313305306
/workspace/coverage/cover_reg_top/5.i2c_tl_errors.2801762062
/workspace/coverage/cover_reg_top/5.i2c_tl_intg_err.821166261
/workspace/coverage/cover_reg_top/6.i2c_csr_mem_rw_with_rand_reset.2351812408
/workspace/coverage/cover_reg_top/6.i2c_csr_rw.3747918734
/workspace/coverage/cover_reg_top/6.i2c_intr_test.980961774
/workspace/coverage/cover_reg_top/6.i2c_same_csr_outstanding.3495997168
/workspace/coverage/cover_reg_top/6.i2c_tl_errors.3894894529
/workspace/coverage/cover_reg_top/6.i2c_tl_intg_err.355256515
/workspace/coverage/cover_reg_top/7.i2c_csr_mem_rw_with_rand_reset.2426380670
/workspace/coverage/cover_reg_top/7.i2c_csr_rw.4000921419
/workspace/coverage/cover_reg_top/7.i2c_intr_test.2652571961
/workspace/coverage/cover_reg_top/7.i2c_same_csr_outstanding.3953713621
/workspace/coverage/cover_reg_top/7.i2c_tl_errors.871999283
/workspace/coverage/cover_reg_top/7.i2c_tl_intg_err.1870226153
/workspace/coverage/cover_reg_top/8.i2c_csr_mem_rw_with_rand_reset.1859351642
/workspace/coverage/cover_reg_top/8.i2c_csr_rw.285768034
/workspace/coverage/cover_reg_top/8.i2c_intr_test.626326140
/workspace/coverage/cover_reg_top/8.i2c_same_csr_outstanding.205273576
/workspace/coverage/cover_reg_top/8.i2c_tl_errors.3645160614
/workspace/coverage/cover_reg_top/8.i2c_tl_intg_err.2497472571
/workspace/coverage/cover_reg_top/9.i2c_csr_mem_rw_with_rand_reset.911909967
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/workspace/coverage/default/9.i2c_target_timeout.1008810593
/workspace/coverage/default/9.i2c_target_tx_ovf.2131462620
/workspace/coverage/default/9.i2c_target_unexp_stop.3025513311



Total test records in report: 1632
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/45.i2c_target_stress_wr.871439641 Feb 18 03:12:57 PM PST 24 Feb 18 03:15:22 PM PST 24 32992445137 ps
T2 /workspace/coverage/default/40.i2c_host_fifo_watermark.1536870246 Feb 18 03:11:47 PM PST 24 Feb 18 03:14:37 PM PST 24 10484841601 ps
T3 /workspace/coverage/default/32.i2c_target_stress_wr.1375660431 Feb 18 03:09:48 PM PST 24 Feb 18 03:13:06 PM PST 24 38665399356 ps
T8 /workspace/coverage/default/44.i2c_host_fifo_reset_fmt.3040452627 Feb 18 03:12:40 PM PST 24 Feb 18 03:12:47 PM PST 24 132359178 ps
T7 /workspace/coverage/default/40.i2c_target_unexp_stop.1157745042 Feb 18 03:11:51 PM PST 24 Feb 18 03:12:12 PM PST 24 1817009733 ps
T15 /workspace/coverage/default/5.i2c_target_stretch.3572310426 Feb 18 03:04:58 PM PST 24 Feb 18 03:21:36 PM PST 24 36019382186 ps
T16 /workspace/coverage/default/23.i2c_target_perf.837770099 Feb 18 03:07:56 PM PST 24 Feb 18 03:08:05 PM PST 24 1731142569 ps
T22 /workspace/coverage/default/14.i2c_target_stress_wr.1390200989 Feb 18 03:06:21 PM PST 24 Feb 18 03:12:43 PM PST 24 29717710134 ps
T20 /workspace/coverage/default/15.i2c_target_fifo_reset_tx.44680710 Feb 18 03:06:36 PM PST 24 Feb 18 03:06:48 PM PST 24 10295089274 ps
T23 /workspace/coverage/default/24.i2c_target_smoke.3263152244 Feb 18 03:08:04 PM PST 24 Feb 18 03:08:37 PM PST 24 1129999479 ps
T61 /workspace/coverage/default/48.i2c_target_perf.1692529059 Feb 18 03:13:37 PM PST 24 Feb 18 03:13:49 PM PST 24 662057040 ps
T62 /workspace/coverage/default/12.i2c_target_intr_smoke.886259360 Feb 18 03:06:01 PM PST 24 Feb 18 03:06:11 PM PST 24 6081140232 ps
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