| T1057 |
/workspace/coverage/default/42.i2c_target_intr_stress_wr.3085808934 |
|
|
Mar 28 03:30:00 PM PDT 24 |
Mar 28 03:30:05 PM PDT 24 |
9591103473 ps |
| T1058 |
/workspace/coverage/default/33.i2c_host_fifo_reset_rx.3294588388 |
|
|
Mar 28 03:28:55 PM PDT 24 |
Mar 28 03:28:58 PM PDT 24 |
220376346 ps |
| T1059 |
/workspace/coverage/default/5.i2c_host_mode_toggle.3502413738 |
|
|
Mar 28 03:25:35 PM PDT 24 |
Mar 28 03:26:07 PM PDT 24 |
5135356190 ps |
| T1060 |
/workspace/coverage/default/38.i2c_host_mode_toggle.1594152420 |
|
|
Mar 28 03:29:30 PM PDT 24 |
Mar 28 03:29:59 PM PDT 24 |
1465049149 ps |
| T1061 |
/workspace/coverage/default/22.i2c_target_stretch.1404224426 |
|
|
Mar 28 03:27:32 PM PDT 24 |
Mar 28 03:30:29 PM PDT 24 |
13615725840 ps |
| T1062 |
/workspace/coverage/default/47.i2c_host_override.3868240069 |
|
|
Mar 28 03:30:36 PM PDT 24 |
Mar 28 03:30:37 PM PDT 24 |
18063574 ps |
| T1063 |
/workspace/coverage/default/34.i2c_target_intr_smoke.2159640235 |
|
|
Mar 28 03:29:03 PM PDT 24 |
Mar 28 03:29:07 PM PDT 24 |
522033700 ps |
| T1064 |
/workspace/coverage/default/35.i2c_target_stretch.2870311339 |
|
|
Mar 28 03:29:20 PM PDT 24 |
Mar 28 03:32:08 PM PDT 24 |
17318178487 ps |
| T1065 |
/workspace/coverage/default/27.i2c_host_fifo_watermark.2813884488 |
|
|
Mar 28 03:28:09 PM PDT 24 |
Mar 28 03:33:04 PM PDT 24 |
3790862467 ps |
| T1066 |
/workspace/coverage/default/16.i2c_target_hrst.1248342527 |
|
|
Mar 28 03:26:53 PM PDT 24 |
Mar 28 03:26:55 PM PDT 24 |
261727119 ps |
| T1067 |
/workspace/coverage/default/33.i2c_target_fifo_reset_tx.57967601 |
|
|
Mar 28 03:28:56 PM PDT 24 |
Mar 28 03:30:38 PM PDT 24 |
10074491739 ps |
| T1068 |
/workspace/coverage/default/42.i2c_target_stress_rd.2542205268 |
|
|
Mar 28 03:29:58 PM PDT 24 |
Mar 28 03:30:04 PM PDT 24 |
370107221 ps |
| T1069 |
/workspace/coverage/default/27.i2c_host_fifo_reset_fmt.467058364 |
|
|
Mar 28 03:28:09 PM PDT 24 |
Mar 28 03:28:11 PM PDT 24 |
131609036 ps |
| T1070 |
/workspace/coverage/default/21.i2c_target_stretch.3198233508 |
|
|
Mar 28 03:27:30 PM PDT 24 |
Mar 28 03:28:46 PM PDT 24 |
36213931594 ps |
| T1071 |
/workspace/coverage/default/12.i2c_host_override.3769885859 |
|
|
Mar 28 03:26:19 PM PDT 24 |
Mar 28 03:26:20 PM PDT 24 |
43212481 ps |
| T1072 |
/workspace/coverage/default/21.i2c_target_stress_rd.793577076 |
|
|
Mar 28 03:27:30 PM PDT 24 |
Mar 28 03:27:56 PM PDT 24 |
6488452159 ps |
| T1073 |
/workspace/coverage/default/41.i2c_host_error_intr.1944475954 |
|
|
Mar 28 03:29:53 PM PDT 24 |
Mar 28 03:29:55 PM PDT 24 |
298821573 ps |
| T1074 |
/workspace/coverage/default/47.i2c_target_fifo_reset_acq.3547269899 |
|
|
Mar 28 03:30:35 PM PDT 24 |
Mar 28 03:32:01 PM PDT 24 |
10120971877 ps |
| T1075 |
/workspace/coverage/default/6.i2c_alert_test.119945602 |
|
|
Mar 28 03:25:35 PM PDT 24 |
Mar 28 03:25:36 PM PDT 24 |
14418264 ps |
| T1076 |
/workspace/coverage/default/30.i2c_target_fifo_reset_acq.261929346 |
|
|
Mar 28 03:28:34 PM PDT 24 |
Mar 28 03:30:10 PM PDT 24 |
10083543454 ps |
| T1077 |
/workspace/coverage/default/34.i2c_host_fifo_overflow.334897623 |
|
|
Mar 28 03:28:57 PM PDT 24 |
Mar 28 03:30:19 PM PDT 24 |
2469361853 ps |
| T1078 |
/workspace/coverage/default/0.i2c_target_timeout.4233187001 |
|
|
Mar 28 03:24:49 PM PDT 24 |
Mar 28 03:24:57 PM PDT 24 |
1251660256 ps |
| T1079 |
/workspace/coverage/default/39.i2c_host_perf.3933871080 |
|
|
Mar 28 03:29:35 PM PDT 24 |
Mar 28 03:45:34 PM PDT 24 |
12524673210 ps |
| T65 |
/workspace/coverage/default/27.i2c_target_fifo_reset_tx.3190188204 |
|
|
Mar 28 03:28:13 PM PDT 24 |
Mar 28 03:28:50 PM PDT 24 |
10127398832 ps |
| T1080 |
/workspace/coverage/default/10.i2c_target_stretch.653079699 |
|
|
Mar 28 03:25:57 PM PDT 24 |
Mar 28 03:35:46 PM PDT 24 |
39254318040 ps |
| T1081 |
/workspace/coverage/default/18.i2c_host_smoke.3060524346 |
|
|
Mar 28 03:26:59 PM PDT 24 |
Mar 28 03:27:54 PM PDT 24 |
2229347162 ps |
| T1082 |
/workspace/coverage/default/20.i2c_target_fifo_reset_acq.4133737223 |
|
|
Mar 28 03:27:12 PM PDT 24 |
Mar 28 03:27:30 PM PDT 24 |
10089129481 ps |
| T1083 |
/workspace/coverage/default/18.i2c_host_override.1987036066 |
|
|
Mar 28 03:26:56 PM PDT 24 |
Mar 28 03:26:57 PM PDT 24 |
27131742 ps |
| T1084 |
/workspace/coverage/default/44.i2c_target_hrst.2254908542 |
|
|
Mar 28 03:30:21 PM PDT 24 |
Mar 28 03:30:23 PM PDT 24 |
473632598 ps |
| T1085 |
/workspace/coverage/default/17.i2c_host_override.2740296927 |
|
|
Mar 28 03:26:55 PM PDT 24 |
Mar 28 03:26:56 PM PDT 24 |
18411071 ps |
| T1086 |
/workspace/coverage/default/36.i2c_host_fifo_watermark.2175641344 |
|
|
Mar 28 03:29:17 PM PDT 24 |
Mar 28 03:30:52 PM PDT 24 |
6893800591 ps |
| T1087 |
/workspace/coverage/default/17.i2c_target_smoke.2756120344 |
|
|
Mar 28 03:26:57 PM PDT 24 |
Mar 28 03:27:14 PM PDT 24 |
2053639501 ps |
| T1088 |
/workspace/coverage/default/41.i2c_host_perf.1653071776 |
|
|
Mar 28 03:29:53 PM PDT 24 |
Mar 28 04:15:09 PM PDT 24 |
23250082327 ps |
| T1089 |
/workspace/coverage/default/29.i2c_target_timeout.928527435 |
|
|
Mar 28 03:28:41 PM PDT 24 |
Mar 28 03:28:49 PM PDT 24 |
1477123287 ps |
| T1090 |
/workspace/coverage/default/42.i2c_target_stretch.2944914062 |
|
|
Mar 28 03:29:54 PM PDT 24 |
Mar 28 03:46:55 PM PDT 24 |
33268550417 ps |
| T1091 |
/workspace/coverage/default/10.i2c_host_fifo_full.1560538668 |
|
|
Mar 28 03:25:59 PM PDT 24 |
Mar 28 03:26:41 PM PDT 24 |
1308027303 ps |
| T1092 |
/workspace/coverage/default/24.i2c_host_fifo_overflow.3652043847 |
|
|
Mar 28 03:27:52 PM PDT 24 |
Mar 28 03:28:29 PM PDT 24 |
1308268918 ps |
| T1093 |
/workspace/coverage/default/7.i2c_target_hrst.2222437123 |
|
|
Mar 28 03:25:52 PM PDT 24 |
Mar 28 03:25:55 PM PDT 24 |
3796794396 ps |
| T1094 |
/workspace/coverage/default/21.i2c_host_fifo_full.2973159744 |
|
|
Mar 28 03:27:26 PM PDT 24 |
Mar 28 03:28:19 PM PDT 24 |
3622942725 ps |
| T1095 |
/workspace/coverage/default/30.i2c_host_smoke.1782902699 |
|
|
Mar 28 03:28:33 PM PDT 24 |
Mar 28 03:29:04 PM PDT 24 |
1406962918 ps |
| T1096 |
/workspace/coverage/default/40.i2c_target_timeout.3224018941 |
|
|
Mar 28 03:29:54 PM PDT 24 |
Mar 28 03:30:00 PM PDT 24 |
2075374144 ps |
| T1097 |
/workspace/coverage/default/32.i2c_target_fifo_reset_tx.2986279070 |
|
|
Mar 28 03:28:53 PM PDT 24 |
Mar 28 03:29:27 PM PDT 24 |
10132415980 ps |
| T1098 |
/workspace/coverage/default/24.i2c_host_fifo_full.2346096886 |
|
|
Mar 28 03:27:52 PM PDT 24 |
Mar 28 03:29:42 PM PDT 24 |
3574120941 ps |
| T1099 |
/workspace/coverage/default/45.i2c_target_bad_addr.796567579 |
|
|
Mar 28 03:30:20 PM PDT 24 |
Mar 28 03:30:24 PM PDT 24 |
535089759 ps |
| T1100 |
/workspace/coverage/default/8.i2c_host_smoke.85568432 |
|
|
Mar 28 03:25:51 PM PDT 24 |
Mar 28 03:26:24 PM PDT 24 |
35920819009 ps |
| T1101 |
/workspace/coverage/default/22.i2c_target_hrst.3236489724 |
|
|
Mar 28 03:27:31 PM PDT 24 |
Mar 28 03:27:34 PM PDT 24 |
1526273902 ps |
| T1102 |
/workspace/coverage/default/38.i2c_host_fifo_watermark.2213475376 |
|
|
Mar 28 03:29:31 PM PDT 24 |
Mar 28 03:31:00 PM PDT 24 |
2880373902 ps |
| T164 |
/workspace/coverage/default/10.i2c_host_stress_all.1608556825 |
|
|
Mar 28 03:26:03 PM PDT 24 |
Mar 28 03:40:27 PM PDT 24 |
61373246803 ps |
| T1103 |
/workspace/coverage/default/46.i2c_host_mode_toggle.1279931593 |
|
|
Mar 28 03:30:36 PM PDT 24 |
Mar 28 03:31:23 PM PDT 24 |
24005501852 ps |
| T1104 |
/workspace/coverage/default/28.i2c_host_fifo_watermark.3298642667 |
|
|
Mar 28 03:28:13 PM PDT 24 |
Mar 28 03:32:28 PM PDT 24 |
13839788330 ps |
| T1105 |
/workspace/coverage/default/5.i2c_host_fifo_fmt_empty.1942358663 |
|
|
Mar 28 03:25:18 PM PDT 24 |
Mar 28 03:25:24 PM PDT 24 |
247482424 ps |
| T1106 |
/workspace/coverage/default/37.i2c_host_fifo_overflow.1036854114 |
|
|
Mar 28 03:29:17 PM PDT 24 |
Mar 28 03:30:54 PM PDT 24 |
5168376637 ps |
| T1107 |
/workspace/coverage/default/37.i2c_host_fifo_fmt_empty.1592166417 |
|
|
Mar 28 03:29:17 PM PDT 24 |
Mar 28 03:29:21 PM PDT 24 |
235912526 ps |
| T1108 |
/workspace/coverage/default/38.i2c_host_error_intr.578989545 |
|
|
Mar 28 03:29:32 PM PDT 24 |
Mar 28 03:29:33 PM PDT 24 |
102489824 ps |
| T1109 |
/workspace/coverage/default/2.i2c_host_mode_toggle.2464997782 |
|
|
Mar 28 03:25:03 PM PDT 24 |
Mar 28 03:26:27 PM PDT 24 |
11134654354 ps |
| T1110 |
/workspace/coverage/default/18.i2c_host_fifo_fmt_empty.876820583 |
|
|
Mar 28 03:27:00 PM PDT 24 |
Mar 28 03:27:16 PM PDT 24 |
1226817080 ps |
| T1111 |
/workspace/coverage/default/9.i2c_host_fifo_overflow.3563515173 |
|
|
Mar 28 03:25:53 PM PDT 24 |
Mar 28 03:27:03 PM PDT 24 |
2148975270 ps |
| T1112 |
/workspace/coverage/default/26.i2c_host_fifo_overflow.1660623461 |
|
|
Mar 28 03:27:56 PM PDT 24 |
Mar 28 03:28:44 PM PDT 24 |
1515996162 ps |
| T1113 |
/workspace/coverage/default/44.i2c_host_fifo_full.451023356 |
|
|
Mar 28 03:30:18 PM PDT 24 |
Mar 28 03:30:50 PM PDT 24 |
10770689180 ps |
| T1114 |
/workspace/coverage/default/28.i2c_target_timeout.3677361917 |
|
|
Mar 28 03:28:14 PM PDT 24 |
Mar 28 03:28:22 PM PDT 24 |
2302329608 ps |
| T1115 |
/workspace/coverage/default/48.i2c_target_timeout.1028171502 |
|
|
Mar 28 03:30:41 PM PDT 24 |
Mar 28 03:30:47 PM PDT 24 |
1416000257 ps |
| T1116 |
/workspace/coverage/default/29.i2c_alert_test.1026625028 |
|
|
Mar 28 03:28:32 PM PDT 24 |
Mar 28 03:28:33 PM PDT 24 |
59720016 ps |
| T1117 |
/workspace/coverage/default/28.i2c_host_override.792872703 |
|
|
Mar 28 03:28:14 PM PDT 24 |
Mar 28 03:28:16 PM PDT 24 |
30666079 ps |
| T1118 |
/workspace/coverage/default/49.i2c_host_override.1403236759 |
|
|
Mar 28 03:30:45 PM PDT 24 |
Mar 28 03:30:46 PM PDT 24 |
401185185 ps |
| T1119 |
/workspace/coverage/default/27.i2c_host_smoke.1043023967 |
|
|
Mar 28 03:28:10 PM PDT 24 |
Mar 28 03:28:31 PM PDT 24 |
1262696072 ps |
| T1120 |
/workspace/coverage/default/47.i2c_target_bad_addr.1014495513 |
|
|
Mar 28 03:30:43 PM PDT 24 |
Mar 28 03:30:46 PM PDT 24 |
9485180486 ps |
| T1121 |
/workspace/coverage/default/42.i2c_host_fifo_overflow.44526677 |
|
|
Mar 28 03:29:52 PM PDT 24 |
Mar 28 03:30:30 PM PDT 24 |
2570596551 ps |
| T1122 |
/workspace/coverage/default/7.i2c_host_override.1492489477 |
|
|
Mar 28 03:25:37 PM PDT 24 |
Mar 28 03:25:39 PM PDT 24 |
28857421 ps |
| T1123 |
/workspace/coverage/default/47.i2c_host_fifo_overflow.3484233106 |
|
|
Mar 28 03:30:34 PM PDT 24 |
Mar 28 03:31:14 PM PDT 24 |
1501685819 ps |
| T1124 |
/workspace/coverage/default/35.i2c_host_error_intr.2374707809 |
|
|
Mar 28 03:29:15 PM PDT 24 |
Mar 28 03:29:17 PM PDT 24 |
237295671 ps |
| T1125 |
/workspace/coverage/default/17.i2c_host_fifo_reset_fmt.4015322281 |
|
|
Mar 28 03:26:59 PM PDT 24 |
Mar 28 03:27:00 PM PDT 24 |
477181134 ps |
| T1126 |
/workspace/coverage/default/11.i2c_host_fifo_watermark.964152669 |
|
|
Mar 28 03:26:16 PM PDT 24 |
Mar 28 03:28:54 PM PDT 24 |
34944594686 ps |
| T1127 |
/workspace/coverage/default/30.i2c_target_stretch.2398103953 |
|
|
Mar 28 03:28:39 PM PDT 24 |
Mar 28 03:30:14 PM PDT 24 |
17393744236 ps |
| T1128 |
/workspace/coverage/default/43.i2c_host_fifo_full.2754392857 |
|
|
Mar 28 03:30:18 PM PDT 24 |
Mar 28 03:31:18 PM PDT 24 |
6327129889 ps |
| T1129 |
/workspace/coverage/default/6.i2c_target_hrst.4102707120 |
|
|
Mar 28 03:25:33 PM PDT 24 |
Mar 28 03:25:36 PM PDT 24 |
1072156585 ps |
| T1130 |
/workspace/coverage/default/36.i2c_target_stress_rd.3364661965 |
|
|
Mar 28 03:29:15 PM PDT 24 |
Mar 28 03:30:14 PM PDT 24 |
9586395009 ps |
| T1131 |
/workspace/coverage/default/36.i2c_target_intr_smoke.3664123727 |
|
|
Mar 28 03:29:18 PM PDT 24 |
Mar 28 03:29:23 PM PDT 24 |
873898303 ps |
| T1132 |
/workspace/coverage/default/19.i2c_host_fifo_reset_fmt.4168116862 |
|
|
Mar 28 03:27:15 PM PDT 24 |
Mar 28 03:27:16 PM PDT 24 |
262783445 ps |
| T1133 |
/workspace/coverage/default/5.i2c_target_timeout.3103439099 |
|
|
Mar 28 03:25:35 PM PDT 24 |
Mar 28 03:25:44 PM PDT 24 |
20051754056 ps |
| T1134 |
/workspace/coverage/default/28.i2c_target_smoke.417240207 |
|
|
Mar 28 03:28:16 PM PDT 24 |
Mar 28 03:28:31 PM PDT 24 |
4173051653 ps |
| T1135 |
/workspace/coverage/default/10.i2c_target_intr_stress_wr.4009046588 |
|
|
Mar 28 03:26:03 PM PDT 24 |
Mar 28 03:26:11 PM PDT 24 |
5844721341 ps |
| T1136 |
/workspace/coverage/default/34.i2c_target_bad_addr.2512702792 |
|
|
Mar 28 03:29:18 PM PDT 24 |
Mar 28 03:29:21 PM PDT 24 |
535865331 ps |
| T1137 |
/workspace/coverage/default/13.i2c_target_smoke.3798633971 |
|
|
Mar 28 03:26:17 PM PDT 24 |
Mar 28 03:26:31 PM PDT 24 |
5387275740 ps |
| T79 |
/workspace/coverage/default/6.i2c_target_fifo_reset_acq.3662245488 |
|
|
Mar 28 03:25:36 PM PDT 24 |
Mar 28 03:27:15 PM PDT 24 |
10027890252 ps |
| T1138 |
/workspace/coverage/default/48.i2c_target_fifo_reset_tx.3511297773 |
|
|
Mar 28 03:30:41 PM PDT 24 |
Mar 28 03:30:48 PM PDT 24 |
11071719402 ps |
| T1139 |
/workspace/coverage/default/10.i2c_host_error_intr.2857989282 |
|
|
Mar 28 03:26:02 PM PDT 24 |
Mar 28 03:26:03 PM PDT 24 |
46478765 ps |
| T229 |
/workspace/coverage/default/45.i2c_host_fifo_full.3701536736 |
|
|
Mar 28 03:30:20 PM PDT 24 |
Mar 28 03:31:42 PM PDT 24 |
2576596889 ps |
| T59 |
/workspace/coverage/default/42.i2c_host_fifo_full.2584488947 |
|
|
Mar 28 03:29:54 PM PDT 24 |
Mar 28 03:32:09 PM PDT 24 |
1852043711 ps |
| T1140 |
/workspace/coverage/default/14.i2c_target_stretch.3510326670 |
|
|
Mar 28 03:26:40 PM PDT 24 |
Mar 28 03:28:08 PM PDT 24 |
5728153712 ps |
| T1141 |
/workspace/coverage/default/20.i2c_host_may_nack.1842711432 |
|
|
Mar 28 03:27:25 PM PDT 24 |
Mar 28 03:27:41 PM PDT 24 |
391395074 ps |
| T1142 |
/workspace/coverage/default/2.i2c_target_fifo_reset_acq.189352423 |
|
|
Mar 28 03:25:05 PM PDT 24 |
Mar 28 03:26:21 PM PDT 24 |
10044687385 ps |
| T1143 |
/workspace/coverage/default/49.i2c_host_mode_toggle.812597740 |
|
|
Mar 28 03:30:56 PM PDT 24 |
Mar 28 03:32:08 PM PDT 24 |
1581916578 ps |
| T1144 |
/workspace/coverage/default/2.i2c_target_stress_rd.1654019406 |
|
|
Mar 28 03:25:00 PM PDT 24 |
Mar 28 03:25:24 PM PDT 24 |
3462316681 ps |
| T1145 |
/workspace/coverage/default/35.i2c_host_fifo_overflow.3035229209 |
|
|
Mar 28 03:29:16 PM PDT 24 |
Mar 28 03:30:42 PM PDT 24 |
1309622001 ps |
| T1146 |
/workspace/coverage/default/34.i2c_host_fifo_reset_rx.3278765020 |
|
|
Mar 28 03:29:00 PM PDT 24 |
Mar 28 03:29:05 PM PDT 24 |
182512398 ps |
| T1147 |
/workspace/coverage/default/8.i2c_target_bad_addr.1752929467 |
|
|
Mar 28 03:25:54 PM PDT 24 |
Mar 28 03:25:57 PM PDT 24 |
4128533321 ps |
| T1148 |
/workspace/coverage/default/39.i2c_target_timeout.3686878916 |
|
|
Mar 28 03:29:34 PM PDT 24 |
Mar 28 03:29:40 PM PDT 24 |
7636799123 ps |
| T1149 |
/workspace/coverage/default/23.i2c_target_hrst.2911844473 |
|
|
Mar 28 03:27:58 PM PDT 24 |
Mar 28 03:28:00 PM PDT 24 |
1566072041 ps |
| T1150 |
/workspace/coverage/default/49.i2c_host_smoke.3644534155 |
|
|
Mar 28 03:30:47 PM PDT 24 |
Mar 28 03:31:51 PM PDT 24 |
4801732351 ps |
| T1151 |
/workspace/coverage/default/16.i2c_alert_test.2895938575 |
|
|
Mar 28 03:27:00 PM PDT 24 |
Mar 28 03:27:01 PM PDT 24 |
17632800 ps |
| T1152 |
/workspace/coverage/default/47.i2c_target_timeout.4133647434 |
|
|
Mar 28 03:30:33 PM PDT 24 |
Mar 28 03:30:41 PM PDT 24 |
6178544384 ps |
| T1153 |
/workspace/coverage/default/44.i2c_target_stress_wr.3434264350 |
|
|
Mar 28 03:30:18 PM PDT 24 |
Mar 28 03:30:25 PM PDT 24 |
8352345358 ps |
| T1154 |
/workspace/coverage/default/47.i2c_target_fifo_reset_tx.1588208412 |
|
|
Mar 28 03:30:42 PM PDT 24 |
Mar 28 03:32:11 PM PDT 24 |
10129038398 ps |
| T1155 |
/workspace/coverage/default/14.i2c_target_fifo_reset_acq.2971949482 |
|
|
Mar 28 03:26:40 PM PDT 24 |
Mar 28 03:26:55 PM PDT 24 |
10226491507 ps |
| T1156 |
/workspace/coverage/default/37.i2c_target_smoke.3898615686 |
|
|
Mar 28 03:29:30 PM PDT 24 |
Mar 28 03:29:48 PM PDT 24 |
2486929677 ps |
| T1157 |
/workspace/coverage/default/16.i2c_host_fifo_watermark.2280432335 |
|
|
Mar 28 03:26:54 PM PDT 24 |
Mar 28 03:29:12 PM PDT 24 |
2297412900 ps |
| T1158 |
/workspace/coverage/default/10.i2c_target_bad_addr.655738414 |
|
|
Mar 28 03:26:20 PM PDT 24 |
Mar 28 03:26:23 PM PDT 24 |
2895303587 ps |
| T1159 |
/workspace/coverage/default/25.i2c_host_may_nack.1246897423 |
|
|
Mar 28 03:27:53 PM PDT 24 |
Mar 28 03:28:00 PM PDT 24 |
773055486 ps |
| T1160 |
/workspace/coverage/default/10.i2c_host_smoke.2054801635 |
|
|
Mar 28 03:25:52 PM PDT 24 |
Mar 28 03:26:21 PM PDT 24 |
1195675195 ps |
| T1161 |
/workspace/coverage/default/31.i2c_host_override.4131766109 |
|
|
Mar 28 03:28:42 PM PDT 24 |
Mar 28 03:28:43 PM PDT 24 |
46870744 ps |
| T1162 |
/workspace/coverage/default/22.i2c_host_may_nack.4175014895 |
|
|
Mar 28 03:27:43 PM PDT 24 |
Mar 28 03:27:55 PM PDT 24 |
1141709703 ps |
| T1163 |
/workspace/coverage/default/13.i2c_host_fifo_reset_rx.3896067529 |
|
|
Mar 28 03:26:13 PM PDT 24 |
Mar 28 03:26:16 PM PDT 24 |
164876095 ps |
| T1164 |
/workspace/coverage/default/15.i2c_target_fifo_reset_tx.3988836692 |
|
|
Mar 28 03:26:41 PM PDT 24 |
Mar 28 03:26:58 PM PDT 24 |
10312856106 ps |
| T1165 |
/workspace/coverage/default/35.i2c_target_smoke.318576493 |
|
|
Mar 28 03:29:16 PM PDT 24 |
Mar 28 03:29:31 PM PDT 24 |
14351882224 ps |
| T1166 |
/workspace/coverage/default/5.i2c_target_hrst.687885330 |
|
|
Mar 28 03:25:34 PM PDT 24 |
Mar 28 03:25:38 PM PDT 24 |
1071272599 ps |
| T1167 |
/workspace/coverage/default/2.i2c_host_fifo_full.2787577205 |
|
|
Mar 28 03:25:07 PM PDT 24 |
Mar 28 03:26:37 PM PDT 24 |
10036427948 ps |
| T1168 |
/workspace/coverage/default/7.i2c_target_fifo_reset_tx.401343487 |
|
|
Mar 28 03:25:37 PM PDT 24 |
Mar 28 03:26:55 PM PDT 24 |
10060284380 ps |
| T1169 |
/workspace/coverage/default/15.i2c_host_smoke.3099661246 |
|
|
Mar 28 03:26:38 PM PDT 24 |
Mar 28 03:27:10 PM PDT 24 |
6719512346 ps |
| T1170 |
/workspace/coverage/default/4.i2c_host_smoke.1639292626 |
|
|
Mar 28 03:25:04 PM PDT 24 |
Mar 28 03:25:30 PM PDT 24 |
14285272997 ps |
| T1171 |
/workspace/coverage/default/24.i2c_target_timeout.3451477219 |
|
|
Mar 28 03:27:54 PM PDT 24 |
Mar 28 03:28:02 PM PDT 24 |
3951908830 ps |
| T1172 |
/workspace/coverage/default/47.i2c_target_intr_smoke.3591855942 |
|
|
Mar 28 03:30:59 PM PDT 24 |
Mar 28 03:31:04 PM PDT 24 |
1817052371 ps |
| T1173 |
/workspace/coverage/default/31.i2c_host_fifo_reset_fmt.81098141 |
|
|
Mar 28 03:28:42 PM PDT 24 |
Mar 28 03:28:44 PM PDT 24 |
805865640 ps |
| T1174 |
/workspace/coverage/default/0.i2c_host_override.4192896213 |
|
|
Mar 28 03:24:51 PM PDT 24 |
Mar 28 03:24:52 PM PDT 24 |
16668551 ps |
| T1175 |
/workspace/coverage/default/13.i2c_target_bad_addr.1661590714 |
|
|
Mar 28 03:26:36 PM PDT 24 |
Mar 28 03:26:42 PM PDT 24 |
5679419173 ps |
| T1176 |
/workspace/coverage/default/19.i2c_target_bad_addr.3543350222 |
|
|
Mar 28 03:27:12 PM PDT 24 |
Mar 28 03:27:15 PM PDT 24 |
1289424316 ps |
| T1177 |
/workspace/coverage/default/19.i2c_alert_test.2926771723 |
|
|
Mar 28 03:27:17 PM PDT 24 |
Mar 28 03:27:18 PM PDT 24 |
19292436 ps |
| T165 |
/workspace/coverage/default/27.i2c_host_stress_all.3919107371 |
|
|
Mar 28 03:28:11 PM PDT 24 |
Mar 28 03:37:43 PM PDT 24 |
43169589863 ps |
| T1178 |
/workspace/coverage/default/49.i2c_host_perf.152732439 |
|
|
Mar 28 03:30:57 PM PDT 24 |
Mar 28 03:39:21 PM PDT 24 |
5153823953 ps |
| T1179 |
/workspace/coverage/default/10.i2c_target_fifo_reset_acq.3610214290 |
|
|
Mar 28 03:26:02 PM PDT 24 |
Mar 28 03:27:18 PM PDT 24 |
10038312002 ps |
| T1180 |
/workspace/coverage/default/13.i2c_host_may_nack.2256503546 |
|
|
Mar 28 03:26:39 PM PDT 24 |
Mar 28 03:26:44 PM PDT 24 |
2916453733 ps |
| T1181 |
/workspace/coverage/default/43.i2c_host_fifo_overflow.812642318 |
|
|
Mar 28 03:30:19 PM PDT 24 |
Mar 28 03:31:19 PM PDT 24 |
3224976952 ps |
| T1182 |
/workspace/coverage/default/25.i2c_host_override.2016461566 |
|
|
Mar 28 03:27:54 PM PDT 24 |
Mar 28 03:27:55 PM PDT 24 |
18003195 ps |
| T1183 |
/workspace/coverage/default/12.i2c_target_hrst.1499610080 |
|
|
Mar 28 03:26:19 PM PDT 24 |
Mar 28 03:26:21 PM PDT 24 |
364069052 ps |
| T1184 |
/workspace/coverage/default/29.i2c_host_smoke.3700187523 |
|
|
Mar 28 03:28:36 PM PDT 24 |
Mar 28 03:28:54 PM PDT 24 |
5760892701 ps |
| T1185 |
/workspace/coverage/default/0.i2c_host_smoke.2269169876 |
|
|
Mar 28 03:24:51 PM PDT 24 |
Mar 28 03:26:13 PM PDT 24 |
3170091697 ps |
| T1186 |
/workspace/coverage/default/43.i2c_target_timeout.351705350 |
|
|
Mar 28 03:30:17 PM PDT 24 |
Mar 28 03:30:26 PM PDT 24 |
1622476949 ps |
| T1187 |
/workspace/coverage/default/35.i2c_target_fifo_reset_tx.2526063385 |
|
|
Mar 28 03:29:17 PM PDT 24 |
Mar 28 03:30:55 PM PDT 24 |
10055177209 ps |
| T1188 |
/workspace/coverage/default/7.i2c_target_smoke.966280193 |
|
|
Mar 28 03:25:38 PM PDT 24 |
Mar 28 03:25:50 PM PDT 24 |
1252932075 ps |
| T1189 |
/workspace/coverage/default/46.i2c_target_intr_smoke.2334356630 |
|
|
Mar 28 03:30:35 PM PDT 24 |
Mar 28 03:30:43 PM PDT 24 |
6348224247 ps |
| T1190 |
/workspace/coverage/default/10.i2c_alert_test.3815063508 |
|
|
Mar 28 03:26:14 PM PDT 24 |
Mar 28 03:26:14 PM PDT 24 |
22175965 ps |
| T1191 |
/workspace/coverage/default/5.i2c_host_perf.1253458266 |
|
|
Mar 28 03:25:21 PM PDT 24 |
Mar 28 03:33:20 PM PDT 24 |
12088542622 ps |
| T1192 |
/workspace/coverage/default/22.i2c_target_fifo_reset_acq.1780828873 |
|
|
Mar 28 03:27:31 PM PDT 24 |
Mar 28 03:28:04 PM PDT 24 |
10290165075 ps |
| T1193 |
/workspace/coverage/default/16.i2c_target_unexp_stop.2781690964 |
|
|
Mar 28 03:26:57 PM PDT 24 |
Mar 28 03:27:01 PM PDT 24 |
10940588513 ps |
| T1194 |
/workspace/coverage/default/3.i2c_host_fifo_fmt_empty.2940811453 |
|
|
Mar 28 03:25:07 PM PDT 24 |
Mar 28 03:25:11 PM PDT 24 |
859558289 ps |
| T1195 |
/workspace/coverage/cover_reg_top/16.i2c_intr_test.3948113971 |
|
|
Mar 28 12:35:56 PM PDT 24 |
Mar 28 12:35:57 PM PDT 24 |
62362553 ps |
| T166 |
/workspace/coverage/cover_reg_top/25.i2c_intr_test.4287956431 |
|
|
Mar 28 12:35:47 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
16978964 ps |
| T69 |
/workspace/coverage/cover_reg_top/18.i2c_csr_rw.1100605041 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:42 PM PDT 24 |
118191063 ps |
| T233 |
/workspace/coverage/cover_reg_top/49.i2c_intr_test.1917912316 |
|
|
Mar 28 12:35:56 PM PDT 24 |
Mar 28 12:35:59 PM PDT 24 |
18400607 ps |
| T94 |
/workspace/coverage/cover_reg_top/7.i2c_tl_errors.1465214671 |
|
|
Mar 28 12:35:46 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
81477077 ps |
| T70 |
/workspace/coverage/cover_reg_top/3.i2c_csr_hw_reset.2023008028 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:42 PM PDT 24 |
222321004 ps |
| T167 |
/workspace/coverage/cover_reg_top/46.i2c_intr_test.3657127974 |
|
|
Mar 28 12:36:02 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
18207152 ps |
| T71 |
/workspace/coverage/cover_reg_top/9.i2c_csr_rw.722773579 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
25452090 ps |
| T201 |
/workspace/coverage/cover_reg_top/2.i2c_csr_aliasing.3361019861 |
|
|
Mar 28 12:35:42 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
150356785 ps |
| T1196 |
/workspace/coverage/cover_reg_top/36.i2c_intr_test.2553572094 |
|
|
Mar 28 12:36:05 PM PDT 24 |
Mar 28 12:36:06 PM PDT 24 |
17078735 ps |
| T141 |
/workspace/coverage/cover_reg_top/2.i2c_csr_rw.3149742885 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
33391457 ps |
| T235 |
/workspace/coverage/cover_reg_top/37.i2c_intr_test.2512201869 |
|
|
Mar 28 12:35:41 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
52997186 ps |
| T142 |
/workspace/coverage/cover_reg_top/12.i2c_csr_rw.2757076727 |
|
|
Mar 28 12:35:47 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
18684775 ps |
| T143 |
/workspace/coverage/cover_reg_top/18.i2c_same_csr_outstanding.3727309634 |
|
|
Mar 28 12:36:02 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
48707598 ps |
| T1197 |
/workspace/coverage/cover_reg_top/4.i2c_csr_hw_reset.3107755734 |
|
|
Mar 28 12:35:54 PM PDT 24 |
Mar 28 12:35:55 PM PDT 24 |
16282545 ps |
| T95 |
/workspace/coverage/cover_reg_top/10.i2c_tl_errors.4196900715 |
|
|
Mar 28 12:35:42 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
229519310 ps |
| T159 |
/workspace/coverage/cover_reg_top/1.i2c_csr_aliasing.2046872618 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
1055185230 ps |
| T96 |
/workspace/coverage/cover_reg_top/9.i2c_tl_intg_err.1491416934 |
|
|
Mar 28 12:35:53 PM PDT 24 |
Mar 28 12:35:56 PM PDT 24 |
472725080 ps |
| T114 |
/workspace/coverage/cover_reg_top/16.i2c_csr_mem_rw_with_rand_reset.2131073917 |
|
|
Mar 28 12:35:40 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
84007254 ps |
| T115 |
/workspace/coverage/cover_reg_top/15.i2c_tl_intg_err.2191570651 |
|
|
Mar 28 12:35:50 PM PDT 24 |
Mar 28 12:35:53 PM PDT 24 |
473088460 ps |
| T144 |
/workspace/coverage/cover_reg_top/9.i2c_same_csr_outstanding.2958054249 |
|
|
Mar 28 12:35:34 PM PDT 24 |
Mar 28 12:35:35 PM PDT 24 |
145362167 ps |
| T117 |
/workspace/coverage/cover_reg_top/2.i2c_csr_mem_rw_with_rand_reset.2298664280 |
|
|
Mar 28 12:35:54 PM PDT 24 |
Mar 28 12:35:55 PM PDT 24 |
79459254 ps |
| T118 |
/workspace/coverage/cover_reg_top/12.i2c_tl_errors.3043332121 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
194229000 ps |
| T1198 |
/workspace/coverage/cover_reg_top/35.i2c_intr_test.1805515000 |
|
|
Mar 28 12:35:41 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
93428244 ps |
| T1199 |
/workspace/coverage/cover_reg_top/48.i2c_intr_test.961087463 |
|
|
Mar 28 12:36:00 PM PDT 24 |
Mar 28 12:36:00 PM PDT 24 |
16422218 ps |
| T130 |
/workspace/coverage/cover_reg_top/18.i2c_csr_mem_rw_with_rand_reset.1323162659 |
|
|
Mar 28 12:35:42 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
129439497 ps |
| T132 |
/workspace/coverage/cover_reg_top/19.i2c_csr_rw.400094517 |
|
|
Mar 28 12:36:00 PM PDT 24 |
Mar 28 12:36:01 PM PDT 24 |
54516447 ps |
| T133 |
/workspace/coverage/cover_reg_top/1.i2c_csr_hw_reset.3086562193 |
|
|
Mar 28 12:35:36 PM PDT 24 |
Mar 28 12:35:37 PM PDT 24 |
77399389 ps |
| T134 |
/workspace/coverage/cover_reg_top/17.i2c_csr_rw.723767583 |
|
|
Mar 28 12:35:59 PM PDT 24 |
Mar 28 12:36:00 PM PDT 24 |
17292597 ps |
| T1200 |
/workspace/coverage/cover_reg_top/15.i2c_intr_test.1473843014 |
|
|
Mar 28 12:35:57 PM PDT 24 |
Mar 28 12:35:59 PM PDT 24 |
36676923 ps |
| T135 |
/workspace/coverage/cover_reg_top/15.i2c_csr_rw.3933591654 |
|
|
Mar 28 12:35:59 PM PDT 24 |
Mar 28 12:36:00 PM PDT 24 |
26009840 ps |
| T116 |
/workspace/coverage/cover_reg_top/19.i2c_tl_intg_err.1062930528 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:43 PM PDT 24 |
125370166 ps |
| T126 |
/workspace/coverage/cover_reg_top/16.i2c_tl_intg_err.2638327558 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
100911112 ps |
| T124 |
/workspace/coverage/cover_reg_top/11.i2c_tl_errors.833380743 |
|
|
Mar 28 12:36:00 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
478205132 ps |
| T1201 |
/workspace/coverage/cover_reg_top/28.i2c_intr_test.2278916806 |
|
|
Mar 28 12:36:02 PM PDT 24 |
Mar 28 12:36:02 PM PDT 24 |
34164547 ps |
| T234 |
/workspace/coverage/cover_reg_top/5.i2c_intr_test.1967919405 |
|
|
Mar 28 12:35:59 PM PDT 24 |
Mar 28 12:36:00 PM PDT 24 |
51785942 ps |
| T1202 |
/workspace/coverage/cover_reg_top/9.i2c_intr_test.702724270 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
128456070 ps |
| T1203 |
/workspace/coverage/cover_reg_top/1.i2c_intr_test.2982695585 |
|
|
Mar 28 12:35:46 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
65516741 ps |
| T127 |
/workspace/coverage/cover_reg_top/1.i2c_tl_errors.1513168042 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:05 PM PDT 24 |
153136563 ps |
| T160 |
/workspace/coverage/cover_reg_top/4.i2c_csr_rw.4150676317 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
48375681 ps |
| T145 |
/workspace/coverage/cover_reg_top/16.i2c_same_csr_outstanding.1230278634 |
|
|
Mar 28 12:35:40 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
32388558 ps |
| T146 |
/workspace/coverage/cover_reg_top/1.i2c_same_csr_outstanding.1213789030 |
|
|
Mar 28 12:35:33 PM PDT 24 |
Mar 28 12:35:34 PM PDT 24 |
41970367 ps |
| T131 |
/workspace/coverage/cover_reg_top/8.i2c_csr_mem_rw_with_rand_reset.2428079006 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
79797704 ps |
| T1204 |
/workspace/coverage/cover_reg_top/8.i2c_intr_test.3724640805 |
|
|
Mar 28 12:35:54 PM PDT 24 |
Mar 28 12:35:55 PM PDT 24 |
29161424 ps |
| T128 |
/workspace/coverage/cover_reg_top/0.i2c_tl_intg_err.2242690255 |
|
|
Mar 28 12:35:23 PM PDT 24 |
Mar 28 12:35:25 PM PDT 24 |
95643841 ps |
| T1205 |
/workspace/coverage/cover_reg_top/4.i2c_csr_bit_bash.210919089 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
354752100 ps |
| T1206 |
/workspace/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.1577216956 |
|
|
Mar 28 12:35:34 PM PDT 24 |
Mar 28 12:35:36 PM PDT 24 |
49835234 ps |
| T161 |
/workspace/coverage/cover_reg_top/3.i2c_csr_aliasing.4083018662 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
230447798 ps |
| T119 |
/workspace/coverage/cover_reg_top/7.i2c_tl_intg_err.210340063 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:43 PM PDT 24 |
277335577 ps |
| T1207 |
/workspace/coverage/cover_reg_top/5.i2c_csr_rw.1532526163 |
|
|
Mar 28 12:36:01 PM PDT 24 |
Mar 28 12:36:02 PM PDT 24 |
20224612 ps |
| T1208 |
/workspace/coverage/cover_reg_top/2.i2c_tl_errors.3832919115 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
49024556 ps |
| T1209 |
/workspace/coverage/cover_reg_top/14.i2c_same_csr_outstanding.851168897 |
|
|
Mar 28 12:35:56 PM PDT 24 |
Mar 28 12:35:59 PM PDT 24 |
67714414 ps |
| T136 |
/workspace/coverage/cover_reg_top/13.i2c_csr_rw.1704460978 |
|
|
Mar 28 12:35:41 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
40884394 ps |
| T1210 |
/workspace/coverage/cover_reg_top/19.i2c_intr_test.2642121372 |
|
|
Mar 28 12:35:37 PM PDT 24 |
Mar 28 12:35:38 PM PDT 24 |
14995545 ps |
| T1211 |
/workspace/coverage/cover_reg_top/3.i2c_csr_rw.1454813867 |
|
|
Mar 28 12:35:42 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
17475915 ps |
| T193 |
/workspace/coverage/cover_reg_top/1.i2c_csr_bit_bash.2621378138 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:50 PM PDT 24 |
297761254 ps |
| T1212 |
/workspace/coverage/cover_reg_top/17.i2c_same_csr_outstanding.2439404291 |
|
|
Mar 28 12:35:57 PM PDT 24 |
Mar 28 12:35:59 PM PDT 24 |
38943730 ps |
| T1213 |
/workspace/coverage/cover_reg_top/12.i2c_intr_test.254028189 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:04 PM PDT 24 |
31798914 ps |
| T1214 |
/workspace/coverage/cover_reg_top/33.i2c_intr_test.2658906599 |
|
|
Mar 28 12:35:42 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
56172371 ps |
| T120 |
/workspace/coverage/cover_reg_top/14.i2c_tl_intg_err.1916592391 |
|
|
Mar 28 12:36:05 PM PDT 24 |
Mar 28 12:36:06 PM PDT 24 |
189888865 ps |
| T1215 |
/workspace/coverage/cover_reg_top/8.i2c_same_csr_outstanding.1229501971 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
55147995 ps |
| T137 |
/workspace/coverage/cover_reg_top/4.i2c_csr_aliasing.4074623614 |
|
|
Mar 28 12:35:40 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
139933461 ps |
| T1216 |
/workspace/coverage/cover_reg_top/13.i2c_tl_errors.2047222884 |
|
|
Mar 28 12:36:01 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
73579126 ps |
| T122 |
/workspace/coverage/cover_reg_top/10.i2c_tl_intg_err.47718345 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:43 PM PDT 24 |
462256338 ps |
| T1217 |
/workspace/coverage/cover_reg_top/34.i2c_intr_test.844766800 |
|
|
Mar 28 12:36:02 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
16767860 ps |
| T1218 |
/workspace/coverage/cover_reg_top/24.i2c_intr_test.1748151559 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:04 PM PDT 24 |
23453707 ps |
| T1219 |
/workspace/coverage/cover_reg_top/17.i2c_csr_mem_rw_with_rand_reset.3260444503 |
|
|
Mar 28 12:35:42 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
70667232 ps |
| T1220 |
/workspace/coverage/cover_reg_top/11.i2c_same_csr_outstanding.1869873459 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
190077909 ps |
| T1221 |
/workspace/coverage/cover_reg_top/6.i2c_csr_rw.1026006791 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
19713197 ps |
| T138 |
/workspace/coverage/cover_reg_top/0.i2c_csr_aliasing.1752445918 |
|
|
Mar 28 12:35:51 PM PDT 24 |
Mar 28 12:35:53 PM PDT 24 |
29099833 ps |
| T1222 |
/workspace/coverage/cover_reg_top/8.i2c_tl_errors.1951108841 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
53391889 ps |
| T1223 |
/workspace/coverage/cover_reg_top/14.i2c_tl_errors.653083747 |
|
|
Mar 28 12:35:48 PM PDT 24 |
Mar 28 12:35:50 PM PDT 24 |
88535072 ps |
| T1224 |
/workspace/coverage/cover_reg_top/29.i2c_intr_test.4176146657 |
|
|
Mar 28 12:36:02 PM PDT 24 |
Mar 28 12:36:02 PM PDT 24 |
76468982 ps |
| T123 |
/workspace/coverage/cover_reg_top/2.i2c_tl_intg_err.2333888012 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
135811328 ps |
| T1225 |
/workspace/coverage/cover_reg_top/26.i2c_intr_test.2438062266 |
|
|
Mar 28 12:35:54 PM PDT 24 |
Mar 28 12:35:55 PM PDT 24 |
46629765 ps |
| T1226 |
/workspace/coverage/cover_reg_top/8.i2c_csr_rw.3838513617 |
|
|
Mar 28 12:35:52 PM PDT 24 |
Mar 28 12:35:53 PM PDT 24 |
37495249 ps |
| T1227 |
/workspace/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.3376146375 |
|
|
Mar 28 12:35:47 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
42527415 ps |
| T1228 |
/workspace/coverage/cover_reg_top/21.i2c_intr_test.92115019 |
|
|
Mar 28 12:36:00 PM PDT 24 |
Mar 28 12:36:01 PM PDT 24 |
55867551 ps |
| T1229 |
/workspace/coverage/cover_reg_top/16.i2c_csr_rw.2840770076 |
|
|
Mar 28 12:35:43 PM PDT 24 |
Mar 28 12:35:47 PM PDT 24 |
21472345 ps |
| T1230 |
/workspace/coverage/cover_reg_top/11.i2c_intr_test.912992200 |
|
|
Mar 28 12:35:37 PM PDT 24 |
Mar 28 12:35:38 PM PDT 24 |
49926438 ps |
| T1231 |
/workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.3441638365 |
|
|
Mar 28 12:35:58 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
1457044111 ps |
| T1232 |
/workspace/coverage/cover_reg_top/7.i2c_same_csr_outstanding.2945195163 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
101838874 ps |
| T139 |
/workspace/coverage/cover_reg_top/0.i2c_csr_hw_reset.4006293334 |
|
|
Mar 28 12:35:23 PM PDT 24 |
Mar 28 12:35:24 PM PDT 24 |
20705928 ps |
| T1233 |
/workspace/coverage/cover_reg_top/0.i2c_csr_bit_bash.206197867 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:06 PM PDT 24 |
762377198 ps |
| T1234 |
/workspace/coverage/cover_reg_top/5.i2c_same_csr_outstanding.2927163345 |
|
|
Mar 28 12:35:36 PM PDT 24 |
Mar 28 12:35:38 PM PDT 24 |
27859696 ps |
| T1235 |
/workspace/coverage/cover_reg_top/7.i2c_csr_mem_rw_with_rand_reset.3202061922 |
|
|
Mar 28 12:35:46 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
32782690 ps |
| T1236 |
/workspace/coverage/cover_reg_top/2.i2c_csr_hw_reset.873191583 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:04 PM PDT 24 |
48716077 ps |
| T1237 |
/workspace/coverage/cover_reg_top/10.i2c_same_csr_outstanding.2186398928 |
|
|
Mar 28 12:36:02 PM PDT 24 |
Mar 28 12:36:03 PM PDT 24 |
28858911 ps |
| T1238 |
/workspace/coverage/cover_reg_top/19.i2c_tl_errors.3517368690 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
130281516 ps |
| T1239 |
/workspace/coverage/cover_reg_top/9.i2c_tl_errors.3423921585 |
|
|
Mar 28 12:35:38 PM PDT 24 |
Mar 28 12:35:39 PM PDT 24 |
98338282 ps |
| T1240 |
/workspace/coverage/cover_reg_top/0.i2c_intr_test.39117336 |
|
|
Mar 28 12:35:19 PM PDT 24 |
Mar 28 12:35:20 PM PDT 24 |
51324402 ps |
| T1241 |
/workspace/coverage/cover_reg_top/40.i2c_intr_test.1613768892 |
|
|
Mar 28 12:36:01 PM PDT 24 |
Mar 28 12:36:02 PM PDT 24 |
21112713 ps |
| T1242 |
/workspace/coverage/cover_reg_top/4.i2c_intr_test.206854556 |
|
|
Mar 28 12:35:41 PM PDT 24 |
Mar 28 12:35:44 PM PDT 24 |
18808213 ps |
| T1243 |
/workspace/coverage/cover_reg_top/1.i2c_tl_intg_err.477824905 |
|
|
Mar 28 12:35:38 PM PDT 24 |
Mar 28 12:35:41 PM PDT 24 |
67276971 ps |
| T1244 |
/workspace/coverage/cover_reg_top/4.i2c_tl_intg_err.622308280 |
|
|
Mar 28 12:35:38 PM PDT 24 |
Mar 28 12:35:41 PM PDT 24 |
300902099 ps |
| T1245 |
/workspace/coverage/cover_reg_top/32.i2c_intr_test.3369470841 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:04 PM PDT 24 |
34576702 ps |
| T1246 |
/workspace/coverage/cover_reg_top/43.i2c_intr_test.302327710 |
|
|
Mar 28 12:36:01 PM PDT 24 |
Mar 28 12:36:01 PM PDT 24 |
44432810 ps |
| T1247 |
/workspace/coverage/cover_reg_top/0.i2c_csr_rw.11997709 |
|
|
Mar 28 12:35:22 PM PDT 24 |
Mar 28 12:35:24 PM PDT 24 |
53611821 ps |
| T1248 |
/workspace/coverage/cover_reg_top/23.i2c_intr_test.3636510259 |
|
|
Mar 28 12:35:46 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
46884223 ps |
| T1249 |
/workspace/coverage/cover_reg_top/39.i2c_intr_test.2796613559 |
|
|
Mar 28 12:36:03 PM PDT 24 |
Mar 28 12:36:04 PM PDT 24 |
18220229 ps |
| T1250 |
/workspace/coverage/cover_reg_top/13.i2c_tl_intg_err.53122781 |
|
|
Mar 28 12:36:04 PM PDT 24 |
Mar 28 12:36:05 PM PDT 24 |
238763477 ps |
| T1251 |
/workspace/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.1035600909 |
|
|
Mar 28 12:35:39 PM PDT 24 |
Mar 28 12:35:42 PM PDT 24 |
52270824 ps |
| T1252 |
/workspace/coverage/cover_reg_top/9.i2c_csr_mem_rw_with_rand_reset.2961092831 |
|
|
Mar 28 12:35:45 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
24469847 ps |
| T1253 |
/workspace/coverage/cover_reg_top/12.i2c_tl_intg_err.384270866 |
|
|
Mar 28 12:35:45 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
254432159 ps |
| T1254 |
/workspace/coverage/cover_reg_top/13.i2c_same_csr_outstanding.633730137 |
|
|
Mar 28 12:35:47 PM PDT 24 |
Mar 28 12:35:49 PM PDT 24 |
90006472 ps |
| T1255 |
/workspace/coverage/cover_reg_top/14.i2c_csr_rw.3280500724 |
|
|
Mar 28 12:35:44 PM PDT 24 |
Mar 28 12:35:48 PM PDT 24 |
18964824 ps |