Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44302895	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

10285808

1

T1

529

T2

169748

T3

419

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	53593530	1			T1	1060		T2	713972		T3	1184
values[0x0]	496291	1			T1	307		T2	2565		T3	276
values[0x1]	498882	1			T1	310		T2	2547		T3	271

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31654078	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

22934625

1

T1

854

T2

330212

T3

812

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	214931	1			T1	10		T2	2724		T3	6
valid_sources[0x01]	196043	1			T1	9		T2	2854		T3	9
valid_sources[0x02]	205705	1			T1	11		T2	2825		T3	8
valid_sources[0x03]	200159	1			T1	4		T2	2924		T3	10
valid_sources[0x04]	217113	1			T1	4		T2	2828		T3	9
valid_sources[0x05]	192901	1			T1	6		T2	2857		T3	4
valid_sources[0x06]	201143	1			T1	6		T2	2760		T3	9
valid_sources[0x07]	203391	1			T1	5		T2	2820		T4	1
valid_sources[0x08]	204235	1			T1	8		T2	2896		T3	5
valid_sources[0x09]	204201	1			T1	3		T2	2726		T3	4
valid_sources[0x0a]	194874	1			T1	5		T2	2843		T3	7
valid_sources[0x0b]	303366	1			T1	4		T2	2925		T3	10
valid_sources[0x0c]	210506	1			T1	13		T2	2825		T3	6
valid_sources[0x0d]	193271	1			T1	6		T2	2769		T3	8
valid_sources[0x0e]	201549	1			T1	5		T2	2814		T3	5
valid_sources[0x0f]	193855	1			T1	7		T2	2812		T3	6
valid_sources[0x10]	193132	1			T1	7		T2	2859		T3	2
valid_sources[0x11]	209164	1			T1	8		T2	2784		T3	8
valid_sources[0x12]	206016	1			T1	4		T2	2786		T3	4
valid_sources[0x13]	209467	1			T1	17		T2	2867		T3	4
valid_sources[0x14]	284745	1			T1	5		T2	2767		T3	6
valid_sources[0x15]	202482	1			T1	10		T2	2689		T3	6
valid_sources[0x16]	206817	1			T1	4		T2	2805		T3	1
valid_sources[0x17]	213480	1			T1	13		T2	2810		T3	4
valid_sources[0x18]	204715	1			T1	1		T2	2787		T3	5
valid_sources[0x19]	206471	1			T1	9		T2	2835		T3	4
valid_sources[0x1a]	206507	1			T1	6		T2	2792		T3	5
valid_sources[0x1b]	231920	1			T1	4		T2	2847		T3	4
valid_sources[0x1c]	227383	1			T1	8		T2	2831		T3	5
valid_sources[0x1d]	199422	1			T1	4		T2	2842		T3	5
valid_sources[0x1e]	217081	1			T1	7		T2	2823		T3	6
valid_sources[0x1f]	232526	1			T1	9		T2	2886		T3	2
valid_sources[0x20]	221873	1			T1	9		T2	2840		T3	11
valid_sources[0x21]	197999	1			T1	8		T2	2713		T3	7
valid_sources[0x22]	203691	1			T1	2		T2	2853		T3	13
valid_sources[0x23]	199085	1			T1	3		T2	2837		T3	4
valid_sources[0x24]	199357	1			T1	8		T2	2703		T3	7
valid_sources[0x25]	207550	1			T1	3		T2	2820		T3	4
valid_sources[0x26]	322149	1			T1	3		T2	2809		T3	5
valid_sources[0x27]	212790	1			T1	3		T2	2743		T3	8
valid_sources[0x28]	210499	1			T1	12		T2	2828		T3	6
valid_sources[0x29]	207716	1			T1	13		T2	2872		T3	8
valid_sources[0x2a]	219295	1			T1	5		T2	2804		T3	3
valid_sources[0x2b]	197704	1			T1	5		T2	2794		T3	9
valid_sources[0x2c]	209952	1			T1	12		T2	2708		T3	6
valid_sources[0x2d]	204742	1			T1	14		T2	2742		T3	4
valid_sources[0x2e]	212195	1			T1	2		T2	2866		T3	8
valid_sources[0x2f]	206898	1			T1	2		T2	2933		T3	8
valid_sources[0x30]	206160	1			T1	5		T2	2808		T3	8
valid_sources[0x31]	202638	1			T1	5		T2	2703		T3	5
valid_sources[0x32]	216929	1			T1	4		T2	2696		T3	6
valid_sources[0x33]	197350	1			T1	8		T2	2743		T3	10
valid_sources[0x34]	212805	1			T1	11		T2	2749		T3	10
valid_sources[0x35]	208679	1			T1	4		T2	2789		T3	3
valid_sources[0x36]	219762	1			T1	12		T2	2847		T3	10
valid_sources[0x37]	194326	1			T1	2		T2	2769		T3	7
valid_sources[0x38]	204584	1			T1	8		T2	2786		T3	6
valid_sources[0x39]	209186	1			T1	3		T2	2815		T3	6
valid_sources[0x3a]	197741	1			T1	7		T2	2735		T3	6
valid_sources[0x3b]	197905	1			T1	13		T2	2883		T3	6
valid_sources[0x3c]	209794	1			T1	1		T2	2812		T3	4
valid_sources[0x3d]	207890	1			T1	8		T2	2811		T3	4
valid_sources[0x3e]	211589	1			T1	3		T2	2789		T3	6
valid_sources[0x3f]	202143	1			T1	3		T2	2768		T3	6
valid_sources[0x40]	202551	1			T1	12		T2	2683		T3	4
valid_sources[0x41]	193140	1			T1	6		T2	2832		T3	8
valid_sources[0x42]	210324	1			T1	4		T2	2839		T3	8
valid_sources[0x43]	218204	1			T1	10		T2	2750		T3	10
valid_sources[0x44]	213448	1			T1	8		T2	2731		T3	6
valid_sources[0x45]	216546	1			T1	3		T2	2889		T3	8
valid_sources[0x46]	195387	1			T1	5		T2	2810		T3	3
valid_sources[0x47]	204601	1			T1	9		T2	2722		T3	6
valid_sources[0x48]	524908	1			T1	7		T2	2742		T3	8
valid_sources[0x49]	205471	1			T1	3		T2	2782		T3	9
valid_sources[0x4a]	362125	1			T1	6		T2	2823		T3	8
valid_sources[0x4b]	201570	1			T1	5		T2	2876		T3	8
valid_sources[0x4c]	197041	1			T1	13		T2	2980		T3	5
valid_sources[0x4d]	196714	1			T1	3		T2	2742		T3	6
valid_sources[0x4e]	208222	1			T1	3		T2	2791		T3	10
valid_sources[0x4f]	216668	1			T1	6		T2	2843		T3	6
valid_sources[0x50]	214215	1			T1	3		T2	2841		T3	5
valid_sources[0x51]	790761	1			T1	7		T2	2758		T3	5
valid_sources[0x52]	202382	1			T1	15		T2	2882		T3	7
valid_sources[0x53]	194860	1			T1	5		T2	2788		T3	10
valid_sources[0x54]	203329	1			T1	2		T2	2814		T3	11
valid_sources[0x55]	216048	1			T1	3		T2	2852		T3	5
valid_sources[0x56]	431711	1			T1	5		T2	2900		T3	8
valid_sources[0x57]	211946	1			T1	5		T2	2715		T3	8
valid_sources[0x58]	215122	1			T1	3		T2	2844		T3	11
valid_sources[0x59]	205466	1			T1	8		T2	2777		T3	3
valid_sources[0x5a]	201928	1			T1	2		T2	2784		T3	7
valid_sources[0x5b]	218252	1			T1	6		T2	2806		T3	8
valid_sources[0x5c]	197368	1			T1	3		T2	2777		T3	9
valid_sources[0x5d]	203636	1			T1	4		T2	2775		T3	8
valid_sources[0x5e]	206869	1			T1	6		T2	2868		T3	3
valid_sources[0x5f]	197430	1			T1	8		T2	2750		T3	10
valid_sources[0x60]	208793	1			T1	7		T2	2767		T3	5
valid_sources[0x61]	199821	1			T1	5		T2	2711		T3	6
valid_sources[0x62]	202544	1			T1	8		T2	2793		T3	4
valid_sources[0x63]	200163	1			T1	2		T2	2850		T3	6
valid_sources[0x64]	215293	1			T1	14		T2	2783		T3	14
valid_sources[0x65]	194509	1			T1	5		T2	2778		T3	7
valid_sources[0x66]	193922	1			T1	5		T2	2702		T3	6
valid_sources[0x67]	206030	1			T1	1		T2	2737		T3	8
valid_sources[0x68]	207767	1			T1	12		T2	2696		T3	11
valid_sources[0x69]	204306	1			T1	13		T2	2816		T3	7
valid_sources[0x6a]	206354	1			T1	4		T2	2843		T3	8
valid_sources[0x6b]	203150	1			T1	11		T2	2810		T3	11
valid_sources[0x6c]	201171	1			T1	2		T2	2835		T3	7
valid_sources[0x6d]	204985	1			T1	12		T2	2913		T3	8
valid_sources[0x6e]	198387	1			T1	8		T2	2810		T3	4
valid_sources[0x6f]	195633	1			T1	11		T2	2807		T3	8
valid_sources[0x70]	214358	1			T1	7		T2	2788		T3	10
valid_sources[0x71]	202226	1			T1	7		T2	2745		T3	4
valid_sources[0x72]	212196	1			T1	5		T2	2876		T3	8
valid_sources[0x73]	200923	1			T1	4		T2	2776		T3	7
valid_sources[0x74]	201451	1			T1	9		T2	2892		T3	8
valid_sources[0x75]	227690	1			T1	15		T2	2829		T3	8
valid_sources[0x76]	204904	1			T1	8		T2	2873		T3	11
valid_sources[0x77]	193879	1			T1	12		T2	2845		T3	9
valid_sources[0x78]	207102	1			T1	9		T2	2825		T3	10
valid_sources[0x79]	209132	1			T1	2		T2	2832		T3	8
valid_sources[0x7a]	214779	1			T1	6		T2	2794		T3	5
valid_sources[0x7b]	189045	1			T1	7		T2	2818		T3	7
valid_sources[0x7c]	204420	1			T1	11		T2	2831		T3	9
valid_sources[0x7d]	195717	1			T1	11		T2	2837		T3	7
valid_sources[0x7e]	209539	1			T1	9		T2	2747		T3	5
valid_sources[0x7f]	189375	1			T1	4		T2	2752		T3	3
valid_sources[0x80]	198681	1			T1	7		T2	2871		T3	8

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

9847472

1

T1

226

T2

167302

T3

221

values[0x0]

all_enables

biggest_size

258073

1

T1

164

T2

1428

T3

127

values[0x1]

all_enables

biggest_size

180263

1

T1

139

T2

1018

T3

71