Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 41124252 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 10148460 1 T1 76 T2 20560 T3 15574



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 50329936 1 T1 4720 T2 103849 T3 64053
values[0x0] 471446 1 T1 98 T2 422 T3 758
values[0x1] 471330 1 T1 84 T2 392 T3 833



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29414252 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 21858460 1 T1 1897 T2 45834 T3 30285



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 190189 1 T1 24 T2 401 T3 322
valid_sources[0x01] 203104 1 T1 31 T2 300 T3 244
valid_sources[0x02] 200765 1 T1 8 T2 424 T3 242
valid_sources[0x03] 207743 1 T1 16 T2 368 T3 314
valid_sources[0x04] 185490 1 T1 12 T2 459 T3 202
valid_sources[0x05] 190832 1 T1 16 T2 410 T3 278
valid_sources[0x06] 182961 1 T1 2 T2 444 T3 227
valid_sources[0x07] 185193 1 T1 11 T2 384 T3 329
valid_sources[0x08] 193310 1 T1 22 T2 387 T3 287
valid_sources[0x09] 201831 1 T1 5 T2 419 T3 236
valid_sources[0x0a] 206343 1 T1 33 T2 354 T3 254
valid_sources[0x0b] 314965 1 T1 18 T2 455 T3 195
valid_sources[0x0c] 198463 1 T1 8 T2 452 T3 274
valid_sources[0x0d] 180959 1 T1 1 T2 369 T3 223
valid_sources[0x0e] 179301 1 T1 27 T2 426 T3 284
valid_sources[0x0f] 212140 1 T1 12 T2 383 T3 171
valid_sources[0x10] 187426 1 T1 21 T2 388 T3 284
valid_sources[0x11] 182449 1 T1 15 T2 460 T3 214
valid_sources[0x12] 198922 1 T2 351 T3 214 T6 560
valid_sources[0x13] 187962 1 T1 34 T2 321 T3 228
valid_sources[0x14] 207057 1 T1 26 T2 442 T3 249
valid_sources[0x15] 210509 1 T1 1 T2 434 T3 227
valid_sources[0x16] 199956 1 T1 18 T2 422 T3 290
valid_sources[0x17] 189303 1 T1 10 T2 443 T3 192
valid_sources[0x18] 597490 1 T1 11 T2 420 T3 253
valid_sources[0x19] 177768 1 T1 52 T2 384 T3 221
valid_sources[0x1a] 181461 1 T1 21 T2 496 T3 239
valid_sources[0x1b] 185857 1 T1 9 T2 371 T3 299
valid_sources[0x1c] 177993 1 T2 439 T3 275 T5 1
valid_sources[0x1d] 207049 1 T1 13 T2 399 T3 331
valid_sources[0x1e] 191458 1 T1 9 T2 486 T3 237
valid_sources[0x1f] 206282 1 T1 15 T2 357 T3 290
valid_sources[0x20] 202394 1 T1 26 T2 432 T3 326
valid_sources[0x21] 192233 1 T1 24 T2 465 T3 314
valid_sources[0x22] 205036 1 T1 30 T2 398 T3 260
valid_sources[0x23] 198952 1 T1 9 T2 391 T3 279
valid_sources[0x24] 178405 1 T1 60 T2 445 T3 214
valid_sources[0x25] 200838 1 T1 41 T2 432 T3 265
valid_sources[0x26] 187331 1 T1 23 T2 362 T3 203
valid_sources[0x27] 188356 1 T1 17 T2 397 T3 257
valid_sources[0x28] 186816 1 T1 9 T2 467 T3 288
valid_sources[0x29] 227307 1 T1 29 T2 508 T3 304
valid_sources[0x2a] 186221 1 T1 40 T2 460 T3 253
valid_sources[0x2b] 183354 1 T1 17 T2 450 T3 362
valid_sources[0x2c] 197957 1 T1 15 T2 411 T3 250
valid_sources[0x2d] 183321 1 T1 38 T2 444 T3 264
valid_sources[0x2e] 231580 1 T1 13 T2 478 T3 272
valid_sources[0x2f] 205864 1 T1 41 T2 417 T3 273
valid_sources[0x30] 191173 1 T1 28 T2 450 T3 204
valid_sources[0x31] 506897 1 T1 6 T2 406 T3 217
valid_sources[0x32] 188246 1 T1 4 T2 377 T3 234
valid_sources[0x33] 189730 1 T1 30 T2 403 T3 174
valid_sources[0x34] 192186 1 T1 15 T2 416 T3 243
valid_sources[0x35] 192980 1 T1 7 T2 406 T3 296
valid_sources[0x36] 186640 1 T1 7 T2 414 T3 301
valid_sources[0x37] 194325 1 T1 12 T2 458 T3 269
valid_sources[0x38] 197682 1 T1 12 T2 453 T3 245
valid_sources[0x39] 187831 1 T1 26 T2 400 T3 183
valid_sources[0x3a] 189157 1 T1 15 T2 384 T3 242
valid_sources[0x3b] 201858 1 T1 5 T2 453 T3 347
valid_sources[0x3c] 204522 1 T1 9 T2 443 T3 335
valid_sources[0x3d] 404027 1 T1 25 T2 435 T3 256
valid_sources[0x3e] 189325 1 T1 27 T2 456 T3 258
valid_sources[0x3f] 189286 1 T1 10 T2 372 T3 299
valid_sources[0x40] 194181 1 T1 22 T2 421 T3 207
valid_sources[0x41] 199947 1 T1 27 T2 448 T3 378
valid_sources[0x42] 210579 1 T1 28 T2 356 T3 191
valid_sources[0x43] 201694 1 T1 23 T2 336 T3 224
valid_sources[0x44] 198067 1 T1 21 T2 411 T3 289
valid_sources[0x45] 186059 1 T1 27 T2 418 T3 212
valid_sources[0x46] 187763 1 T1 13 T2 411 T3 259
valid_sources[0x47] 197167 1 T1 27 T2 405 T3 264
valid_sources[0x48] 208982 1 T1 28 T2 461 T3 252
valid_sources[0x49] 182878 1 T1 24 T2 413 T3 263
valid_sources[0x4a] 186379 1 T1 5 T2 396 T3 226
valid_sources[0x4b] 190259 1 T1 22 T2 441 T3 242
valid_sources[0x4c] 180680 1 T1 7 T2 412 T3 244
valid_sources[0x4d] 181195 1 T1 6 T2 392 T3 251
valid_sources[0x4e] 315262 1 T1 31 T2 416 T3 167
valid_sources[0x4f] 175721 1 T1 14 T2 345 T3 197
valid_sources[0x50] 177922 1 T1 5 T2 444 T3 225
valid_sources[0x51] 222156 1 T1 25 T2 388 T3 254
valid_sources[0x52] 184192 1 T1 22 T2 411 T3 247
valid_sources[0x53] 189601 1 T1 29 T2 396 T3 192
valid_sources[0x54] 200841 1 T1 4 T2 401 T3 295
valid_sources[0x55] 188201 1 T1 54 T2 427 T3 285
valid_sources[0x56] 187319 1 T1 6 T2 381 T3 260
valid_sources[0x57] 240382 1 T1 4 T2 418 T3 248
valid_sources[0x58] 181687 1 T1 19 T2 413 T3 261
valid_sources[0x59] 179605 1 T1 11 T2 360 T3 186
valid_sources[0x5a] 195885 1 T1 10 T2 526 T3 331
valid_sources[0x5b] 196912 1 T1 24 T2 438 T3 196
valid_sources[0x5c] 206779 1 T1 7 T2 411 T3 202
valid_sources[0x5d] 192627 1 T1 7 T2 446 T3 289
valid_sources[0x5e] 175929 1 T1 15 T2 413 T3 301
valid_sources[0x5f] 206731 1 T1 34 T2 407 T3 244
valid_sources[0x60] 189226 1 T1 14 T2 435 T3 339
valid_sources[0x61] 185570 1 T1 15 T2 398 T3 235
valid_sources[0x62] 219952 1 T1 67 T2 398 T3 219
valid_sources[0x63] 193475 1 T1 7 T2 453 T3 266
valid_sources[0x64] 174802 1 T1 25 T2 421 T3 221
valid_sources[0x65] 203860 1 T1 1 T2 365 T3 227
valid_sources[0x66] 203617 1 T1 37 T2 343 T3 262
valid_sources[0x67] 208056 1 T1 32 T2 390 T3 259
valid_sources[0x68] 179205 1 T1 19 T2 443 T3 235
valid_sources[0x69] 191509 1 T1 5 T2 382 T3 264
valid_sources[0x6a] 194534 1 T1 15 T2 428 T3 287
valid_sources[0x6b] 185982 1 T1 47 T2 434 T3 221
valid_sources[0x6c] 192058 1 T1 16 T2 358 T3 222
valid_sources[0x6d] 195077 1 T1 11 T2 390 T3 230
valid_sources[0x6e] 207045 1 T1 8 T2 417 T3 261
valid_sources[0x6f] 214311 1 T1 47 T2 401 T3 229
valid_sources[0x70] 202177 1 T1 35 T2 428 T3 232
valid_sources[0x71] 199752 1 T1 26 T2 345 T3 253
valid_sources[0x72] 192648 1 T1 4 T2 432 T3 284
valid_sources[0x73] 196143 1 T1 19 T2 447 T3 235
valid_sources[0x74] 188285 1 T1 22 T2 421 T3 224
valid_sources[0x75] 222563 1 T1 26 T2 357 T3 184
valid_sources[0x76] 191400 1 T1 42 T2 324 T3 234
valid_sources[0x77] 199215 1 T1 39 T2 404 T3 278
valid_sources[0x78] 174473 1 T1 9 T2 408 T3 221
valid_sources[0x79] 191811 1 T1 11 T2 416 T3 240
valid_sources[0x7a] 212126 1 T1 29 T2 490 T3 237
valid_sources[0x7b] 203561 1 T1 12 T2 392 T3 297
valid_sources[0x7c] 213401 1 T1 24 T2 400 T3 189
valid_sources[0x7d] 196080 1 T1 12 T2 385 T3 237
valid_sources[0x7e] 180774 1 T1 20 T2 474 T3 199
valid_sources[0x7f] 201558 1 T1 6 T2 399 T3 314
valid_sources[0x80] 181835 1 T1 14 T2 349 T3 309



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 9731961 1 T1 12 T2 20183 T3 14792
values[0x0] all_enables biggest_size 245553 1 T1 40 T2 238 T3 424
values[0x1] all_enables biggest_size 170946 1 T1 24 T2 139 T3 358

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%