Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44752601	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

10699485

1

T1

4111

T2

3595

T3

9327

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	54503737	1			T1	30538		T2	7038		T3	38034
values[0x0]	473106	1			T1	292		T2	86		T3	337
values[0x1]	475243	1			T1	278		T2	92		T3	295

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31834385	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

23617701

1

T1

12489

T2

4304

T3

17821

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	205203	1			T1	140		T2	25		T3	182
valid_sources[0x01]	208146	1			T1	107		T2	32		T3	509
valid_sources[0x02]	233827	1			T1	112		T2	26		T3	169
valid_sources[0x03]	180766	1			T1	128		T2	27		T3	89
valid_sources[0x04]	197679	1			T1	120		T2	19		T3	244
valid_sources[0x05]	233082	1			T1	155		T2	21		T3	127
valid_sources[0x06]	312725	1			T1	143		T2	24		T3	50
valid_sources[0x07]	201118	1			T1	119		T2	28		T3	262
valid_sources[0x08]	194819	1			T1	133		T2	32		T3	121
valid_sources[0x09]	191132	1			T1	116		T2	21		T3	70
valid_sources[0x0a]	190638	1			T1	136		T2	34		T3	89
valid_sources[0x0b]	381399	1			T1	136		T2	25		T3	279
valid_sources[0x0c]	190948	1			T1	121		T2	31		T3	243
valid_sources[0x0d]	235401	1			T1	133		T2	28		T3	146
valid_sources[0x0e]	195081	1			T1	145		T2	29		T3	76
valid_sources[0x0f]	180807	1			T1	127		T2	30		T3	114
valid_sources[0x10]	204082	1			T1	128		T2	32		T3	94
valid_sources[0x11]	203486	1			T1	133		T2	38		T3	66
valid_sources[0x12]	194068	1			T1	108		T2	31		T3	40
valid_sources[0x13]	194533	1			T1	112		T2	27		T3	122
valid_sources[0x14]	184274	1			T1	114		T2	21		T3	143
valid_sources[0x15]	248425	1			T1	115		T2	25		T3	95
valid_sources[0x16]	215074	1			T1	127		T2	39		T3	183
valid_sources[0x17]	191555	1			T1	122		T2	28		T3	129
valid_sources[0x18]	207150	1			T1	121		T2	21		T3	338
valid_sources[0x19]	219948	1			T1	115		T2	27		T3	159
valid_sources[0x1a]	198013	1			T1	100		T2	25		T3	150
valid_sources[0x1b]	192726	1			T1	136		T2	27		T3	41
valid_sources[0x1c]	189912	1			T1	96		T2	31		T3	41
valid_sources[0x1d]	199196	1			T1	101		T2	29		T3	255
valid_sources[0x1e]	226970	1			T1	111		T2	23		T3	113
valid_sources[0x1f]	188782	1			T1	117		T2	34		T3	164
valid_sources[0x20]	195744	1			T1	114		T2	25		T3	113
valid_sources[0x21]	194578	1			T1	120		T2	29		T3	267
valid_sources[0x22]	217358	1			T1	122		T2	33		T3	117
valid_sources[0x23]	204883	1			T1	118		T2	18		T3	169
valid_sources[0x24]	188834	1			T1	129		T2	33		T3	154
valid_sources[0x25]	203051	1			T1	119		T2	28		T3	154
valid_sources[0x26]	202908	1			T1	134		T2	19		T3	182
valid_sources[0x27]	224229	1			T1	130		T2	27		T3	180
valid_sources[0x28]	202809	1			T1	130		T2	28		T3	74
valid_sources[0x29]	190186	1			T1	135		T2	30		T3	184
valid_sources[0x2a]	214729	1			T1	123		T2	22		T3	204
valid_sources[0x2b]	191599	1			T1	119		T2	20		T3	207
valid_sources[0x2c]	195242	1			T1	111		T2	23		T3	190
valid_sources[0x2d]	213387	1			T1	137		T2	33		T3	162
valid_sources[0x2e]	183544	1			T1	121		T2	23		T3	116
valid_sources[0x2f]	188906	1			T1	121		T2	35		T3	186
valid_sources[0x30]	197296	1			T1	102		T2	29		T3	216
valid_sources[0x31]	205398	1			T1	141		T2	24		T3	192
valid_sources[0x32]	199683	1			T1	117		T2	34		T3	122
valid_sources[0x33]	211503	1			T1	123		T2	35		T3	173
valid_sources[0x34]	183114	1			T1	140		T2	27		T3	146
valid_sources[0x35]	201572	1			T1	108		T2	26		T3	169
valid_sources[0x36]	187537	1			T1	127		T2	22		T3	205
valid_sources[0x37]	182078	1			T1	125		T2	29		T3	47
valid_sources[0x38]	204709	1			T1	101		T2	37		T3	63
valid_sources[0x39]	207274	1			T1	122		T2	23		T3	50
valid_sources[0x3a]	217977	1			T1	101		T2	37		T3	75
valid_sources[0x3b]	194689	1			T1	105		T2	18		T3	100
valid_sources[0x3c]	199186	1			T1	111		T2	26		T3	167
valid_sources[0x3d]	191069	1			T1	104		T2	25		T3	140
valid_sources[0x3e]	199043	1			T1	121		T2	32		T3	111
valid_sources[0x3f]	262567	1			T1	128		T2	29		T3	158
valid_sources[0x40]	214202	1			T1	106		T2	28		T3	97
valid_sources[0x41]	219490	1			T1	105		T2	31		T3	122
valid_sources[0x42]	179616	1			T1	132		T2	27		T3	108
valid_sources[0x43]	208718	1			T1	125		T2	28		T3	136
valid_sources[0x44]	269400	1			T1	107		T2	33		T3	232
valid_sources[0x45]	198909	1			T1	112		T2	26		T3	170
valid_sources[0x46]	204074	1			T1	120		T2	23		T3	26
valid_sources[0x47]	202436	1			T1	123		T2	23		T3	301
valid_sources[0x48]	199966	1			T1	136		T2	30		T3	286
valid_sources[0x49]	200016	1			T1	120		T2	31		T3	257
valid_sources[0x4a]	212395	1			T1	103		T2	27		T3	107
valid_sources[0x4b]	193535	1			T1	119		T2	32		T3	145
valid_sources[0x4c]	204851	1			T1	120		T2	38		T3	72
valid_sources[0x4d]	211204	1			T1	119		T2	21		T3	213
valid_sources[0x4e]	188493	1			T1	114		T2	32		T3	49
valid_sources[0x4f]	194454	1			T1	112		T2	16		T3	224
valid_sources[0x50]	192697	1			T1	133		T2	29		T3	268
valid_sources[0x51]	191006	1			T1	122		T2	24		T3	149
valid_sources[0x52]	204775	1			T1	131		T2	28		T3	189
valid_sources[0x53]	262120	1			T1	121		T2	27		T3	211
valid_sources[0x54]	183888	1			T1	130		T2	35		T3	118
valid_sources[0x55]	196278	1			T1	126		T2	18		T3	122
valid_sources[0x56]	195577	1			T1	115		T2	42		T3	179
valid_sources[0x57]	223303	1			T1	104		T2	20		T3	207
valid_sources[0x58]	186053	1			T1	113		T2	30		T3	290
valid_sources[0x59]	173869	1			T1	113		T2	20		T3	130
valid_sources[0x5a]	218658	1			T1	103		T2	45		T3	108
valid_sources[0x5b]	190374	1			T1	143		T2	22		T3	162
valid_sources[0x5c]	200279	1			T1	118		T2	18		T3	208
valid_sources[0x5d]	211801	1			T1	101		T2	26		T3	58
valid_sources[0x5e]	197569	1			T1	125		T2	37		T3	172
valid_sources[0x5f]	221367	1			T1	117		T2	27		T3	213
valid_sources[0x60]	182239	1			T1	120		T2	28		T3	160
valid_sources[0x61]	201272	1			T1	125		T2	17		T3	87
valid_sources[0x62]	329649	1			T1	122		T2	37		T3	137
valid_sources[0x63]	207560	1			T1	131		T2	27		T3	257
valid_sources[0x64]	190240	1			T1	127		T2	25		T3	104
valid_sources[0x65]	183981	1			T1	114		T2	31		T3	223
valid_sources[0x66]	529604	1			T1	118		T2	31		T3	151
valid_sources[0x67]	191460	1			T1	130		T2	31		T3	77
valid_sources[0x68]	192576	1			T1	118		T2	24		T3	117
valid_sources[0x69]	196624	1			T1	118		T2	26		T3	50
valid_sources[0x6a]	202546	1			T1	109		T2	29		T3	82
valid_sources[0x6b]	186065	1			T1	120		T2	27		T3	143
valid_sources[0x6c]	199965	1			T1	116		T2	25		T3	92
valid_sources[0x6d]	184862	1			T1	132		T2	19		T3	40
valid_sources[0x6e]	183414	1			T1	125		T2	26		T3	193
valid_sources[0x6f]	183032	1			T1	127		T2	37		T3	38
valid_sources[0x70]	208892	1			T1	111		T2	36		T3	126
valid_sources[0x71]	202837	1			T1	122		T2	24		T3	115
valid_sources[0x72]	225883	1			T1	126		T2	24		T3	121
valid_sources[0x73]	194822	1			T1	120		T2	30		T3	20
valid_sources[0x74]	198954	1			T1	109		T2	19		T3	274
valid_sources[0x75]	195321	1			T1	114		T2	36		T3	119
valid_sources[0x76]	188768	1			T1	145		T2	26		T3	214
valid_sources[0x77]	208616	1			T1	128		T2	30		T3	41
valid_sources[0x78]	192035	1			T1	116		T2	26		T3	342
valid_sources[0x79]	213730	1			T1	119		T2	30		T3	41
valid_sources[0x7a]	197333	1			T1	116		T2	25		T3	57
valid_sources[0x7b]	192035	1			T1	119		T2	26		T3	292
valid_sources[0x7c]	699987	1			T1	122		T2	25		T3	185
valid_sources[0x7d]	221154	1			T1	135		T2	32		T3	126
valid_sources[0x7e]	226006	1			T1	113		T2	42		T3	81
valid_sources[0x7f]	197304	1			T1	135		T2	40		T3	212
valid_sources[0x80]	185739	1			T1	114		T2	26		T3	26

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

10284485

1

T1

3748

T2

3467

T3

9031

values[0x0]

all_enables

biggest_size

244534

1

T1

199

T2

67

T3

195

values[0x1]

all_enables

biggest_size

170466

1

T1

164

T2

61

T3

101