T1307 |
/workspace/coverage/default/33.i2c_host_may_nack.4120416955 |
|
|
May 30 12:42:31 PM PDT 24 |
May 30 12:42:41 PM PDT 24 |
543221091 ps |
T1308 |
/workspace/coverage/default/42.i2c_host_may_nack.2835965389 |
|
|
May 30 12:43:30 PM PDT 24 |
May 30 12:43:33 PM PDT 24 |
157412770 ps |
T1309 |
/workspace/coverage/default/42.i2c_host_fifo_reset_rx.891081037 |
|
|
May 30 12:43:31 PM PDT 24 |
May 30 12:43:39 PM PDT 24 |
246144678 ps |
T1310 |
/workspace/coverage/default/39.i2c_host_fifo_watermark.2171459433 |
|
|
May 30 12:43:07 PM PDT 24 |
May 30 12:44:35 PM PDT 24 |
14758946310 ps |
T1311 |
/workspace/coverage/default/24.i2c_host_fifo_reset_fmt.2640721622 |
|
|
May 30 12:41:27 PM PDT 24 |
May 30 12:41:29 PM PDT 24 |
420717914 ps |
T1312 |
/workspace/coverage/default/30.i2c_target_intr_smoke.844314386 |
|
|
May 30 12:42:10 PM PDT 24 |
May 30 12:42:17 PM PDT 24 |
3985399999 ps |
T1313 |
/workspace/coverage/default/1.i2c_target_stretch.1671601310 |
|
|
May 30 12:37:49 PM PDT 24 |
May 30 01:00:54 PM PDT 24 |
12716161489 ps |
T1314 |
/workspace/coverage/default/36.i2c_host_fifo_reset_rx.1258710868 |
|
|
May 30 12:42:57 PM PDT 24 |
May 30 12:43:01 PM PDT 24 |
190368756 ps |
T1315 |
/workspace/coverage/default/3.i2c_host_fifo_watermark.3166721048 |
|
|
May 30 12:38:18 PM PDT 24 |
May 30 12:43:52 PM PDT 24 |
4106994179 ps |
T1316 |
/workspace/coverage/default/36.i2c_target_fifo_reset_acq.1934867546 |
|
|
May 30 12:42:53 PM PDT 24 |
May 30 12:43:09 PM PDT 24 |
10217252445 ps |
T1317 |
/workspace/coverage/default/8.i2c_host_fifo_reset_fmt.2701608680 |
|
|
May 30 12:39:11 PM PDT 24 |
May 30 12:39:13 PM PDT 24 |
805360436 ps |
T180 |
/workspace/coverage/default/0.i2c_sec_cm.4252534734 |
|
|
May 30 12:37:54 PM PDT 24 |
May 30 12:37:56 PM PDT 24 |
86967715 ps |
T1318 |
/workspace/coverage/default/25.i2c_host_stress_all.3221463072 |
|
|
May 30 12:41:36 PM PDT 24 |
May 30 12:46:49 PM PDT 24 |
101659652047 ps |
T1319 |
/workspace/coverage/default/39.i2c_target_bad_addr.106388740 |
|
|
May 30 12:43:16 PM PDT 24 |
May 30 12:43:20 PM PDT 24 |
1483061770 ps |
T1320 |
/workspace/coverage/default/32.i2c_target_fifo_reset_acq.3115687527 |
|
|
May 30 12:42:21 PM PDT 24 |
May 30 12:43:09 PM PDT 24 |
10086320567 ps |
T1321 |
/workspace/coverage/default/30.i2c_host_stretch_timeout.1974919505 |
|
|
May 30 12:42:15 PM PDT 24 |
May 30 12:42:25 PM PDT 24 |
2216021011 ps |
T1322 |
/workspace/coverage/default/20.i2c_host_fifo_overflow.265169382 |
|
|
May 30 12:41:01 PM PDT 24 |
May 30 12:42:35 PM PDT 24 |
1483834732 ps |
T1323 |
/workspace/coverage/default/12.i2c_host_mode_toggle.2606564859 |
|
|
May 30 12:39:58 PM PDT 24 |
May 30 12:41:18 PM PDT 24 |
1762706650 ps |
T1324 |
/workspace/coverage/default/20.i2c_host_fifo_full.3043429267 |
|
|
May 30 12:40:58 PM PDT 24 |
May 30 12:41:43 PM PDT 24 |
3008061198 ps |
T1325 |
/workspace/coverage/default/12.i2c_target_stress_rd.3675513286 |
|
|
May 30 12:39:49 PM PDT 24 |
May 30 12:40:44 PM PDT 24 |
1253522779 ps |
T1326 |
/workspace/coverage/default/9.i2c_host_error_intr.1997416444 |
|
|
May 30 12:39:19 PM PDT 24 |
May 30 12:39:21 PM PDT 24 |
474345045 ps |
T1327 |
/workspace/coverage/default/30.i2c_host_fifo_overflow.2208129163 |
|
|
May 30 12:42:09 PM PDT 24 |
May 30 12:43:08 PM PDT 24 |
1728911969 ps |
T1328 |
/workspace/coverage/default/4.i2c_alert_test.2749248506 |
|
|
May 30 12:38:43 PM PDT 24 |
May 30 12:38:45 PM PDT 24 |
26669068 ps |
T1329 |
/workspace/coverage/default/31.i2c_host_fifo_full.95744985 |
|
|
May 30 12:42:19 PM PDT 24 |
May 30 12:43:17 PM PDT 24 |
6817477901 ps |
T240 |
/workspace/coverage/default/28.i2c_host_fifo_watermark.3069932332 |
|
|
May 30 12:41:56 PM PDT 24 |
May 30 12:48:26 PM PDT 24 |
36585528547 ps |
T1330 |
/workspace/coverage/default/48.i2c_host_fifo_reset_fmt.1567124684 |
|
|
May 30 12:44:14 PM PDT 24 |
May 30 12:44:16 PM PDT 24 |
158274362 ps |
T1331 |
/workspace/coverage/default/22.i2c_target_intr_smoke.688225448 |
|
|
May 30 12:41:09 PM PDT 24 |
May 30 12:41:15 PM PDT 24 |
879670659 ps |
T1332 |
/workspace/coverage/default/4.i2c_host_override.1343847541 |
|
|
May 30 12:38:33 PM PDT 24 |
May 30 12:38:35 PM PDT 24 |
16443435 ps |
T1333 |
/workspace/coverage/default/38.i2c_host_fifo_fmt_empty.4238816325 |
|
|
May 30 12:43:12 PM PDT 24 |
May 30 12:43:30 PM PDT 24 |
618119961 ps |
T1334 |
/workspace/coverage/default/4.i2c_target_fifo_reset_acq.4268691350 |
|
|
May 30 12:38:43 PM PDT 24 |
May 30 12:38:55 PM PDT 24 |
10364802802 ps |
T1335 |
/workspace/coverage/default/40.i2c_host_may_nack.1569321143 |
|
|
May 30 12:43:24 PM PDT 24 |
May 30 12:43:41 PM PDT 24 |
421706856 ps |
T1336 |
/workspace/coverage/default/45.i2c_target_intr_stress_wr.851571858 |
|
|
May 30 12:44:01 PM PDT 24 |
May 30 12:44:27 PM PDT 24 |
28038302013 ps |
T1337 |
/workspace/coverage/default/44.i2c_target_fifo_reset_tx.4259145709 |
|
|
May 30 12:43:46 PM PDT 24 |
May 30 12:44:01 PM PDT 24 |
10355775190 ps |
T1338 |
/workspace/coverage/default/47.i2c_host_fifo_reset_rx.2649794105 |
|
|
May 30 12:44:13 PM PDT 24 |
May 30 12:44:19 PM PDT 24 |
158550862 ps |
T52 |
/workspace/coverage/default/12.i2c_host_stress_all.1183740533 |
|
|
May 30 12:39:46 PM PDT 24 |
May 30 12:51:13 PM PDT 24 |
21100791228 ps |
T1339 |
/workspace/coverage/default/20.i2c_target_stress_wr.2618125380 |
|
|
May 30 12:40:58 PM PDT 24 |
May 30 12:44:48 PM PDT 24 |
41337297030 ps |
T1340 |
/workspace/coverage/default/40.i2c_host_override.1172389723 |
|
|
May 30 12:43:28 PM PDT 24 |
May 30 12:43:30 PM PDT 24 |
76401623 ps |
T1341 |
/workspace/coverage/default/44.i2c_target_fifo_reset_acq.624410968 |
|
|
May 30 12:43:44 PM PDT 24 |
May 30 12:44:29 PM PDT 24 |
10112530988 ps |
T1342 |
/workspace/coverage/default/32.i2c_target_fifo_watermarks_acq.731952010 |
|
|
May 30 12:42:30 PM PDT 24 |
May 30 12:42:37 PM PDT 24 |
1282307304 ps |
T1343 |
/workspace/coverage/default/16.i2c_target_stress_wr.3935356590 |
|
|
May 30 12:40:28 PM PDT 24 |
May 30 01:16:27 PM PDT 24 |
66149316866 ps |
T1344 |
/workspace/coverage/default/16.i2c_target_smoke.591701512 |
|
|
May 30 12:40:22 PM PDT 24 |
May 30 12:40:58 PM PDT 24 |
943589586 ps |
T1345 |
/workspace/coverage/default/43.i2c_host_fifo_overflow.2950927499 |
|
|
May 30 12:43:41 PM PDT 24 |
May 30 12:44:33 PM PDT 24 |
3412741465 ps |
T1346 |
/workspace/coverage/default/48.i2c_target_fifo_reset_acq.1030829145 |
|
|
May 30 12:44:17 PM PDT 24 |
May 30 12:44:53 PM PDT 24 |
10094827081 ps |
T1347 |
/workspace/coverage/default/37.i2c_target_stress_rd.1180211007 |
|
|
May 30 12:43:08 PM PDT 24 |
May 30 12:43:17 PM PDT 24 |
1648971642 ps |
T242 |
/workspace/coverage/default/49.i2c_host_stretch_timeout.3901820106 |
|
|
May 30 12:44:18 PM PDT 24 |
May 30 12:44:29 PM PDT 24 |
2617914707 ps |
T1348 |
/workspace/coverage/default/33.i2c_host_fifo_reset_rx.1968428841 |
|
|
May 30 12:42:35 PM PDT 24 |
May 30 12:42:42 PM PDT 24 |
2529268585 ps |
T1349 |
/workspace/coverage/default/37.i2c_target_fifo_reset_acq.549696509 |
|
|
May 30 12:43:08 PM PDT 24 |
May 30 12:43:54 PM PDT 24 |
10109708590 ps |
T1350 |
/workspace/coverage/default/9.i2c_target_intr_stress_wr.1536196027 |
|
|
May 30 12:39:20 PM PDT 24 |
May 30 12:39:43 PM PDT 24 |
11606312139 ps |
T1351 |
/workspace/coverage/default/28.i2c_target_fifo_reset_acq.2436041495 |
|
|
May 30 12:41:56 PM PDT 24 |
May 30 12:42:44 PM PDT 24 |
10096255239 ps |
T49 |
/workspace/coverage/default/36.i2c_host_stress_all.2399050310 |
|
|
May 30 12:42:58 PM PDT 24 |
May 30 12:51:15 PM PDT 24 |
13749962805 ps |
T1352 |
/workspace/coverage/default/31.i2c_alert_test.2605657984 |
|
|
May 30 12:42:20 PM PDT 24 |
May 30 12:42:22 PM PDT 24 |
34326039 ps |
T1353 |
/workspace/coverage/default/18.i2c_target_hrst.2679862610 |
|
|
May 30 12:40:46 PM PDT 24 |
May 30 12:40:50 PM PDT 24 |
2156465975 ps |
T1354 |
/workspace/coverage/default/25.i2c_host_override.952451304 |
|
|
May 30 12:41:29 PM PDT 24 |
May 30 12:41:30 PM PDT 24 |
53922236 ps |
T1355 |
/workspace/coverage/default/30.i2c_target_fifo_watermarks_acq.2281180981 |
|
|
May 30 12:42:10 PM PDT 24 |
May 30 12:42:18 PM PDT 24 |
1534094424 ps |
T1356 |
/workspace/coverage/default/22.i2c_target_fifo_watermarks_tx.3033126414 |
|
|
May 30 12:41:11 PM PDT 24 |
May 30 12:41:15 PM PDT 24 |
1314174804 ps |
T1357 |
/workspace/coverage/default/7.i2c_host_error_intr.1542168034 |
|
|
May 30 12:39:08 PM PDT 24 |
May 30 12:39:11 PM PDT 24 |
664480094 ps |
T1358 |
/workspace/coverage/default/6.i2c_target_fifo_watermarks_tx.2746121468 |
|
|
May 30 12:39:02 PM PDT 24 |
May 30 12:39:04 PM PDT 24 |
1327633661 ps |
T1359 |
/workspace/coverage/default/11.i2c_target_hrst.1417197358 |
|
|
May 30 12:39:46 PM PDT 24 |
May 30 12:39:50 PM PDT 24 |
364296319 ps |
T1360 |
/workspace/coverage/default/5.i2c_target_stress_rd.1569777134 |
|
|
May 30 12:38:46 PM PDT 24 |
May 30 12:39:18 PM PDT 24 |
7296545764 ps |
T1361 |
/workspace/coverage/default/8.i2c_host_mode_toggle.2004776875 |
|
|
May 30 12:39:20 PM PDT 24 |
May 30 12:39:51 PM PDT 24 |
3577677008 ps |
T1362 |
/workspace/coverage/default/30.i2c_target_stress_wr.2045197827 |
|
|
May 30 12:42:05 PM PDT 24 |
May 30 12:42:17 PM PDT 24 |
17438055539 ps |
T1363 |
/workspace/coverage/default/47.i2c_host_override.267415758 |
|
|
May 30 12:44:14 PM PDT 24 |
May 30 12:44:16 PM PDT 24 |
18200950 ps |
T1364 |
/workspace/coverage/default/31.i2c_target_intr_stress_wr.8510168 |
|
|
May 30 12:42:20 PM PDT 24 |
May 30 12:42:50 PM PDT 24 |
10668399724 ps |
T1365 |
/workspace/coverage/default/36.i2c_host_mode_toggle.1967786848 |
|
|
May 30 12:43:06 PM PDT 24 |
May 30 12:44:14 PM PDT 24 |
1517941884 ps |
T1366 |
/workspace/coverage/default/29.i2c_target_stress_rd.2438410054 |
|
|
May 30 12:42:06 PM PDT 24 |
May 30 12:42:28 PM PDT 24 |
1128775895 ps |
T1367 |
/workspace/coverage/default/6.i2c_target_timeout.2598543451 |
|
|
May 30 12:38:58 PM PDT 24 |
May 30 12:39:07 PM PDT 24 |
3117422814 ps |
T1368 |
/workspace/coverage/default/4.i2c_host_smoke.4253430171 |
|
|
May 30 12:38:32 PM PDT 24 |
May 30 12:39:04 PM PDT 24 |
1520732628 ps |
T1369 |
/workspace/coverage/default/49.i2c_host_smoke.325597242 |
|
|
May 30 12:44:19 PM PDT 24 |
May 30 12:45:28 PM PDT 24 |
1647195989 ps |
T1370 |
/workspace/coverage/default/10.i2c_target_intr_smoke.2418282217 |
|
|
May 30 12:39:32 PM PDT 24 |
May 30 12:39:39 PM PDT 24 |
11404683292 ps |
T1371 |
/workspace/coverage/default/33.i2c_target_timeout.578646850 |
|
|
May 30 12:42:31 PM PDT 24 |
May 30 12:42:40 PM PDT 24 |
5140201007 ps |
T117 |
/workspace/coverage/default/24.i2c_host_stress_all.2227585690 |
|
|
May 30 12:41:28 PM PDT 24 |
May 30 12:45:07 PM PDT 24 |
52531025724 ps |
T1372 |
/workspace/coverage/default/16.i2c_target_intr_smoke.245323996 |
|
|
May 30 12:40:24 PM PDT 24 |
May 30 12:40:31 PM PDT 24 |
2384222576 ps |
T1373 |
/workspace/coverage/default/5.i2c_alert_test.253057963 |
|
|
May 30 12:38:46 PM PDT 24 |
May 30 12:38:47 PM PDT 24 |
16437427 ps |
T1374 |
/workspace/coverage/default/31.i2c_host_perf.1905297315 |
|
|
May 30 12:42:20 PM PDT 24 |
May 30 12:44:10 PM PDT 24 |
12123721557 ps |
T1375 |
/workspace/coverage/default/43.i2c_target_intr_stress_wr.728671478 |
|
|
May 30 12:43:47 PM PDT 24 |
May 30 12:44:10 PM PDT 24 |
11045415341 ps |
T1376 |
/workspace/coverage/default/11.i2c_host_fifo_fmt_empty.4115820372 |
|
|
May 30 12:39:33 PM PDT 24 |
May 30 12:39:41 PM PDT 24 |
594220512 ps |
T1377 |
/workspace/coverage/default/37.i2c_target_intr_smoke.3950554890 |
|
|
May 30 12:43:09 PM PDT 24 |
May 30 12:43:17 PM PDT 24 |
1234434972 ps |
T1378 |
/workspace/coverage/default/39.i2c_host_fifo_fmt_empty.1527138571 |
|
|
May 30 12:43:11 PM PDT 24 |
May 30 12:43:22 PM PDT 24 |
491569175 ps |
T1379 |
/workspace/coverage/default/4.i2c_host_fifo_full.2064145921 |
|
|
May 30 12:38:32 PM PDT 24 |
May 30 12:40:22 PM PDT 24 |
2995545592 ps |
T1380 |
/workspace/coverage/default/49.i2c_alert_test.2107557567 |
|
|
May 30 12:44:28 PM PDT 24 |
May 30 12:44:30 PM PDT 24 |
44751278 ps |
T1381 |
/workspace/coverage/default/42.i2c_host_mode_toggle.1756464171 |
|
|
May 30 12:43:32 PM PDT 24 |
May 30 12:43:58 PM PDT 24 |
1725139232 ps |
T1382 |
/workspace/coverage/default/30.i2c_host_perf.161132003 |
|
|
May 30 12:42:05 PM PDT 24 |
May 30 12:42:37 PM PDT 24 |
2786478121 ps |
T1383 |
/workspace/coverage/default/38.i2c_target_fifo_watermarks_tx.1890898400 |
|
|
May 30 12:43:11 PM PDT 24 |
May 30 12:43:16 PM PDT 24 |
1178504187 ps |
T1384 |
/workspace/coverage/default/39.i2c_host_stretch_timeout.3731137455 |
|
|
May 30 12:43:10 PM PDT 24 |
May 30 12:43:29 PM PDT 24 |
3785098949 ps |
T1385 |
/workspace/coverage/default/7.i2c_target_intr_stress_wr.1652876632 |
|
|
May 30 12:39:07 PM PDT 24 |
May 30 12:49:33 PM PDT 24 |
23414499005 ps |
T118 |
/workspace/coverage/default/11.i2c_host_stress_all.2103671779 |
|
|
May 30 12:39:45 PM PDT 24 |
May 30 12:56:59 PM PDT 24 |
64022395057 ps |
T1386 |
/workspace/coverage/default/29.i2c_target_fifo_watermarks_tx.3134612101 |
|
|
May 30 12:42:10 PM PDT 24 |
May 30 12:42:14 PM PDT 24 |
1263102411 ps |
T1387 |
/workspace/coverage/default/25.i2c_host_fifo_reset_rx.2155277377 |
|
|
May 30 12:41:35 PM PDT 24 |
May 30 12:41:40 PM PDT 24 |
585578655 ps |
T1388 |
/workspace/coverage/default/6.i2c_host_stretch_timeout.2587287190 |
|
|
May 30 12:38:56 PM PDT 24 |
May 30 12:39:13 PM PDT 24 |
5251215453 ps |
T1389 |
/workspace/coverage/default/22.i2c_host_fifo_overflow.1899006221 |
|
|
May 30 12:41:09 PM PDT 24 |
May 30 12:42:42 PM PDT 24 |
2823485899 ps |
T1390 |
/workspace/coverage/default/5.i2c_host_stress_all.3481810666 |
|
|
May 30 12:38:45 PM PDT 24 |
May 30 12:43:06 PM PDT 24 |
25940640424 ps |
T1391 |
/workspace/coverage/default/23.i2c_target_stress_wr.2728893672 |
|
|
May 30 12:41:14 PM PDT 24 |
May 30 01:25:23 PM PDT 24 |
69033753866 ps |
T1392 |
/workspace/coverage/default/43.i2c_target_bad_addr.778954338 |
|
|
May 30 12:43:43 PM PDT 24 |
May 30 12:43:48 PM PDT 24 |
3363309659 ps |
T1393 |
/workspace/coverage/default/16.i2c_host_perf.1543112548 |
|
|
May 30 12:40:27 PM PDT 24 |
May 30 12:41:13 PM PDT 24 |
7254589240 ps |
T1394 |
/workspace/coverage/default/28.i2c_host_fifo_reset_fmt.3598733045 |
|
|
May 30 12:41:53 PM PDT 24 |
May 30 12:41:54 PM PDT 24 |
214357928 ps |
T1395 |
/workspace/coverage/default/41.i2c_host_perf.998166948 |
|
|
May 30 12:43:25 PM PDT 24 |
May 30 12:47:38 PM PDT 24 |
17536809156 ps |
T1396 |
/workspace/coverage/default/31.i2c_host_stretch_timeout.877929255 |
|
|
May 30 12:42:22 PM PDT 24 |
May 30 12:42:38 PM PDT 24 |
785363878 ps |
T1397 |
/workspace/coverage/default/39.i2c_target_stress_wr.4097009762 |
|
|
May 30 12:43:12 PM PDT 24 |
May 30 12:47:15 PM PDT 24 |
60587647563 ps |
T1398 |
/workspace/coverage/default/12.i2c_target_fifo_reset_acq.541726072 |
|
|
May 30 12:39:50 PM PDT 24 |
May 30 12:40:15 PM PDT 24 |
10224612602 ps |
T1399 |
/workspace/coverage/default/1.i2c_host_override.1958911806 |
|
|
May 30 12:37:54 PM PDT 24 |
May 30 12:37:56 PM PDT 24 |
48238627 ps |
T1400 |
/workspace/coverage/default/43.i2c_host_error_intr.3214857556 |
|
|
May 30 12:43:34 PM PDT 24 |
May 30 12:43:36 PM PDT 24 |
110524429 ps |
T1401 |
/workspace/coverage/default/35.i2c_target_hrst.2365975333 |
|
|
May 30 12:42:52 PM PDT 24 |
May 30 12:42:55 PM PDT 24 |
340128678 ps |
T1402 |
/workspace/coverage/default/32.i2c_target_fifo_watermarks_tx.3656351818 |
|
|
May 30 12:42:31 PM PDT 24 |
May 30 12:42:37 PM PDT 24 |
1036202189 ps |
T1403 |
/workspace/coverage/default/46.i2c_host_mode_toggle.1050630473 |
|
|
May 30 12:44:12 PM PDT 24 |
May 30 12:44:54 PM PDT 24 |
7841505911 ps |
T1404 |
/workspace/coverage/default/42.i2c_host_smoke.126290495 |
|
|
May 30 12:43:30 PM PDT 24 |
May 30 12:45:08 PM PDT 24 |
1975141124 ps |
T1405 |
/workspace/coverage/default/28.i2c_target_hrst.1675749539 |
|
|
May 30 12:42:10 PM PDT 24 |
May 30 12:42:14 PM PDT 24 |
1046821942 ps |
T1406 |
/workspace/coverage/default/33.i2c_target_fifo_watermarks_tx.3332309166 |
|
|
May 30 12:42:35 PM PDT 24 |
May 30 12:42:41 PM PDT 24 |
1046083404 ps |
T1407 |
/workspace/coverage/default/33.i2c_host_fifo_fmt_empty.1013917181 |
|
|
May 30 12:42:31 PM PDT 24 |
May 30 12:42:47 PM PDT 24 |
1109347293 ps |
T1408 |
/workspace/coverage/default/43.i2c_target_fifo_watermarks_tx.903804760 |
|
|
May 30 12:43:43 PM PDT 24 |
May 30 12:43:49 PM PDT 24 |
1057424384 ps |
T1409 |
/workspace/coverage/default/16.i2c_host_stretch_timeout.307635292 |
|
|
May 30 12:40:24 PM PDT 24 |
May 30 12:40:36 PM PDT 24 |
3769853168 ps |
T1410 |
/workspace/coverage/default/3.i2c_target_fifo_reset_tx.4252472384 |
|
|
May 30 12:38:33 PM PDT 24 |
May 30 12:38:42 PM PDT 24 |
10948127493 ps |
T119 |
/workspace/coverage/default/3.i2c_host_stress_all.4106706531 |
|
|
May 30 12:38:32 PM PDT 24 |
May 30 12:43:59 PM PDT 24 |
9766266232 ps |
T1411 |
/workspace/coverage/default/6.i2c_target_intr_smoke.988358793 |
|
|
May 30 12:38:56 PM PDT 24 |
May 30 12:39:04 PM PDT 24 |
2248709473 ps |
T1412 |
/workspace/coverage/default/27.i2c_host_fifo_overflow.1331943361 |
|
|
May 30 12:41:50 PM PDT 24 |
May 30 12:44:50 PM PDT 24 |
8717322484 ps |
T120 |
/workspace/coverage/default/21.i2c_host_stress_all.1213835821 |
|
|
May 30 12:41:02 PM PDT 24 |
May 30 12:51:53 PM PDT 24 |
62869984879 ps |
T1413 |
/workspace/coverage/default/34.i2c_target_stretch.1247631464 |
|
|
May 30 12:42:36 PM PDT 24 |
May 30 12:45:09 PM PDT 24 |
11886763475 ps |
T1414 |
/workspace/coverage/default/8.i2c_target_intr_stress_wr.975332013 |
|
|
May 30 12:39:22 PM PDT 24 |
May 30 12:39:45 PM PDT 24 |
14824822229 ps |
T1415 |
/workspace/coverage/default/11.i2c_host_stretch_timeout.1441792615 |
|
|
May 30 12:39:45 PM PDT 24 |
May 30 12:39:56 PM PDT 24 |
644799217 ps |
T1416 |
/workspace/coverage/default/30.i2c_host_mode_toggle.3098717029 |
|
|
May 30 12:42:10 PM PDT 24 |
May 30 12:43:53 PM PDT 24 |
8133542716 ps |
T1417 |
/workspace/coverage/default/45.i2c_target_bad_addr.1192766341 |
|
|
May 30 12:44:00 PM PDT 24 |
May 30 12:44:06 PM PDT 24 |
928307838 ps |
T1418 |
/workspace/coverage/default/20.i2c_host_stretch_timeout.82502291 |
|
|
May 30 12:40:56 PM PDT 24 |
May 30 12:41:06 PM PDT 24 |
669391010 ps |
T1419 |
/workspace/coverage/default/44.i2c_host_mode_toggle.994663986 |
|
|
May 30 12:44:01 PM PDT 24 |
May 30 12:45:21 PM PDT 24 |
4065347071 ps |
T1420 |
/workspace/coverage/default/46.i2c_host_fifo_overflow.2722605551 |
|
|
May 30 12:44:02 PM PDT 24 |
May 30 12:45:36 PM PDT 24 |
2954858099 ps |
T1421 |
/workspace/coverage/default/23.i2c_host_mode_toggle.2286905907 |
|
|
May 30 12:41:23 PM PDT 24 |
May 30 12:42:38 PM PDT 24 |
6066031471 ps |
T1422 |
/workspace/coverage/default/20.i2c_host_fifo_fmt_empty.714081885 |
|
|
May 30 12:40:57 PM PDT 24 |
May 30 12:41:07 PM PDT 24 |
1515169497 ps |
T1423 |
/workspace/coverage/default/18.i2c_host_mode_toggle.461613246 |
|
|
May 30 12:40:49 PM PDT 24 |
May 30 12:41:30 PM PDT 24 |
1879977371 ps |
T1424 |
/workspace/coverage/default/15.i2c_host_fifo_overflow.2509413112 |
|
|
May 30 12:40:10 PM PDT 24 |
May 30 12:42:15 PM PDT 24 |
6884202114 ps |
T1425 |
/workspace/coverage/default/30.i2c_alert_test.4278549878 |
|
|
May 30 12:42:10 PM PDT 24 |
May 30 12:42:11 PM PDT 24 |
37019611 ps |
T1426 |
/workspace/coverage/default/10.i2c_alert_test.2125403384 |
|
|
May 30 12:39:35 PM PDT 24 |
May 30 12:39:37 PM PDT 24 |
26772498 ps |
T1427 |
/workspace/coverage/default/39.i2c_target_stress_rd.800813043 |
|
|
May 30 12:43:11 PM PDT 24 |
May 30 12:43:24 PM PDT 24 |
2406292313 ps |
T1428 |
/workspace/coverage/default/40.i2c_host_fifo_overflow.3887629442 |
|
|
May 30 12:43:18 PM PDT 24 |
May 30 12:45:00 PM PDT 24 |
6746319641 ps |
T1429 |
/workspace/coverage/default/34.i2c_target_timeout.654391391 |
|
|
May 30 12:42:42 PM PDT 24 |
May 30 12:42:50 PM PDT 24 |
1418414620 ps |
T1430 |
/workspace/coverage/default/26.i2c_target_fifo_reset_tx.4104510494 |
|
|
May 30 12:41:36 PM PDT 24 |
May 30 12:42:08 PM PDT 24 |
10330076837 ps |
T1431 |
/workspace/coverage/default/17.i2c_host_may_nack.2609967263 |
|
|
May 30 12:40:46 PM PDT 24 |
May 30 12:41:04 PM PDT 24 |
429676571 ps |
T1432 |
/workspace/coverage/default/19.i2c_target_fifo_reset_acq.899417590 |
|
|
May 30 12:40:56 PM PDT 24 |
May 30 12:41:10 PM PDT 24 |
10404177799 ps |
T1433 |
/workspace/coverage/default/42.i2c_target_fifo_reset_tx.446145712 |
|
|
May 30 12:43:30 PM PDT 24 |
May 30 12:44:02 PM PDT 24 |
10272480570 ps |
T1434 |
/workspace/coverage/default/6.i2c_host_mode_toggle.3646138789 |
|
|
May 30 12:38:59 PM PDT 24 |
May 30 12:40:07 PM PDT 24 |
3131716318 ps |
T1435 |
/workspace/coverage/default/17.i2c_target_fifo_watermarks_acq.813079634 |
|
|
May 30 12:40:47 PM PDT 24 |
May 30 12:40:53 PM PDT 24 |
1254982476 ps |
T1436 |
/workspace/coverage/default/24.i2c_host_error_intr.3411790986 |
|
|
May 30 12:41:30 PM PDT 24 |
May 30 12:41:33 PM PDT 24 |
480737944 ps |
T121 |
/workspace/coverage/cover_reg_top/32.i2c_intr_test.201230400 |
|
|
May 30 12:35:10 PM PDT 24 |
May 30 12:35:12 PM PDT 24 |
50656714 ps |
T1437 |
/workspace/coverage/cover_reg_top/21.i2c_intr_test.552773211 |
|
|
May 30 12:35:25 PM PDT 24 |
May 30 12:35:26 PM PDT 24 |
56787595 ps |
T175 |
/workspace/coverage/cover_reg_top/18.i2c_tl_errors.2639533625 |
|
|
May 30 12:35:12 PM PDT 24 |
May 30 12:35:16 PM PDT 24 |
106614440 ps |
T147 |
/workspace/coverage/cover_reg_top/18.i2c_csr_mem_rw_with_rand_reset.4094284757 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
105250656 ps |
T148 |
/workspace/coverage/cover_reg_top/7.i2c_same_csr_outstanding.2755279073 |
|
|
May 30 12:35:10 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
60877764 ps |
T176 |
/workspace/coverage/cover_reg_top/10.i2c_tl_errors.1706549958 |
|
|
May 30 12:35:08 PM PDT 24 |
May 30 12:35:12 PM PDT 24 |
47431015 ps |
T94 |
/workspace/coverage/cover_reg_top/13.i2c_csr_rw.4233019419 |
|
|
May 30 12:35:02 PM PDT 24 |
May 30 12:35:04 PM PDT 24 |
29678545 ps |
T95 |
/workspace/coverage/cover_reg_top/7.i2c_tl_errors.1371457169 |
|
|
May 30 12:35:09 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
1906103547 ps |
T113 |
/workspace/coverage/cover_reg_top/4.i2c_csr_hw_reset.1509050976 |
|
|
May 30 12:35:21 PM PDT 24 |
May 30 12:35:23 PM PDT 24 |
179182102 ps |
T197 |
/workspace/coverage/cover_reg_top/0.i2c_csr_rw.113411376 |
|
|
May 30 12:35:22 PM PDT 24 |
May 30 12:35:24 PM PDT 24 |
35072519 ps |
T182 |
/workspace/coverage/cover_reg_top/10.i2c_tl_intg_err.2716178238 |
|
|
May 30 12:35:21 PM PDT 24 |
May 30 12:35:24 PM PDT 24 |
196412326 ps |
T183 |
/workspace/coverage/cover_reg_top/13.i2c_tl_intg_err.3875102199 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:15 PM PDT 24 |
147594872 ps |
T96 |
/workspace/coverage/cover_reg_top/3.i2c_csr_aliasing.4100898617 |
|
|
May 30 12:35:07 PM PDT 24 |
May 30 12:35:09 PM PDT 24 |
253078942 ps |
T1438 |
/workspace/coverage/cover_reg_top/0.i2c_csr_hw_reset.2095571308 |
|
|
May 30 12:34:56 PM PDT 24 |
May 30 12:34:58 PM PDT 24 |
19834622 ps |
T1439 |
/workspace/coverage/cover_reg_top/22.i2c_intr_test.587444515 |
|
|
May 30 12:35:14 PM PDT 24 |
May 30 12:35:15 PM PDT 24 |
47732063 ps |
T1440 |
/workspace/coverage/cover_reg_top/16.i2c_intr_test.3571987809 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
27573275 ps |
T184 |
/workspace/coverage/cover_reg_top/18.i2c_tl_intg_err.1277442905 |
|
|
May 30 12:35:13 PM PDT 24 |
May 30 12:35:16 PM PDT 24 |
994927612 ps |
T1441 |
/workspace/coverage/cover_reg_top/4.i2c_csr_rw.3282197322 |
|
|
May 30 12:35:58 PM PDT 24 |
May 30 12:36:00 PM PDT 24 |
38753133 ps |
T97 |
/workspace/coverage/cover_reg_top/2.i2c_csr_hw_reset.34646638 |
|
|
May 30 12:34:46 PM PDT 24 |
May 30 12:34:48 PM PDT 24 |
44289317 ps |
T98 |
/workspace/coverage/cover_reg_top/6.i2c_csr_rw.3375216617 |
|
|
May 30 12:35:10 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
29837735 ps |
T207 |
/workspace/coverage/cover_reg_top/12.i2c_same_csr_outstanding.3833435034 |
|
|
May 30 12:34:58 PM PDT 24 |
May 30 12:35:00 PM PDT 24 |
23625290 ps |
T99 |
/workspace/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.1312208626 |
|
|
May 30 12:35:20 PM PDT 24 |
May 30 12:35:22 PM PDT 24 |
26706713 ps |
T100 |
/workspace/coverage/cover_reg_top/5.i2c_tl_intg_err.879878554 |
|
|
May 30 12:35:04 PM PDT 24 |
May 30 12:35:07 PM PDT 24 |
109869264 ps |
T1442 |
/workspace/coverage/cover_reg_top/10.i2c_intr_test.1535445646 |
|
|
May 30 12:34:46 PM PDT 24 |
May 30 12:34:48 PM PDT 24 |
24524216 ps |
T208 |
/workspace/coverage/cover_reg_top/10.i2c_same_csr_outstanding.3819690511 |
|
|
May 30 12:34:41 PM PDT 24 |
May 30 12:34:42 PM PDT 24 |
193024928 ps |
T1443 |
/workspace/coverage/cover_reg_top/19.i2c_intr_test.3006446402 |
|
|
May 30 12:35:06 PM PDT 24 |
May 30 12:35:08 PM PDT 24 |
25347993 ps |
T209 |
/workspace/coverage/cover_reg_top/18.i2c_same_csr_outstanding.3188636838 |
|
|
May 30 12:35:26 PM PDT 24 |
May 30 12:35:28 PM PDT 24 |
34922963 ps |
T101 |
/workspace/coverage/cover_reg_top/1.i2c_csr_bit_bash.794891010 |
|
|
May 30 12:35:10 PM PDT 24 |
May 30 12:35:15 PM PDT 24 |
292547345 ps |
T102 |
/workspace/coverage/cover_reg_top/13.i2c_tl_errors.728334606 |
|
|
May 30 12:35:27 PM PDT 24 |
May 30 12:35:30 PM PDT 24 |
126274755 ps |
T1444 |
/workspace/coverage/cover_reg_top/23.i2c_intr_test.739626056 |
|
|
May 30 12:35:05 PM PDT 24 |
May 30 12:35:06 PM PDT 24 |
42981802 ps |
T198 |
/workspace/coverage/cover_reg_top/15.i2c_csr_rw.2028991885 |
|
|
May 30 12:35:06 PM PDT 24 |
May 30 12:35:07 PM PDT 24 |
69155069 ps |
T1445 |
/workspace/coverage/cover_reg_top/45.i2c_intr_test.304005234 |
|
|
May 30 12:35:07 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
42527956 ps |
T103 |
/workspace/coverage/cover_reg_top/7.i2c_csr_rw.2667877388 |
|
|
May 30 12:34:53 PM PDT 24 |
May 30 12:34:54 PM PDT 24 |
78832127 ps |
T145 |
/workspace/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.1458214035 |
|
|
May 30 12:34:40 PM PDT 24 |
May 30 12:34:41 PM PDT 24 |
70993131 ps |
T196 |
/workspace/coverage/cover_reg_top/11.i2c_csr_mem_rw_with_rand_reset.956170819 |
|
|
May 30 12:34:56 PM PDT 24 |
May 30 12:34:58 PM PDT 24 |
99573243 ps |
T210 |
/workspace/coverage/cover_reg_top/11.i2c_csr_rw.805794565 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
20142591 ps |
T1446 |
/workspace/coverage/cover_reg_top/34.i2c_intr_test.2125839830 |
|
|
May 30 12:35:12 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
45641085 ps |
T1447 |
/workspace/coverage/cover_reg_top/8.i2c_csr_mem_rw_with_rand_reset.2765152474 |
|
|
May 30 12:35:03 PM PDT 24 |
May 30 12:35:05 PM PDT 24 |
47573245 ps |
T1448 |
/workspace/coverage/cover_reg_top/16.i2c_tl_errors.3656263744 |
|
|
May 30 12:35:34 PM PDT 24 |
May 30 12:35:37 PM PDT 24 |
528959602 ps |
T146 |
/workspace/coverage/cover_reg_top/9.i2c_same_csr_outstanding.3743433843 |
|
|
May 30 12:34:48 PM PDT 24 |
May 30 12:34:50 PM PDT 24 |
45846090 ps |
T1449 |
/workspace/coverage/cover_reg_top/31.i2c_intr_test.2898705725 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:17 PM PDT 24 |
45011867 ps |
T1450 |
/workspace/coverage/cover_reg_top/12.i2c_csr_rw.175372396 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
71471635 ps |
T1451 |
/workspace/coverage/cover_reg_top/30.i2c_intr_test.2830109219 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:17 PM PDT 24 |
19534699 ps |
T1452 |
/workspace/coverage/cover_reg_top/48.i2c_intr_test.972924263 |
|
|
May 30 12:35:10 PM PDT 24 |
May 30 12:35:11 PM PDT 24 |
30871191 ps |
T1453 |
/workspace/coverage/cover_reg_top/19.i2c_csr_rw.3190248522 |
|
|
May 30 12:35:14 PM PDT 24 |
May 30 12:35:16 PM PDT 24 |
154949812 ps |
T1454 |
/workspace/coverage/cover_reg_top/14.i2c_intr_test.1452332132 |
|
|
May 30 12:35:06 PM PDT 24 |
May 30 12:35:08 PM PDT 24 |
17761368 ps |
T1455 |
/workspace/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.720755835 |
|
|
May 30 12:35:02 PM PDT 24 |
May 30 12:35:05 PM PDT 24 |
233653548 ps |
T1456 |
/workspace/coverage/cover_reg_top/7.i2c_intr_test.2846848915 |
|
|
May 30 12:35:14 PM PDT 24 |
May 30 12:35:15 PM PDT 24 |
16903471 ps |
T1457 |
/workspace/coverage/cover_reg_top/26.i2c_intr_test.1904057715 |
|
|
May 30 12:35:08 PM PDT 24 |
May 30 12:35:10 PM PDT 24 |
26341359 ps |
T1458 |
/workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.3182493900 |
|
|
May 30 12:34:44 PM PDT 24 |
May 30 12:34:47 PM PDT 24 |
267687260 ps |
T1459 |
/workspace/coverage/cover_reg_top/5.i2c_intr_test.649973457 |
|
|
May 30 12:35:12 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
20837293 ps |
T1460 |
/workspace/coverage/cover_reg_top/0.i2c_intr_test.2824648788 |
|
|
May 30 12:35:07 PM PDT 24 |
May 30 12:35:08 PM PDT 24 |
45953755 ps |
T1461 |
/workspace/coverage/cover_reg_top/13.i2c_intr_test.3353235718 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:17 PM PDT 24 |
64822094 ps |
T1462 |
/workspace/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.571104630 |
|
|
May 30 12:34:58 PM PDT 24 |
May 30 12:34:59 PM PDT 24 |
286938623 ps |
T199 |
/workspace/coverage/cover_reg_top/14.i2c_csr_rw.1446037692 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
58545902 ps |
T200 |
/workspace/coverage/cover_reg_top/10.i2c_csr_rw.617345162 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:17 PM PDT 24 |
17169421 ps |
T185 |
/workspace/coverage/cover_reg_top/15.i2c_tl_errors.3337049971 |
|
|
May 30 12:35:06 PM PDT 24 |
May 30 12:35:09 PM PDT 24 |
178414288 ps |
T1463 |
/workspace/coverage/cover_reg_top/15.i2c_intr_test.402460498 |
|
|
May 30 12:35:19 PM PDT 24 |
May 30 12:35:20 PM PDT 24 |
223626422 ps |
T1464 |
/workspace/coverage/cover_reg_top/4.i2c_tl_intg_err.3283548074 |
|
|
May 30 12:35:21 PM PDT 24 |
May 30 12:35:24 PM PDT 24 |
156056692 ps |
T1465 |
/workspace/coverage/cover_reg_top/3.i2c_intr_test.3524925027 |
|
|
May 30 12:35:08 PM PDT 24 |
May 30 12:35:10 PM PDT 24 |
175013913 ps |
T1466 |
/workspace/coverage/cover_reg_top/2.i2c_same_csr_outstanding.3074703878 |
|
|
May 30 12:34:59 PM PDT 24 |
May 30 12:35:01 PM PDT 24 |
153617106 ps |
T201 |
/workspace/coverage/cover_reg_top/2.i2c_csr_aliasing.1481273064 |
|
|
May 30 12:34:56 PM PDT 24 |
May 30 12:34:58 PM PDT 24 |
32449249 ps |
T1467 |
/workspace/coverage/cover_reg_top/19.i2c_same_csr_outstanding.1533399674 |
|
|
May 30 12:34:52 PM PDT 24 |
May 30 12:35:04 PM PDT 24 |
55591462 ps |
T1468 |
/workspace/coverage/cover_reg_top/15.i2c_same_csr_outstanding.3645262502 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:18 PM PDT 24 |
75787433 ps |
T1469 |
/workspace/coverage/cover_reg_top/4.i2c_intr_test.1880739192 |
|
|
May 30 12:35:18 PM PDT 24 |
May 30 12:35:20 PM PDT 24 |
135849378 ps |
T1470 |
/workspace/coverage/cover_reg_top/16.i2c_csr_mem_rw_with_rand_reset.1363175417 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
46447019 ps |
T1471 |
/workspace/coverage/cover_reg_top/3.i2c_same_csr_outstanding.1398316808 |
|
|
May 30 12:34:44 PM PDT 24 |
May 30 12:34:46 PM PDT 24 |
81801755 ps |
T202 |
/workspace/coverage/cover_reg_top/0.i2c_csr_aliasing.1390116188 |
|
|
May 30 12:34:41 PM PDT 24 |
May 30 12:34:44 PM PDT 24 |
360629255 ps |
T186 |
/workspace/coverage/cover_reg_top/1.i2c_tl_intg_err.3352128090 |
|
|
May 30 12:34:55 PM PDT 24 |
May 30 12:34:59 PM PDT 24 |
2051043215 ps |
T1472 |
/workspace/coverage/cover_reg_top/4.i2c_csr_aliasing.2384659774 |
|
|
May 30 12:35:00 PM PDT 24 |
May 30 12:35:02 PM PDT 24 |
1095037768 ps |
T1473 |
/workspace/coverage/cover_reg_top/11.i2c_intr_test.3994059724 |
|
|
May 30 12:34:44 PM PDT 24 |
May 30 12:34:46 PM PDT 24 |
19161524 ps |
T203 |
/workspace/coverage/cover_reg_top/8.i2c_csr_rw.301298373 |
|
|
May 30 12:35:13 PM PDT 24 |
May 30 12:35:20 PM PDT 24 |
20421468 ps |
T1474 |
/workspace/coverage/cover_reg_top/36.i2c_intr_test.3010486378 |
|
|
May 30 12:35:22 PM PDT 24 |
May 30 12:35:24 PM PDT 24 |
116533593 ps |
T1475 |
/workspace/coverage/cover_reg_top/49.i2c_intr_test.3758992585 |
|
|
May 30 12:35:18 PM PDT 24 |
May 30 12:35:19 PM PDT 24 |
29466996 ps |
T1476 |
/workspace/coverage/cover_reg_top/17.i2c_tl_errors.75540721 |
|
|
May 30 12:35:03 PM PDT 24 |
May 30 12:35:06 PM PDT 24 |
93442404 ps |
T1477 |
/workspace/coverage/cover_reg_top/6.i2c_same_csr_outstanding.1441933531 |
|
|
May 30 12:34:44 PM PDT 24 |
May 30 12:34:46 PM PDT 24 |
220167205 ps |
T1478 |
/workspace/coverage/cover_reg_top/46.i2c_intr_test.2221141557 |
|
|
May 30 12:35:08 PM PDT 24 |
May 30 12:35:10 PM PDT 24 |
17305387 ps |
T1479 |
/workspace/coverage/cover_reg_top/20.i2c_intr_test.3412887407 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:17 PM PDT 24 |
17020879 ps |
T1480 |
/workspace/coverage/cover_reg_top/41.i2c_intr_test.3415552865 |
|
|
May 30 12:35:03 PM PDT 24 |
May 30 12:35:05 PM PDT 24 |
15645243 ps |
T204 |
/workspace/coverage/cover_reg_top/17.i2c_csr_rw.1192683601 |
|
|
May 30 12:35:25 PM PDT 24 |
May 30 12:35:27 PM PDT 24 |
51541851 ps |
T206 |
/workspace/coverage/cover_reg_top/1.i2c_csr_aliasing.1877927234 |
|
|
May 30 12:34:43 PM PDT 24 |
May 30 12:34:51 PM PDT 24 |
1246743437 ps |
T1481 |
/workspace/coverage/cover_reg_top/1.i2c_csr_rw.2586604366 |
|
|
May 30 12:34:43 PM PDT 24 |
May 30 12:34:45 PM PDT 24 |
81344114 ps |
T1482 |
/workspace/coverage/cover_reg_top/44.i2c_intr_test.1538967500 |
|
|
May 30 12:35:23 PM PDT 24 |
May 30 12:35:25 PM PDT 24 |
46566877 ps |
T1483 |
/workspace/coverage/cover_reg_top/1.i2c_same_csr_outstanding.685079617 |
|
|
May 30 12:35:10 PM PDT 24 |
May 30 12:35:12 PM PDT 24 |
48683608 ps |
T1484 |
/workspace/coverage/cover_reg_top/1.i2c_tl_errors.1968998008 |
|
|
May 30 12:35:15 PM PDT 24 |
May 30 12:35:22 PM PDT 24 |
182994599 ps |
T1485 |
/workspace/coverage/cover_reg_top/9.i2c_csr_mem_rw_with_rand_reset.285274764 |
|
|
May 30 12:34:58 PM PDT 24 |
May 30 12:34:59 PM PDT 24 |
76078575 ps |
T191 |
/workspace/coverage/cover_reg_top/15.i2c_tl_intg_err.1486832129 |
|
|
May 30 12:35:07 PM PDT 24 |
May 30 12:35:09 PM PDT 24 |
277635019 ps |
T1486 |
/workspace/coverage/cover_reg_top/13.i2c_same_csr_outstanding.972887463 |
|
|
May 30 12:35:27 PM PDT 24 |
May 30 12:35:33 PM PDT 24 |
70053339 ps |
T1487 |
/workspace/coverage/cover_reg_top/4.i2c_csr_bit_bash.1863215478 |
|
|
May 30 12:35:53 PM PDT 24 |
May 30 12:35:58 PM PDT 24 |
76526470 ps |
T1488 |
/workspace/coverage/cover_reg_top/9.i2c_intr_test.1880975947 |
|
|
May 30 12:35:14 PM PDT 24 |
May 30 12:35:16 PM PDT 24 |
36071188 ps |
T1489 |
/workspace/coverage/cover_reg_top/1.i2c_intr_test.2493043364 |
|
|
May 30 12:35:00 PM PDT 24 |
May 30 12:35:02 PM PDT 24 |
17574873 ps |
T1490 |
/workspace/coverage/cover_reg_top/8.i2c_same_csr_outstanding.3706268539 |
|
|
May 30 12:35:01 PM PDT 24 |
May 30 12:35:03 PM PDT 24 |
21874769 ps |
T188 |
/workspace/coverage/cover_reg_top/9.i2c_tl_intg_err.2191671169 |
|
|
May 30 12:34:45 PM PDT 24 |
May 30 12:34:47 PM PDT 24 |
136535546 ps |
T1491 |
/workspace/coverage/cover_reg_top/19.i2c_tl_errors.2962632615 |
|
|
May 30 12:35:09 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
56074266 ps |
T1492 |
/workspace/coverage/cover_reg_top/19.i2c_csr_mem_rw_with_rand_reset.353475032 |
|
|
May 30 12:35:16 PM PDT 24 |
May 30 12:35:18 PM PDT 24 |
25720676 ps |
T1493 |
/workspace/coverage/cover_reg_top/14.i2c_csr_mem_rw_with_rand_reset.3551947880 |
|
|
May 30 12:35:11 PM PDT 24 |
May 30 12:35:13 PM PDT 24 |
53493794 ps |
T1494 |
/workspace/coverage/cover_reg_top/5.i2c_csr_rw.1295179467 |
|
|
May 30 12:34:58 PM PDT 24 |
May 30 12:34:59 PM PDT 24 |
207055072 ps |
T1495 |
/workspace/coverage/cover_reg_top/24.i2c_intr_test.1940048474 |
|
|
May 30 12:35:08 PM PDT 24 |
May 30 12:35:09 PM PDT 24 |
40677207 ps |
T1496 |
/workspace/coverage/cover_reg_top/15.i2c_csr_mem_rw_with_rand_reset.3625030891 |
|
|
May 30 12:35:02 PM PDT 24 |
May 30 12:35:05 PM PDT 24 |
53626921 ps |
T1497 |
/workspace/coverage/cover_reg_top/1.i2c_csr_hw_reset.4277409098 |
|
|
May 30 12:34:56 PM PDT 24 |
May 30 12:34:57 PM PDT 24 |
82129930 ps |
T1498 |
/workspace/coverage/cover_reg_top/9.i2c_tl_errors.3645164668 |
|
|
May 30 12:34:52 PM PDT 24 |
May 30 12:34:55 PM PDT 24 |
168740943 ps |
T192 |
/workspace/coverage/cover_reg_top/19.i2c_tl_intg_err.3950473946 |
|
|
May 30 12:35:22 PM PDT 24 |
May 30 12:35:25 PM PDT 24 |
291961751 ps |
T1499 |
/workspace/coverage/cover_reg_top/11.i2c_same_csr_outstanding.3673010086 |
|
|
May 30 12:35:17 PM PDT 24 |
May 30 12:35:19 PM PDT 24 |
87549938 ps |
T1500 |
/workspace/coverage/cover_reg_top/2.i2c_csr_rw.3686911408 |
|
|
May 30 12:34:47 PM PDT 24 |
May 30 12:34:48 PM PDT 24 |
99304902 ps |
T1501 |
/workspace/coverage/cover_reg_top/7.i2c_csr_mem_rw_with_rand_reset.1817829070 |
|
|
May 30 12:35:22 PM PDT 24 |
May 30 12:35:24 PM PDT 24 |
78259260 ps |
T1502 |
/workspace/coverage/cover_reg_top/18.i2c_intr_test.3248456803 |
|
|
May 30 12:35:12 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
25577735 ps |
T1503 |
/workspace/coverage/cover_reg_top/5.i2c_tl_errors.3310054293 |
|
|
May 30 12:34:57 PM PDT 24 |
May 30 12:35:00 PM PDT 24 |
34642824 ps |
T1504 |
/workspace/coverage/cover_reg_top/3.i2c_csr_mem_rw_with_rand_reset.1178069560 |
|
|
May 30 12:35:53 PM PDT 24 |
May 30 12:35:56 PM PDT 24 |
26111780 ps |
T1505 |
/workspace/coverage/cover_reg_top/8.i2c_intr_test.2595542945 |
|
|
May 30 12:35:12 PM PDT 24 |
May 30 12:35:14 PM PDT 24 |
16648192 ps |
T1506 |
/workspace/coverage/cover_reg_top/14.i2c_same_csr_outstanding.419670761 |
|
|
May 30 12:35:04 PM PDT 24 |
May 30 12:35:05 PM PDT 24 |
687824796 ps |
T1507 |
/workspace/coverage/cover_reg_top/37.i2c_intr_test.4119928249 |
|
|
May 30 12:35:09 PM PDT 24 |
May 30 12:35:11 PM PDT 24 |
28791711 ps |