Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 48280077 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 11737674 1 T1 4899 T2 11 T3 14691



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 59262056 1 T1 14652 T2 14 T3 29809
values[0x0] 376996 1 T1 353 T2 9 T3 95
values[0x1] 378699 1 T1 324 T2 5 T3 91



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34385079 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 25632672 1 T1 7785 T2 12 T3 17929



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 233061 1 T1 61 T3 114 T4 139
valid_sources[0x01] 218710 1 T1 55 T3 93 T4 130
valid_sources[0x02] 209625 1 T1 57 T3 109 T4 137
valid_sources[0x03] 227191 1 T1 79 T3 122 T4 148
valid_sources[0x04] 230694 1 T1 58 T3 72 T4 136
valid_sources[0x05] 214682 1 T1 52 T3 80 T4 150
valid_sources[0x06] 236766 1 T1 64 T3 107 T4 142
valid_sources[0x07] 274693 1 T1 69 T3 110 T4 119
valid_sources[0x08] 227746 1 T1 67 T3 118 T4 144
valid_sources[0x09] 231090 1 T1 60 T3 126 T4 123
valid_sources[0x0a] 209685 1 T1 54 T3 150 T4 138
valid_sources[0x0b] 210670 1 T1 59 T3 110 T4 151
valid_sources[0x0c] 223426 1 T1 65 T3 124 T4 120
valid_sources[0x0d] 207236 1 T1 51 T3 97 T4 158
valid_sources[0x0e] 210363 1 T1 52 T3 107 T4 131
valid_sources[0x0f] 230648 1 T1 74 T3 133 T4 129
valid_sources[0x10] 214147 1 T1 63 T3 96 T4 143
valid_sources[0x11] 219129 1 T1 64 T3 134 T4 140
valid_sources[0x12] 219822 1 T1 66 T3 85 T4 143
valid_sources[0x13] 284633 1 T1 49 T3 119 T4 145
valid_sources[0x14] 264608 1 T1 67 T3 128 T4 148
valid_sources[0x15] 300455 1 T1 59 T3 116 T4 123
valid_sources[0x16] 221432 1 T1 64 T3 93 T4 173
valid_sources[0x17] 208369 1 T1 49 T3 132 T4 117
valid_sources[0x18] 254910 1 T1 82 T3 154 T4 128
valid_sources[0x19] 255414 1 T1 68 T3 142 T4 134
valid_sources[0x1a] 225923 1 T1 61 T3 133 T4 136
valid_sources[0x1b] 221339 1 T1 61 T3 110 T4 160
valid_sources[0x1c] 217641 1 T1 52 T3 118 T4 127
valid_sources[0x1d] 209413 1 T1 58 T3 145 T4 134
valid_sources[0x1e] 226676 1 T1 53 T3 155 T4 131
valid_sources[0x1f] 210730 1 T1 55 T3 116 T4 139
valid_sources[0x20] 573068 1 T1 48 T2 3 T3 135
valid_sources[0x21] 210947 1 T1 76 T3 109 T4 141
valid_sources[0x22] 211702 1 T1 57 T3 114 T4 134
valid_sources[0x23] 250369 1 T1 58 T3 129 T4 130
valid_sources[0x24] 243153 1 T1 51 T3 137 T4 142
valid_sources[0x25] 220511 1 T1 49 T3 113 T4 172
valid_sources[0x26] 285125 1 T1 58 T3 133 T4 142
valid_sources[0x27] 210518 1 T1 49 T3 121 T4 124
valid_sources[0x28] 211758 1 T1 47 T3 118 T4 140
valid_sources[0x29] 222221 1 T1 50 T3 112 T4 148
valid_sources[0x2a] 219459 1 T1 56 T3 107 T4 140
valid_sources[0x2b] 222052 1 T1 57 T3 118 T4 135
valid_sources[0x2c] 223700 1 T1 70 T3 125 T4 134
valid_sources[0x2d] 221290 1 T1 73 T3 145 T4 132
valid_sources[0x2e] 220558 1 T1 68 T3 95 T4 129
valid_sources[0x2f] 223837 1 T1 58 T3 107 T4 175
valid_sources[0x30] 220635 1 T1 46 T3 110 T4 140
valid_sources[0x31] 228826 1 T1 54 T3 155 T4 157
valid_sources[0x32] 224862 1 T1 53 T3 126 T4 156
valid_sources[0x33] 216448 1 T1 49 T3 114 T4 164
valid_sources[0x34] 218630 1 T1 53 T3 93 T4 144
valid_sources[0x35] 225212 1 T1 60 T2 2 T3 127
valid_sources[0x36] 229660 1 T1 71 T3 145 T4 154
valid_sources[0x37] 306184 1 T1 69 T3 105 T4 123
valid_sources[0x38] 228066 1 T1 64 T3 105 T4 158
valid_sources[0x39] 223054 1 T1 59 T2 1 T3 111
valid_sources[0x3a] 227126 1 T1 56 T3 126 T4 132
valid_sources[0x3b] 225756 1 T1 50 T3 118 T4 130
valid_sources[0x3c] 212718 1 T1 63 T3 143 T4 131
valid_sources[0x3d] 241300 1 T1 66 T2 1 T3 95
valid_sources[0x3e] 217236 1 T1 63 T3 106 T4 143
valid_sources[0x3f] 213293 1 T1 46 T3 122 T4 139
valid_sources[0x40] 226026 1 T1 61 T3 83 T4 151
valid_sources[0x41] 220889 1 T1 56 T3 93 T4 135
valid_sources[0x42] 214409 1 T1 52 T3 88 T4 122
valid_sources[0x43] 224744 1 T1 59 T3 108 T4 133
valid_sources[0x44] 220065 1 T1 59 T3 137 T4 140
valid_sources[0x45] 240029 1 T1 60 T3 91 T4 128
valid_sources[0x46] 276505 1 T1 64 T3 129 T4 144
valid_sources[0x47] 215486 1 T1 69 T2 1 T3 114
valid_sources[0x48] 220069 1 T1 68 T2 3 T3 102
valid_sources[0x49] 232908 1 T1 72 T3 140 T4 138
valid_sources[0x4a] 209845 1 T1 51 T3 135 T4 143
valid_sources[0x4b] 224450 1 T1 71 T3 107 T4 141
valid_sources[0x4c] 235954 1 T1 64 T3 108 T4 147
valid_sources[0x4d] 223425 1 T1 66 T3 119 T4 148
valid_sources[0x4e] 220195 1 T1 68 T3 134 T4 127
valid_sources[0x4f] 227003 1 T1 73 T3 118 T4 133
valid_sources[0x50] 419761 1 T1 72 T3 153 T4 149
valid_sources[0x51] 222303 1 T1 54 T3 114 T4 170
valid_sources[0x52] 232101 1 T1 71 T3 98 T4 118
valid_sources[0x53] 236617 1 T1 56 T3 102 T4 152
valid_sources[0x54] 213323 1 T1 56 T3 105 T4 130
valid_sources[0x55] 253996 1 T1 61 T3 150 T4 122
valid_sources[0x56] 242346 1 T1 65 T3 112 T4 154
valid_sources[0x57] 227984 1 T1 43 T3 131 T4 135
valid_sources[0x58] 235410 1 T1 65 T2 1 T3 159
valid_sources[0x59] 225890 1 T1 70 T3 128 T4 133
valid_sources[0x5a] 225537 1 T1 54 T3 128 T4 124
valid_sources[0x5b] 229822 1 T1 57 T3 136 T4 133
valid_sources[0x5c] 239425 1 T1 52 T3 104 T4 164
valid_sources[0x5d] 213611 1 T1 54 T3 92 T4 141
valid_sources[0x5e] 218879 1 T1 51 T3 86 T4 140
valid_sources[0x5f] 216195 1 T1 63 T3 119 T4 141
valid_sources[0x60] 222791 1 T1 56 T3 118 T4 130
valid_sources[0x61] 224069 1 T1 46 T3 93 T4 166
valid_sources[0x62] 229340 1 T1 73 T3 114 T4 146
valid_sources[0x63] 225238 1 T1 55 T3 136 T4 137
valid_sources[0x64] 218120 1 T1 66 T3 101 T4 137
valid_sources[0x65] 214480 1 T1 69 T3 118 T4 148
valid_sources[0x66] 220555 1 T1 62 T3 114 T4 140
valid_sources[0x67] 341493 1 T1 58 T3 122 T4 131
valid_sources[0x68] 206055 1 T1 49 T3 151 T4 157
valid_sources[0x69] 213911 1 T1 63 T3 120 T4 155
valid_sources[0x6a] 251481 1 T1 50 T3 119 T4 133
valid_sources[0x6b] 225216 1 T1 63 T3 132 T4 119
valid_sources[0x6c] 223083 1 T1 49 T3 73 T4 144
valid_sources[0x6d] 225349 1 T1 52 T3 107 T4 155
valid_sources[0x6e] 383202 1 T1 67 T3 104 T4 150
valid_sources[0x6f] 233107 1 T1 55 T3 98 T4 160
valid_sources[0x70] 230963 1 T1 54 T3 124 T4 128
valid_sources[0x71] 204305 1 T1 45 T3 109 T4 135
valid_sources[0x72] 216077 1 T1 60 T3 148 T4 136
valid_sources[0x73] 215123 1 T1 46 T3 129 T4 125
valid_sources[0x74] 215620 1 T1 64 T3 117 T4 142
valid_sources[0x75] 231609 1 T1 64 T3 120 T4 137
valid_sources[0x76] 313981 1 T1 54 T3 121 T4 136
valid_sources[0x77] 228071 1 T1 66 T2 2 T3 93
valid_sources[0x78] 213224 1 T1 54 T3 123 T4 124
valid_sources[0x79] 239002 1 T1 48 T3 137 T4 161
valid_sources[0x7a] 206287 1 T1 51 T3 105 T4 143
valid_sources[0x7b] 215239 1 T1 56 T3 99 T4 113
valid_sources[0x7c] 227116 1 T1 61 T3 102 T4 140
valid_sources[0x7d] 246267 1 T1 61 T3 127 T4 127
valid_sources[0x7e] 277572 1 T1 67 T3 80 T4 140
valid_sources[0x7f] 219939 1 T1 44 T3 127 T4 140
valid_sources[0x80] 211188 1 T1 73 T3 100 T4 141



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 11377406 1 T1 4487 T2 6 T3 14534
values[0x0] all_enables biggest_size 208993 1 T1 220 T2 4 T3 80
values[0x1] all_enables biggest_size 151275 1 T1 192 T2 1 T3 77

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%