Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47205058	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

11316362

1

T1

45368

T2

12164

T3

473

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	57748429	1			T1	182798		T2	45968		T3	1736
values[0x0]	386103	1			T1	625		T2	312		T3	85
values[0x1]	386888	1			T1	611		T2	327		T3	90

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33705158	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

24816262

1

T1

85542

T2

22110

T3

860

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	214834	1			T1	720		T2	207		T4	2
valid_sources[0x01]	194821	1			T1	731		T2	188		T4	3
valid_sources[0x02]	221580	1			T1	729		T2	174		T4	5
valid_sources[0x03]	224270	1			T1	732		T2	195		T4	2
valid_sources[0x04]	206867	1			T1	696		T2	185		T4	8
valid_sources[0x05]	201086	1			T1	737		T2	192		T4	9
valid_sources[0x06]	215355	1			T1	688		T2	189		T4	4
valid_sources[0x07]	215504	1			T1	705		T2	197		T4	9
valid_sources[0x08]	213975	1			T1	704		T2	149		T4	7
valid_sources[0x09]	211765	1			T1	736		T2	174		T4	2
valid_sources[0x0a]	194756	1			T1	751		T2	168		T3	1
valid_sources[0x0b]	222801	1			T1	749		T2	157		T4	1
valid_sources[0x0c]	227916	1			T1	706		T2	198		T5	9
valid_sources[0x0d]	208733	1			T1	718		T2	193		T4	9
valid_sources[0x0e]	232095	1			T1	728		T2	195		T4	5
valid_sources[0x0f]	192699	1			T1	694		T2	191		T4	2
valid_sources[0x10]	214725	1			T1	713		T2	188		T3	1
valid_sources[0x11]	216497	1			T1	738		T2	191		T4	2
valid_sources[0x12]	203108	1			T1	728		T2	186		T5	12
valid_sources[0x13]	268184	1			T1	738		T2	187		T4	1
valid_sources[0x14]	292074	1			T1	715		T2	198		T4	5
valid_sources[0x15]	224696	1			T1	713		T2	167		T5	1
valid_sources[0x16]	216340	1			T1	687		T2	193		T4	9
valid_sources[0x17]	212557	1			T1	779		T2	161		T4	12
valid_sources[0x18]	241155	1			T1	677		T2	191		T4	7
valid_sources[0x19]	203219	1			T1	699		T2	165		T3	14
valid_sources[0x1a]	207116	1			T1	731		T2	200		T3	1
valid_sources[0x1b]	371554	1			T1	722		T2	168		T4	1
valid_sources[0x1c]	206315	1			T1	682		T2	181		T4	4
valid_sources[0x1d]	208686	1			T1	748		T2	200		T4	1
valid_sources[0x1e]	310560	1			T1	734		T2	178		T3	8
valid_sources[0x1f]	213229	1			T1	781		T2	174		T4	7
valid_sources[0x20]	270727	1			T1	729		T2	170		T5	4
valid_sources[0x21]	217890	1			T1	725		T2	177		T4	1
valid_sources[0x22]	210733	1			T1	737		T2	178		T4	9
valid_sources[0x23]	236949	1			T1	682		T2	198		T4	2
valid_sources[0x24]	198814	1			T1	692		T2	192		T5	6
valid_sources[0x25]	196789	1			T1	715		T2	176		T4	6
valid_sources[0x26]	203902	1			T1	705		T2	203		T4	3
valid_sources[0x27]	201577	1			T1	725		T2	185		T4	15
valid_sources[0x28]	206452	1			T1	729		T2	184		T3	2
valid_sources[0x29]	200401	1			T1	735		T2	177		T3	1
valid_sources[0x2a]	218283	1			T1	732		T2	178		T4	16
valid_sources[0x2b]	212039	1			T1	724		T2	188		T4	1
valid_sources[0x2c]	309478	1			T1	769		T2	160		T3	1
valid_sources[0x2d]	201956	1			T1	719		T2	188		T4	12
valid_sources[0x2e]	228896	1			T1	736		T2	177		T4	4
valid_sources[0x2f]	798929	1			T1	714		T2	177		T4	6
valid_sources[0x30]	212222	1			T1	669		T2	151		T4	2
valid_sources[0x31]	200561	1			T1	728		T2	154		T4	11
valid_sources[0x32]	225498	1			T1	732		T2	174		T4	5
valid_sources[0x33]	224765	1			T1	763		T2	179		T4	8
valid_sources[0x34]	211290	1			T1	713		T2	182		T3	1
valid_sources[0x35]	212523	1			T1	742		T2	209		T4	3
valid_sources[0x36]	209097	1			T1	748		T2	200		T4	1
valid_sources[0x37]	192985	1			T1	726		T2	163		T5	12
valid_sources[0x38]	201736	1			T1	701		T2	182		T4	4
valid_sources[0x39]	213290	1			T1	744		T2	179		T4	1
valid_sources[0x3a]	227404	1			T1	732		T2	165		T4	6
valid_sources[0x3b]	223950	1			T1	729		T2	193		T4	7
valid_sources[0x3c]	205497	1			T1	685		T2	169		T4	5
valid_sources[0x3d]	207063	1			T1	740		T2	158		T4	4
valid_sources[0x3e]	251066	1			T1	704		T2	205		T3	1
valid_sources[0x3f]	215797	1			T1	678		T2	188		T4	4
valid_sources[0x40]	205137	1			T1	688		T2	200		T3	53
valid_sources[0x41]	226625	1			T1	742		T2	184		T3	1
valid_sources[0x42]	202168	1			T1	716		T2	185		T4	3
valid_sources[0x43]	211845	1			T1	721		T2	161		T4	2
valid_sources[0x44]	217762	1			T1	713		T2	184		T5	16
valid_sources[0x45]	233237	1			T1	723		T2	172		T4	3
valid_sources[0x46]	217222	1			T1	728		T2	177		T4	3
valid_sources[0x47]	236774	1			T1	712		T2	170		T3	1
valid_sources[0x48]	215540	1			T1	701		T2	161		T4	9
valid_sources[0x49]	205745	1			T1	743		T2	183		T4	2
valid_sources[0x4a]	207432	1			T1	744		T2	174		T3	1
valid_sources[0x4b]	209567	1			T1	723		T2	189		T4	3
valid_sources[0x4c]	210504	1			T1	678		T2	177		T4	5
valid_sources[0x4d]	214624	1			T1	734		T2	161		T4	12
valid_sources[0x4e]	206794	1			T1	750		T2	176		T4	4
valid_sources[0x4f]	211021	1			T1	664		T2	195		T3	1
valid_sources[0x50]	220545	1			T1	747		T2	211		T4	8
valid_sources[0x51]	208607	1			T1	724		T2	181		T4	6
valid_sources[0x52]	200688	1			T1	702		T2	167		T4	4
valid_sources[0x53]	209374	1			T1	705		T2	180		T4	1
valid_sources[0x54]	214227	1			T1	729		T2	189		T4	4
valid_sources[0x55]	200294	1			T1	752		T2	168		T4	1
valid_sources[0x56]	195335	1			T1	691		T2	143		T3	1
valid_sources[0x57]	202930	1			T1	694		T2	191		T3	91
valid_sources[0x58]	216209	1			T1	733		T2	190		T4	5
valid_sources[0x59]	215224	1			T1	720		T2	182		T4	2
valid_sources[0x5a]	202371	1			T1	702		T2	183		T3	1
valid_sources[0x5b]	219937	1			T1	750		T2	192		T4	7
valid_sources[0x5c]	207366	1			T1	673		T2	183		T4	6
valid_sources[0x5d]	212296	1			T1	730		T2	189		T4	3
valid_sources[0x5e]	204480	1			T1	722		T2	191		T4	6
valid_sources[0x5f]	195007	1			T1	700		T2	197		T4	1
valid_sources[0x60]	206031	1			T1	669		T2	166		T4	1
valid_sources[0x61]	202747	1			T1	728		T2	172		T4	6
valid_sources[0x62]	204288	1			T1	699		T2	187		T3	2
valid_sources[0x63]	213684	1			T1	741		T2	182		T3	1
valid_sources[0x64]	203640	1			T1	717		T2	167		T4	5
valid_sources[0x65]	194495	1			T1	710		T2	167		T4	8
valid_sources[0x66]	199690	1			T1	721		T2	217		T4	1
valid_sources[0x67]	300945	1			T1	761		T2	167		T5	5
valid_sources[0x68]	204004	1			T1	707		T2	197		T4	2
valid_sources[0x69]	485605	1			T1	690		T2	187		T4	1
valid_sources[0x6a]	206801	1			T1	748		T2	210		T3	1
valid_sources[0x6b]	219779	1			T1	702		T2	190		T3	1
valid_sources[0x6c]	260855	1			T1	749		T2	147		T4	1
valid_sources[0x6d]	208223	1			T1	763		T2	165		T3	1
valid_sources[0x6e]	215799	1			T1	687		T2	192		T4	1
valid_sources[0x6f]	195467	1			T1	699		T2	185		T4	1
valid_sources[0x70]	219107	1			T1	728		T2	184		T4	8
valid_sources[0x71]	245468	1			T1	724		T2	209		T4	2
valid_sources[0x72]	260249	1			T1	707		T2	164		T4	1
valid_sources[0x73]	214962	1			T1	660		T2	205		T4	2
valid_sources[0x74]	260173	1			T1	717		T2	194		T5	15
valid_sources[0x75]	213644	1			T1	747		T2	168		T5	14
valid_sources[0x76]	218083	1			T1	742		T2	182		T4	3
valid_sources[0x77]	217545	1			T1	706		T2	195		T3	1
valid_sources[0x78]	335231	1			T1	713		T2	206		T4	7
valid_sources[0x79]	212915	1			T1	702		T2	165		T4	1
valid_sources[0x7a]	197165	1			T1	722		T2	189		T4	4
valid_sources[0x7b]	207166	1			T1	692		T2	166		T3	1
valid_sources[0x7c]	212384	1			T1	760		T2	204		T4	4
valid_sources[0x7d]	209066	1			T1	780		T2	158		T5	10
valid_sources[0x7e]	203969	1			T1	715		T2	202		T4	3
valid_sources[0x7f]	202630	1			T1	729		T2	162		T4	7
valid_sources[0x80]	212986	1			T1	711		T2	183		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

10941507

1

T1

44720

T2

11745

T3

361

values[0x0]

all_enables

biggest_size

216647

1

T1

377

T2

227

T3

58

values[0x1]

all_enables

biggest_size

158208

1

T1

271

T2

192

T3

54