Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27744055	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7901486

1

T1

18801

T2

15243

T3

122

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	34828795	1			T1	194565		T2	71184		T3	421
values[0x0]	407892	1			T1	2074		T2	1838		T3	115
values[0x1]	408854	1			T1	2061		T2	1878		T3	124

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	19433088	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

16212453

1

T1

75889

T2

33036

T3

292

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	136101	1			T1	2691		T2	295		T3	2
valid_sources[0x01]	135844	1			T1	2912		T2	231		T3	13
valid_sources[0x02]	135354	1			T1	3005		T2	306		T4	280
valid_sources[0x03]	140463	1			T1	1815		T2	238		T3	1
valid_sources[0x04]	137350	1			T1	1059		T2	317		T4	247
valid_sources[0x05]	129937	1			T1	22		T2	273		T3	4
valid_sources[0x06]	142345	1			T1	486		T2	286		T3	2
valid_sources[0x07]	132464	1			T1	5		T2	283		T3	3
valid_sources[0x08]	134799	1			T1	33		T2	355		T3	3
valid_sources[0x09]	129190	1			T1	316		T2	274		T3	2
valid_sources[0x0a]	132548	1			T1	26		T2	274		T3	5
valid_sources[0x0b]	120444	1			T1	16		T2	282		T3	6
valid_sources[0x0c]	128129	1			T1	26		T2	264		T4	254
valid_sources[0x0d]	151508	1			T1	593		T2	296		T4	255
valid_sources[0x0e]	136864	1			T1	943		T2	236		T3	3
valid_sources[0x0f]	150408	1			T1	46		T2	258		T4	267
valid_sources[0x10]	134737	1			T1	462		T2	284		T3	3
valid_sources[0x11]	138989	1			T1	6		T2	286		T3	3
valid_sources[0x12]	134993	1			T1	32		T2	311		T3	2
valid_sources[0x13]	137239	1			T1	28		T2	314		T3	5
valid_sources[0x14]	130688	1			T1	617		T2	233		T4	241
valid_sources[0x15]	132469	1			T1	342		T2	338		T4	227
valid_sources[0x16]	141501	1			T1	1382		T2	319		T4	271
valid_sources[0x17]	152467	1			T1	13		T2	241		T3	3
valid_sources[0x18]	148946	1			T1	1059		T2	251		T3	2
valid_sources[0x19]	147596	1			T1	458		T2	280		T4	239
valid_sources[0x1a]	131926	1			T1	19		T2	253		T4	268
valid_sources[0x1b]	146844	1			T1	8		T2	306		T3	6
valid_sources[0x1c]	132228	1			T1	19		T2	344		T3	1
valid_sources[0x1d]	134534	1			T1	24		T2	317		T3	7
valid_sources[0x1e]	148418	1			T1	31		T2	316		T3	4
valid_sources[0x1f]	133173	1			T1	608		T2	282		T4	265
valid_sources[0x20]	126829	1			T1	14		T2	288		T3	7
valid_sources[0x21]	133181	1			T1	1		T2	320		T3	3
valid_sources[0x22]	126086	1			T1	16		T2	323		T3	2
valid_sources[0x23]	130890	1			T1	24		T2	291		T3	3
valid_sources[0x24]	139069	1			T1	206		T2	255		T4	225
valid_sources[0x25]	150345	1			T1	25		T2	284		T3	3
valid_sources[0x26]	147754	1			T1	7961		T2	306		T3	1
valid_sources[0x27]	134360	1			T1	770		T2	266		T4	263
valid_sources[0x28]	133339	1			T1	26		T2	310		T4	269
valid_sources[0x29]	148056	1			T1	43		T2	298		T3	2
valid_sources[0x2a]	133329	1			T1	1677		T2	285		T4	273
valid_sources[0x2b]	139680	1			T1	1966		T2	250		T3	5
valid_sources[0x2c]	135402	1			T1	192		T2	314		T3	1
valid_sources[0x2d]	141418	1			T1	1612		T2	320		T4	285
valid_sources[0x2e]	142492	1			T1	476		T2	233		T3	1
valid_sources[0x2f]	153958	1			T1	1656		T2	265		T4	233
valid_sources[0x30]	129562	1			T1	25		T2	324		T3	2
valid_sources[0x31]	159620	1			T1	12		T2	280		T3	2
valid_sources[0x32]	137667	1			T1	4		T2	279		T3	1
valid_sources[0x33]	143278	1			T1	25		T2	328		T3	6
valid_sources[0x34]	162006	1			T1	6465		T2	353		T3	3
valid_sources[0x35]	140511	1			T1	1329		T2	284		T3	1
valid_sources[0x36]	141732	1			T1	1486		T2	367		T3	12
valid_sources[0x37]	124436	1			T1	23		T2	234		T4	250
valid_sources[0x38]	146014	1			T1	17		T2	287		T3	13
valid_sources[0x39]	135446	1			T1	21		T2	276		T3	6
valid_sources[0x3a]	147377	1			T1	22		T2	349		T3	6
valid_sources[0x3b]	139949	1			T1	32		T2	385		T4	241
valid_sources[0x3c]	135094	1			T1	323		T2	367		T4	252
valid_sources[0x3d]	155137	1			T1	748		T2	251		T3	4
valid_sources[0x3e]	137932	1			T1	23		T2	295		T3	1
valid_sources[0x3f]	135266	1			T1	2382		T2	289		T4	253
valid_sources[0x40]	157259	1			T1	17		T2	301		T3	1
valid_sources[0x41]	144309	1			T1	2072		T2	310		T3	4
valid_sources[0x42]	137610	1			T1	179		T2	326		T3	1
valid_sources[0x43]	146727	1			T1	1810		T2	323		T3	3
valid_sources[0x44]	130944	1			T1	22		T2	278		T4	263
valid_sources[0x45]	136551	1			T1	13		T2	271		T3	3
valid_sources[0x46]	134593	1			T1	1034		T2	329		T3	1
valid_sources[0x47]	136018	1			T1	592		T2	319		T3	2
valid_sources[0x48]	140217	1			T1	20		T2	320		T3	1
valid_sources[0x49]	134453	1			T1	3698		T2	265		T3	1
valid_sources[0x4a]	126149	1			T1	17		T2	296		T3	3
valid_sources[0x4b]	135895	1			T1	929		T2	288		T3	1
valid_sources[0x4c]	138593	1			T1	3859		T2	343		T3	3
valid_sources[0x4d]	137079	1			T1	1940		T2	297		T3	6
valid_sources[0x4e]	131282	1			T1	21		T2	260		T3	1
valid_sources[0x4f]	131067	1			T1	604		T2	327		T3	3
valid_sources[0x50]	152121	1			T1	18		T2	261		T4	232
valid_sources[0x51]	134366	1			T1	45		T2	375		T3	1
valid_sources[0x52]	153455	1			T1	467		T2	317		T3	10
valid_sources[0x53]	133104	1			T1	1790		T2	322		T3	5
valid_sources[0x54]	137884	1			T1	2403		T2	234		T3	2
valid_sources[0x55]	132844	1			T1	1357		T2	272		T3	1
valid_sources[0x56]	135138	1			T1	7		T2	336		T4	246
valid_sources[0x57]	129668	1			T1	37		T2	314		T3	2
valid_sources[0x58]	137320	1			T1	3515		T2	299		T4	278
valid_sources[0x59]	146644	1			T1	174		T2	294		T3	1
valid_sources[0x5a]	139055	1			T1	29		T2	342		T3	1
valid_sources[0x5b]	328703	1			T1	468		T2	293		T3	3
valid_sources[0x5c]	144937	1			T1	28		T2	315		T3	4
valid_sources[0x5d]	135361	1			T1	313		T2	279		T4	249
valid_sources[0x5e]	140363	1			T1	18		T2	322		T3	3
valid_sources[0x5f]	133875	1			T1	34		T2	308		T3	6
valid_sources[0x60]	137202	1			T1	1652		T2	328		T3	6
valid_sources[0x61]	145047	1			T1	20		T2	316		T4	255
valid_sources[0x62]	137206	1			T1	21		T2	234		T3	1
valid_sources[0x63]	151806	1			T1	37		T2	299		T3	4
valid_sources[0x64]	127553	1			T1	14		T2	318		T4	277
valid_sources[0x65]	142899	1			T1	11		T2	259		T4	237
valid_sources[0x66]	128001	1			T1	32		T2	252		T3	2
valid_sources[0x67]	143963	1			T1	757		T2	287		T4	281
valid_sources[0x68]	128449	1			T1	1062		T2	289		T3	2
valid_sources[0x69]	170742	1			T1	45		T2	310		T3	4
valid_sources[0x6a]	151902	1			T1	39		T2	308		T3	5
valid_sources[0x6b]	135848	1			T1	3779		T2	308		T3	4
valid_sources[0x6c]	121772	1			T1	7		T2	312		T4	226
valid_sources[0x6d]	136702	1			T1	16		T2	288		T3	4
valid_sources[0x6e]	140022	1			T1	1224		T2	287		T3	1
valid_sources[0x6f]	131332	1			T1	9		T2	309		T4	254
valid_sources[0x70]	161477	1			T1	10		T2	291		T3	3
valid_sources[0x71]	127218	1			T1	25		T2	333		T3	12
valid_sources[0x72]	143243	1			T1	8		T2	241		T4	244
valid_sources[0x73]	131655	1			T1	334		T2	294		T4	300
valid_sources[0x74]	146722	1			T1	2936		T2	334		T3	2
valid_sources[0x75]	146108	1			T1	16		T2	246		T4	229
valid_sources[0x76]	137822	1			T1	8		T2	314		T4	253
valid_sources[0x77]	135381	1			T1	25		T2	261		T4	252
valid_sources[0x78]	147637	1			T1	764		T2	279		T3	3
valid_sources[0x79]	129165	1			T1	493		T2	303		T3	1
valid_sources[0x7a]	137796	1			T1	1358		T2	316		T4	259
valid_sources[0x7b]	130575	1			T1	21		T2	320		T3	1
valid_sources[0x7c]	147660	1			T1	3		T2	350		T4	273
valid_sources[0x7d]	137242	1			T1	16		T2	206		T4	281
valid_sources[0x7e]	127106	1			T1	641		T2	279		T4	250
valid_sources[0x7f]	135670	1			T1	323		T2	339		T4	294
valid_sources[0x80]	135025	1			T1	26		T2	311		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7543234

1

T1

17350

T2

13276

T3

39

values[0x0]

all_enables

biggest_size

213391

1

T1

965

T2

1109

T3

58

values[0x1]

all_enables

biggest_size

144861

1

T1

486

T2

858

T3

25