Testbench Group List
dashboard | hierarchy | modlist | groups | tests | asserts
Total Groups Coverage Summary 
COVEREDEXPECTEDSCORECOVEREDEXPECTEDINST SCOREWEIGHT
3736 4076 91.66 3736 4076 91.66 1


Total groups in report: 27
NAMECOVEREDEXPECTEDSCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSINGCOMMENT
keymgr_env_pkg::keymgr_env_cov::state_and_op_cg 164 380 43.16 1 100 1 0 64 64
keymgr_env_pkg::keymgr_env_cov::lc_disable_cg 48 63 76.19 1 100 1 0 64 64
cip_base_pkg::tl_errors_cg_wrap::tl_errors_cg 12 15 80.00 100.00 1 100 1 1 64 64
keymgr_env_pkg::keymgr_env_cov::sideload_clear_cg 305 381 80.05 1 100 1 0 64 64
keymgr_env_pkg::keymgr_env_cov::fault_status_cg 10 12 83.33 1 100 1 0 64 64
cip_base_pkg::tl_intg_err_cg_wrap::tl_intg_err_cg 13 14 92.86 100.00 1 100 1 1 64 64
alert_esc_agent_pkg::alert_handshake_complete_cg 3 3 100.00 100.00 1 100 1 1 64 64
cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=0} 9 9 100.00 1 100 1 0 64 64
cip_base_pkg::intr_pins_cg::SHAPE{(num_interrupts - 1)=0} 9 9 100.00 1 100 1 0 64 64
cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=0} 13 13 100.00 1 100 1 0 64 64
cip_base_pkg::resets_cg 4 4 100.00 100.00 1 100 1 1 64 64
dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg 2 2 100.00 100.00 1 100 1 1 64 64
dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg 2 2 100.00 100.00 1 100 1 1 64 64
dv_base_reg_pkg::mubi_cov#(4,32'sb00000000000000000000000000000101,32'sb00000000000000000000000000001010)::mubi_cg 6 6 100.00 100.00 1 100 1 1 64 64
dv_lib_pkg::bit_toggle_cg_wrap::bit_toggle_cg 4 4 100.00 100.00 1 100 1 1 64 64
keymgr_env_pkg::keymgr_env_cov::err_code_cg 2 2 100.00 1 100 1 0 64 64
keymgr_env_pkg::keymgr_env_cov::invalid_hw_input_cg 8 8 100.00 1 100 1 0 64 64
keymgr_env_pkg::keymgr_env_cov::key_version_compare_cg 26 26 100.00 1 100 1 0 64 64
keymgr_env_pkg::keymgr_env_cov::reseed_interval_cg 37 37 100.00 1 100 1 0 64 64
keymgr_env_pkg::keymgr_env_cov::sync_async_fault_cross_cg 2 2 100.00 1 100 1 0 64 64
keymgr_env_pkg::keymgr_sw_input_cg_wrap::keymgr_sw_input_cg 98 98 100.00 98.91 1 100 1 1 64 64
tb.dut.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_if_proxy::onehot_fault_cg 3 3 100.00 100.00 1 100 1 1 64 64
push_pull_agent_pkg::req_ack_cg 3 3 100.00 100.00 1 100 1 1 64 64
push_pull_agent_pkg::valid_ready_cg 4 4 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=1} 1 1 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::pending_req_on_rst_cg 2 2 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128} 137 137 100.00 100.00 1 100 1 1 64 64
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