Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
97.93	95.95	97.85	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	29136013	18825	0	0
attest_sw_binding_0_rd_A	29136013	2429	0	0
attest_sw_binding_1_rd_A	29136013	2421	0	0
attest_sw_binding_2_rd_A	29136013	2588	0	0
attest_sw_binding_3_rd_A	29136013	2670	0	0
attest_sw_binding_4_rd_A	29136013	2404	0	0
attest_sw_binding_5_rd_A	29136013	2495	0	0
attest_sw_binding_6_rd_A	29136013	2387	0	0
attest_sw_binding_7_rd_A	29136013	2390	0	0
intr_enable_rd_A	29136013	3161	0	0
key_version_rd_A	29136013	2525	0	0
max_creator_key_ver_regwen_rd_A	29136013	2493	0	0
max_owner_int_key_ver_regwen_rd_A	29136013	2380	0	0
max_owner_key_ver_regwen_rd_A	29136013	2598	0	0
reseed_interval_regwen_rd_A	29136013	2502	0	0
salt_0_rd_A	29136013	2610	0	0
salt_1_rd_A	29136013	2513	0	0
salt_2_rd_A	29136013	2563	0	0
salt_3_rd_A	29136013	2415	0	0
salt_4_rd_A	29136013	2537	0	0
salt_5_rd_A	29136013	2655	0	0
salt_6_rd_A	29136013	2521	0	0
salt_7_rd_A	29136013	2401	0	0
sealing_sw_binding_0_rd_A	29136013	2746	0	0
sealing_sw_binding_1_rd_A	29136013	2457	0	0
sealing_sw_binding_2_rd_A	29136013	2479	0	0
sealing_sw_binding_3_rd_A	29136013	2594	0	0
sealing_sw_binding_4_rd_A	29136013	2434	0	0
sealing_sw_binding_5_rd_A	29136013	2610	0	0
sealing_sw_binding_6_rd_A	29136013	2476	0	0
sealing_sw_binding_7_rd_A	29136013	2500	0	0
sideload_clear_rd_A	29136013	2484	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	18825	0	0
T7	10260	0	0	0
T8	4426	0	0	0
T25	57614	0	0	0
T35	8847	1	0	0
T36	0	1	0	0
T101	24950	410	0	0
T102	0	211	0	0
T103	0	352	0	0
T115	204323	0	0	0
T127	0	6	0	0
T128	0	1	0	0
T129	0	396	0	0
T130	0	342	0	0
T134	7280	0	0	0
T135	20852	0	0	0
T191	0	1	0	0
T192	37691	0	0	0
T193	20070	0	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2429	0	0
T116	21165	110	0	0
T118	7408	0	0	0
T119	15995	32	0	0
T121	0	33	0	0
T127	7697	11	0	0
T128	28542	86	0	0
T142	13366	20	0	0
T148	859	0	0	0
T150	0	7	0	0
T155	1670	7	0	0
T160	3888	0	0	0
T191	2819	5	0	0
T194	0	14	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2421	0	0
T116	21165	110	0	0
T118	7408	0	0	0
T119	15995	60	0	0
T121	0	24	0	0
T127	7697	20	0	0
T128	28542	63	0	0
T142	13366	38	0	0
T148	859	0	0	0
T150	0	7	0	0
T155	1670	3	0	0
T160	3888	0	0	0
T191	2819	3	0	0
T194	0	7	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2588	0	0
T116	21165	95	0	0
T118	7408	0	0	0
T119	15995	27	0	0
T121	0	16	0	0
T127	7697	21	0	0
T128	28542	80	0	0
T142	13366	33	0	0
T148	859	0	0	0
T150	0	6	0	0
T155	1670	6	0	0
T160	3888	0	0	0
T191	2819	1	0	0
T194	0	11	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2670	0	0
T116	21165	104	0	0
T118	7408	0	0	0
T119	15995	25	0	0
T121	0	15	0	0
T127	7697	32	0	0
T128	28542	75	0	0
T142	13366	37	0	0
T148	859	0	0	0
T150	0	6	0	0
T153	0	8	0	0
T155	1670	1	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T194	0	13	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2404	0	0
T116	21165	98	0	0
T118	7408	0	0	0
T119	15995	26	0	0
T121	0	22	0	0
T127	7697	22	0	0
T128	28542	85	0	0
T142	13366	28	0	0
T148	859	0	0	0
T150	0	10	0	0
T155	1670	2	0	0
T160	3888	0	0	0
T191	2819	7	0	0
T194	0	18	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2495	0	0
T116	21165	95	0	0
T118	7408	0	0	0
T119	15995	37	0	0
T121	0	26	0	0
T127	7697	24	0	0
T128	28542	69	0	0
T142	13366	18	0	0
T148	859	0	0	0
T150	0	8	0	0
T155	1670	1	0	0
T160	3888	0	0	0
T191	2819	10	0	0
T194	0	8	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2387	0	0
T116	21165	86	0	0
T118	7408	0	0	0
T119	15995	38	0	0
T121	0	20	0	0
T127	7697	18	0	0
T128	28542	49	0	0
T142	13366	15	0	0
T148	859	0	0	0
T150	0	8	0	0
T155	1670	6	0	0
T160	3888	0	0	0
T191	2819	2	0	0
T194	0	15	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2390	0	0
T116	21165	105	0	0
T118	7408	0	0	0
T119	15995	28	0	0
T121	0	13	0	0
T127	7697	30	0	0
T128	28542	49	0	0
T142	13366	15	0	0
T148	859	0	0	0
T150	0	4	0	0
T155	1670	9	0	0
T160	3888	0	0	0
T191	2819	5	0	0
T194	0	14	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	3161	0	0
T2	77723	31	0	0
T3	4746	0	0	0
T4	3717	0	0	0
T5	0	39	0	0
T6	0	6	0	0
T13	15388	0	0	0
T14	8524	0	0	0
T15	5147	0	0	0
T16	4444	0	0	0
T17	3335	0	0	0
T18	17938	0	0	0
T41	11174	0	0	0
T44	0	22	0	0
T116	0	111	0	0
T127	0	15	0	0
T128	0	91	0	0
T142	0	37	0	0
T155	0	5	0	0
T191	0	10	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2525	0	0
T116	21165	131	0	0
T118	7408	0	0	0
T119	15995	33	0	0
T121	0	23	0	0
T127	7697	41	0	0
T128	28542	68	0	0
T142	13366	23	0	0
T148	859	0	0	0
T150	0	11	0	0
T155	1670	2	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T194	0	15	0	0
T195	0	35	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2493	0	0
T116	21165	69	0	0
T118	7408	0	0	0
T119	15995	34	0	0
T121	0	31	0	0
T127	7697	30	0	0
T128	28542	69	0	0
T142	13366	18	0	0
T148	859	0	0	0
T150	0	7	0	0
T155	1670	7	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T194	0	12	0	0
T195	0	29	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2380	0	0
T116	21165	105	0	0
T118	7408	0	0	0
T119	15995	33	0	0
T121	0	22	0	0
T127	7697	19	0	0
T128	28542	83	0	0
T142	13366	12	0	0
T148	859	0	0	0
T150	0	12	0	0
T153	0	8	0	0
T155	1670	2	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T194	0	20	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2598	0	0
T116	21165	111	0	0
T118	7408	0	0	0
T119	15995	47	0	0
T121	0	17	0	0
T127	7697	42	0	0
T128	28542	80	0	0
T142	13366	26	0	0
T148	859	0	0	0
T150	0	11	0	0
T155	1670	1	0	0
T160	3888	0	0	0
T191	2819	4	0	0
T194	0	17	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2502	0	0
T116	21165	82	0	0
T118	7408	0	0	0
T119	15995	29	0	0
T121	0	31	0	0
T127	7697	34	0	0
T128	28542	71	0	0
T142	13366	17	0	0
T148	859	0	0	0
T150	0	9	0	0
T155	1670	6	0	0
T160	3888	0	0	0
T191	2819	16	0	0
T194	0	9	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2610	0	0
T116	21165	93	0	0
T118	7408	0	0	0
T119	15995	20	0	0
T121	0	35	0	0
T127	7697	19	0	0
T128	28542	75	0	0
T142	13366	15	0	0
T148	859	0	0	0
T150	0	12	0	0
T155	1670	4	0	0
T160	3888	0	0	0
T191	2819	10	0	0
T194	0	11	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2513	0	0
T116	21165	124	0	0
T118	7408	0	0	0
T119	15995	23	0	0
T121	0	21	0	0
T127	7697	22	0	0
T128	28542	68	0	0
T142	13366	22	0	0
T148	859	0	0	0
T150	0	12	0	0
T155	1670	1	0	0
T160	3888	0	0	0
T191	2819	6	0	0
T194	0	16	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2563	0	0
T116	21165	104	0	0
T118	7408	0	0	0
T119	15995	47	0	0
T121	0	31	0	0
T127	7697	22	0	0
T128	28542	84	0	0
T142	13366	36	0	0
T148	859	0	0	0
T150	0	15	0	0
T155	1670	1	0	0
T160	3888	0	0	0
T191	2819	2	0	0
T194	0	6	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2415	0	0
T116	21165	84	0	0
T118	7408	0	0	0
T119	15995	22	0	0
T121	0	20	0	0
T127	7697	16	0	0
T128	28542	66	0	0
T142	13366	19	0	0
T148	859	0	0	0
T150	0	7	0	0
T155	1670	6	0	0
T160	3888	0	0	0
T191	2819	11	0	0
T194	0	8	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2537	0	0
T116	21165	91	0	0
T118	7408	0	0	0
T119	15995	27	0	0
T121	0	10	0	0
T127	7697	7	0	0
T128	28542	81	0	0
T142	13366	5	0	0
T148	859	0	0	0
T150	0	17	0	0
T155	1670	4	0	0
T160	3888	0	0	0
T191	2819	8	0	0
T194	0	10	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2655	0	0
T116	21165	106	0	0
T118	7408	0	0	0
T119	15995	29	0	0
T121	0	13	0	0
T127	7697	11	0	0
T128	28542	69	0	0
T142	13366	28	0	0
T148	859	0	0	0
T150	0	4	0	0
T155	1670	5	0	0
T160	3888	0	0	0
T191	2819	11	0	0
T194	0	21	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2521	0	0
T116	21165	89	0	0
T118	7408	0	0	0
T119	15995	27	0	0
T121	0	26	0	0
T127	7697	22	0	0
T128	28542	74	0	0
T142	13366	8	0	0
T148	859	0	0	0
T150	0	9	0	0
T155	1670	4	0	0
T160	3888	0	0	0
T191	2819	3	0	0
T194	0	10	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2401	0	0
T116	21165	113	0	0
T118	7408	0	0	0
T119	15995	41	0	0
T121	0	19	0	0
T127	7697	24	0	0
T128	28542	85	0	0
T142	13366	7	0	0
T148	859	0	0	0
T150	0	4	0	0
T155	1670	2	0	0
T160	3888	0	0	0
T191	2819	13	0	0
T194	0	16	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2746	0	0
T116	21165	68	0	0
T118	7408	0	0	0
T119	15995	57	0	0
T121	0	16	0	0
T127	7697	21	0	0
T128	28542	90	0	0
T142	13366	23	0	0
T148	859	0	0	0
T150	0	7	0	0
T155	1670	8	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T194	0	13	0	0
T195	0	63	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2457	0	0
T116	21165	127	0	0
T118	7408	0	0	0
T119	15995	43	0	0
T121	0	23	0	0
T127	7697	17	0	0
T128	28542	77	0	0
T142	13366	22	0	0
T148	859	0	0	0
T150	0	9	0	0
T155	1670	1	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T194	0	16	0	0
T195	0	28	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2479	0	0
T116	21165	106	0	0
T118	7408	0	0	0
T119	15995	32	0	0
T121	0	27	0	0
T127	7697	27	0	0
T128	28542	45	0	0
T142	13366	31	0	0
T148	859	0	0	0
T150	0	8	0	0
T155	1670	3	0	0
T160	3888	0	0	0
T191	2819	3	0	0
T194	0	16	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2594	0	0
T116	21165	99	0	0
T118	7408	0	0	0
T119	15995	36	0	0
T121	0	33	0	0
T127	7697	31	0	0
T128	28542	73	0	0
T142	13366	13	0	0
T148	859	0	0	0
T150	0	7	0	0
T153	0	5	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T191	2819	2	0	0
T194	0	15	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2434	0	0
T116	21165	102	0	0
T118	7408	0	0	0
T119	15995	48	0	0
T121	0	31	0	0
T127	7697	17	0	0
T128	28542	98	0	0
T142	13366	10	0	0
T148	859	0	0	0
T150	0	16	0	0
T155	1670	1	0	0
T160	3888	0	0	0
T191	2819	2	0	0
T194	0	13	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2610	0	0
T116	21165	124	0	0
T118	7408	0	0	0
T119	15995	9	0	0
T121	0	23	0	0
T127	7697	35	0	0
T128	28542	88	0	0
T142	13366	25	0	0
T148	859	0	0	0
T150	0	8	0	0
T155	1670	3	0	0
T160	3888	0	0	0
T191	2819	14	0	0
T194	0	7	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2476	0	0
T116	21165	113	0	0
T118	7408	0	0	0
T119	15995	21	0	0
T121	0	27	0	0
T127	7697	40	0	0
T128	28542	75	0	0
T142	13366	18	0	0
T148	859	0	0	0
T150	0	10	0	0
T153	0	5	0	0
T157	3146	0	0	0
T160	3888	0	0	0
T191	2819	2	0	0
T194	0	6	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2500	0	0
T116	21165	96	0	0
T118	7408	0	0	0
T119	15995	37	0	0
T121	0	23	0	0
T127	7697	27	0	0
T128	28542	64	0	0
T142	13366	19	0	0
T148	859	0	0	0
T150	0	14	0	0
T155	1670	5	0	0
T160	3888	0	0	0
T191	2819	3	0	0
T194	0	5	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	29136013	2484	0	0
T116	21165	121	0	0
T118	7408	0	0	0
T119	15995	23	0	0
T121	0	20	0	0
T127	7697	17	0	0
T128	28542	74	0	0
T142	13366	10	0	0
T148	859	0	0	0
T150	0	11	0	0
T155	1670	9	0	0
T160	3888	0	0	0
T191	2819	10	0	0
T194	0	6	0	0