Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.04	95.95	98.39	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	33591243	18404	0	0
attest_sw_binding_0_rd_A	33591243	2966	0	0
attest_sw_binding_1_rd_A	33591243	2637	0	0
attest_sw_binding_2_rd_A	33591243	2911	0	0
attest_sw_binding_3_rd_A	33591243	2863	0	0
attest_sw_binding_4_rd_A	33591243	2774	0	0
attest_sw_binding_5_rd_A	33591243	2841	0	0
attest_sw_binding_6_rd_A	33591243	2761	0	0
attest_sw_binding_7_rd_A	33591243	2710	0	0
intr_enable_rd_A	33591243	3524	0	0
key_version_rd_A	33591243	2939	0	0
max_creator_key_ver_regwen_rd_A	33591243	2712	0	0
max_owner_int_key_ver_regwen_rd_A	33591243	2985	0	0
max_owner_key_ver_regwen_rd_A	33591243	2878	0	0
reseed_interval_regwen_rd_A	33591243	2865	0	0
salt_0_rd_A	33591243	2813	0	0
salt_1_rd_A	33591243	2900	0	0
salt_2_rd_A	33591243	2722	0	0
salt_3_rd_A	33591243	3058	0	0
salt_4_rd_A	33591243	2896	0	0
salt_5_rd_A	33591243	2794	0	0
salt_6_rd_A	33591243	2827	0	0
salt_7_rd_A	33591243	2742	0	0
sealing_sw_binding_0_rd_A	33591243	2812	0	0
sealing_sw_binding_1_rd_A	33591243	2941	0	0
sealing_sw_binding_2_rd_A	33591243	2822	0	0
sealing_sw_binding_3_rd_A	33591243	2942	0	0
sealing_sw_binding_4_rd_A	33591243	2933	0	0
sealing_sw_binding_5_rd_A	33591243	2803	0	0
sealing_sw_binding_6_rd_A	33591243	2943	0	0
sealing_sw_binding_7_rd_A	33591243	2899	0	0
sideload_clear_rd_A	33591243	2766	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	18404	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	169	0	0
T42	267423	0	0	0
T50	0	158	0	0
T53	0	203	0	0
T70	0	196	0	0
T71	0	44	0	0
T98	5083	0	0	0
T115	0	1248	0	0
T124	0	520	0	0
T125	0	247	0	0
T126	0	352	0	0
T132	0	1883	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2966	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	34	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	51	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	8	0	0
T150	0	65	0	0
T175	0	32	0	0
T176	0	44	0	0
T177	0	5	0	0
T178	0	54	0	0
T179	0	63	0	0
T180	0	25	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2637	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	17	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	53	0	0
T123	0	54	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T150	0	86	0	0
T175	0	33	0	0
T176	0	29	0	0
T177	0	6	0	0
T178	0	35	0	0
T179	0	51	0	0
T180	0	15	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2911	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	9	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	41	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	11	0	0
T150	0	77	0	0
T175	0	38	0	0
T176	0	25	0	0
T177	0	20	0	0
T178	0	29	0	0
T179	0	58	0	0
T180	0	34	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2863	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	28	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	34	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	7	0	0
T150	0	74	0	0
T175	0	44	0	0
T176	0	24	0	0
T177	0	13	0	0
T178	0	35	0	0
T179	0	49	0	0
T180	0	57	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2774	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	23	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	59	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	4	0	0
T150	0	96	0	0
T175	0	24	0	0
T176	0	44	0	0
T177	0	7	0	0
T178	0	54	0	0
T179	0	47	0	0
T180	0	36	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2841	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	36	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	50	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T150	0	72	0	0
T175	0	29	0	0
T176	0	33	0	0
T177	0	6	0	0
T178	0	41	0	0
T179	0	62	0	0
T180	0	22	0	0
T181	0	7	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2761	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	40	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	40	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	10	0	0
T150	0	76	0	0
T175	0	20	0	0
T176	0	36	0	0
T177	0	11	0	0
T178	0	16	0	0
T179	0	64	0	0
T180	0	40	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2710	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	18	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	25	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	5	0	0
T150	0	67	0	0
T175	0	46	0	0
T176	0	32	0	0
T177	0	5	0	0
T178	0	18	0	0
T179	0	57	0	0
T180	0	18	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	3524	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	40	0	0
T42	267423	67	0	0
T64	0	23	0	0
T72	0	24	0	0
T98	5083	0	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T140	0	8	0	0
T175	0	28	0	0
T176	0	90	0	0
T182	0	25	0	0
T183	0	4	0	0
T184	0	19	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2939	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	43	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	51	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	9	0	0
T143	0	21	0	0
T150	0	57	0	0
T175	0	19	0	0
T176	0	56	0	0
T178	0	34	0	0
T179	0	88	0	0
T180	0	26	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2712	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	7	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	42	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	11	0	0
T150	0	57	0	0
T175	0	43	0	0
T176	0	53	0	0
T177	0	14	0	0
T178	0	26	0	0
T179	0	54	0	0
T180	0	38	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2985	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	22	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	35	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	7	0	0
T150	0	69	0	0
T175	0	15	0	0
T176	0	63	0	0
T177	0	13	0	0
T178	0	20	0	0
T179	0	49	0	0
T180	0	31	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2878	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	26	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	61	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	5	0	0
T150	0	90	0	0
T175	0	65	0	0
T176	0	58	0	0
T177	0	23	0	0
T178	0	20	0	0
T179	0	68	0	0
T180	0	36	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2865	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	30	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	54	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	5	0	0
T150	0	66	0	0
T175	0	56	0	0
T176	0	34	0	0
T177	0	14	0	0
T178	0	58	0	0
T179	0	59	0	0
T180	0	27	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2813	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	19	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	48	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	2	0	0
T150	0	77	0	0
T175	0	24	0	0
T176	0	50	0	0
T177	0	15	0	0
T178	0	34	0	0
T179	0	68	0	0
T180	0	51	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2900	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	24	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	62	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	5	0	0
T150	0	82	0	0
T175	0	36	0	0
T176	0	49	0	0
T177	0	14	0	0
T178	0	14	0	0
T179	0	78	0	0
T180	0	32	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2722	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	39	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	34	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T143	0	3	0	0
T150	0	81	0	0
T175	0	36	0	0
T176	0	24	0	0
T177	0	8	0	0
T178	0	54	0	0
T179	0	61	0	0
T180	0	20	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	3058	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	29	0	0
T42	267423	0	0	0
T48	0	6	0	0
T98	5083	0	0	0
T119	0	38	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T150	0	77	0	0
T175	0	23	0	0
T176	0	33	0	0
T177	0	11	0	0
T178	0	48	0	0
T179	0	51	0	0
T180	0	27	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2896	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	18	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	60	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T150	0	90	0	0
T175	0	65	0	0
T176	0	36	0	0
T177	0	14	0	0
T178	0	17	0	0
T179	0	72	0	0
T180	0	21	0	0
T185	0	6	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2794	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	27	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	45	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	9	0	0
T143	0	19	0	0
T150	0	86	0	0
T175	0	29	0	0
T176	0	38	0	0
T178	0	30	0	0
T179	0	32	0	0
T180	0	45	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2827	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	20	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	36	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T143	0	40	0	0
T150	0	86	0	0
T175	0	17	0	0
T176	0	16	0	0
T177	0	9	0	0
T178	0	36	0	0
T179	0	60	0	0
T180	0	14	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2742	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	29	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	48	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T143	0	23	0	0
T150	0	77	0	0
T175	0	38	0	0
T176	0	45	0	0
T177	0	3	0	0
T178	0	15	0	0
T179	0	77	0	0
T180	0	11	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2812	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	29	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	43	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	3	0	0
T150	0	93	0	0
T175	0	44	0	0
T176	0	30	0	0
T177	0	13	0	0
T178	0	64	0	0
T179	0	67	0	0
T180	0	3	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2941	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	31	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	70	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	9	0	0
T150	0	80	0	0
T175	0	37	0	0
T176	0	33	0	0
T177	0	17	0	0
T178	0	39	0	0
T179	0	53	0	0
T180	0	25	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2822	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	29	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	44	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	9	0	0
T150	0	79	0	0
T175	0	29	0	0
T176	0	44	0	0
T177	0	26	0	0
T178	0	28	0	0
T179	0	57	0	0
T180	0	29	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2942	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	26	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	47	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	4	0	0
T150	0	67	0	0
T175	0	36	0	0
T176	0	32	0	0
T177	0	6	0	0
T178	0	35	0	0
T179	0	56	0	0
T180	0	29	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2933	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	27	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	62	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T150	0	88	0	0
T175	0	32	0	0
T176	0	28	0	0
T177	0	15	0	0
T178	0	49	0	0
T179	0	56	0	0
T180	0	14	0	0
T186	0	2	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2803	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	21	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	43	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T143	0	10	0	0
T150	0	79	0	0
T175	0	33	0	0
T176	0	31	0	0
T177	0	30	0	0
T178	0	34	0	0
T179	0	74	0	0
T180	0	24	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2943	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	10	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	53	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T143	0	35	0	0
T150	0	73	0	0
T175	0	35	0	0
T176	0	44	0	0
T177	0	1	0	0
T178	0	21	0	0
T179	0	41	0	0
T180	0	16	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2899	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	43	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	49	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T143	0	24	0	0
T150	0	61	0	0
T175	0	31	0	0
T176	0	42	0	0
T177	0	16	0	0
T178	0	20	0	0
T179	0	71	0	0
T180	0	38	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	33591243	2766	0	0
T24	2788	0	0	0
T25	8591	0	0	0
T35	16707	0	0	0
T36	6588	0	0	0
T41	54283	31	0	0
T42	267423	0	0	0
T98	5083	0	0	0
T119	0	38	0	0
T133	11844	0	0	0
T134	141776	0	0	0
T135	72320	0	0	0
T142	0	2	0	0
T150	0	68	0	0
T175	0	13	0	0
T176	0	18	0	0
T177	0	11	0	0
T178	0	29	0	0
T179	0	61	0	0
T180	0	25	0	0