Module Definition
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Module : keymgr_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.keymgr_csr_assert 100.00 100.00


Module Instance : tb.dut.keymgr_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
98.04 95.95 98.39 99.96 95.92 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : keymgr_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 32 32 100.00 32 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 32 32 100.00 32 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 29588816 13684 0 0
attest_sw_binding_0_rd_A 29588816 3383 0 0
attest_sw_binding_1_rd_A 29588816 3244 0 0
attest_sw_binding_2_rd_A 29588816 3186 0 0
attest_sw_binding_3_rd_A 29588816 3283 0 0
attest_sw_binding_4_rd_A 29588816 3449 0 0
attest_sw_binding_5_rd_A 29588816 3437 0 0
attest_sw_binding_6_rd_A 29588816 3487 0 0
attest_sw_binding_7_rd_A 29588816 3493 0 0
intr_enable_rd_A 29588816 3810 0 0
key_version_rd_A 29588816 3440 0 0
max_creator_key_ver_regwen_rd_A 29588816 3290 0 0
max_owner_int_key_ver_regwen_rd_A 29588816 3334 0 0
max_owner_key_ver_regwen_rd_A 29588816 3590 0 0
reseed_interval_regwen_rd_A 29588816 3476 0 0
salt_0_rd_A 29588816 3178 0 0
salt_1_rd_A 29588816 3320 0 0
salt_2_rd_A 29588816 3581 0 0
salt_3_rd_A 29588816 3230 0 0
salt_4_rd_A 29588816 3366 0 0
salt_5_rd_A 29588816 3330 0 0
salt_6_rd_A 29588816 3212 0 0
salt_7_rd_A 29588816 3306 0 0
sealing_sw_binding_0_rd_A 29588816 3270 0 0
sealing_sw_binding_1_rd_A 29588816 3371 0 0
sealing_sw_binding_2_rd_A 29588816 3181 0 0
sealing_sw_binding_3_rd_A 29588816 3316 0 0
sealing_sw_binding_4_rd_A 29588816 3205 0 0
sealing_sw_binding_5_rd_A 29588816 3388 0 0
sealing_sw_binding_6_rd_A 29588816 3336 0 0
sealing_sw_binding_7_rd_A 29588816 3302 0 0
sideload_clear_rd_A 29588816 3373 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 13684 0 0
T7 40566 1193 0 0
T23 29531 0 0 0
T44 7626 0 0 0
T48 4886 0 0 0
T53 14441 0 0 0
T71 0 282 0 0
T100 11595 278 0 0
T101 0 514 0 0
T108 0 433 0 0
T119 0 32 0 0
T120 0 348 0 0
T121 0 909 0 0
T122 0 318 0 0
T123 0 77 0 0
T124 113516 0 0 0
T125 3518 0 0 0
T126 40033 0 0 0
T127 1541 0 0 0

attest_sw_binding_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3383 0 0
T38 3935 0 0 0
T71 0 33 0 0
T110 0 96 0 0
T119 31583 4 0 0
T122 0 74 0 0
T136 4109 0 0 0
T141 0 10 0 0
T143 0 14 0 0
T150 0 75 0 0
T172 0 42 0 0
T173 0 285 0 0
T174 0 2 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

attest_sw_binding_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3244 0 0
T38 3935 0 0 0
T71 0 39 0 0
T110 0 102 0 0
T119 31583 26 0 0
T122 0 68 0 0
T136 4109 0 0 0
T141 0 5 0 0
T143 0 10 0 0
T150 0 93 0 0
T172 0 33 0 0
T173 0 257 0 0
T174 0 1 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

attest_sw_binding_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3186 0 0
T38 3935 0 0 0
T71 0 37 0 0
T110 0 109 0 0
T119 31583 5 0 0
T122 0 60 0 0
T136 4109 0 0 0
T141 0 8 0 0
T143 0 4 0 0
T150 0 90 0 0
T172 0 27 0 0
T173 0 276 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

attest_sw_binding_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3283 0 0
T38 3935 0 0 0
T71 0 37 0 0
T110 0 107 0 0
T119 31583 4 0 0
T122 0 41 0 0
T136 4109 0 0 0
T141 0 8 0 0
T150 0 102 0 0
T172 0 17 0 0
T173 0 254 0 0
T174 0 7 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0
T182 0 1 0 0

attest_sw_binding_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3449 0 0
T38 3935 0 0 0
T71 0 52 0 0
T110 0 115 0 0
T119 31583 29 0 0
T122 0 65 0 0
T136 4109 0 0 0
T141 0 13 0 0
T143 0 5 0 0
T150 0 81 0 0
T172 0 47 0 0
T173 0 225 0 0
T174 0 15 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

attest_sw_binding_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3437 0 0
T38 3935 0 0 0
T71 0 32 0 0
T110 0 92 0 0
T119 31583 10 0 0
T122 0 42 0 0
T136 4109 0 0 0
T141 0 8 0 0
T143 0 6 0 0
T150 0 83 0 0
T172 0 7 0 0
T173 0 272 0 0
T174 0 12 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

attest_sw_binding_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3487 0 0
T38 3935 0 0 0
T71 0 42 0 0
T110 0 99 0 0
T119 31583 15 0 0
T122 0 74 0 0
T136 4109 0 0 0
T141 0 2 0 0
T143 0 8 0 0
T150 0 89 0 0
T172 0 43 0 0
T173 0 321 0 0
T174 0 5 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

attest_sw_binding_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3493 0 0
T38 3935 0 0 0
T71 0 30 0 0
T110 0 81 0 0
T119 31583 9 0 0
T122 0 75 0 0
T136 4109 0 0 0
T141 0 12 0 0
T143 0 12 0 0
T150 0 78 0 0
T172 0 30 0 0
T173 0 264 0 0
T174 0 14 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3810 0 0
T50 0 39 0 0
T51 0 12 0 0
T59 111139 30 0 0
T61 8852 0 0 0
T70 0 25 0 0
T71 0 88 0 0
T86 98575 0 0 0
T119 0 25 0 0
T122 0 154 0 0
T135 3172 0 0 0
T183 0 9 0 0
T184 0 25 0 0
T185 0 10 0 0
T186 11288 0 0 0
T187 33893 0 0 0
T188 14998 0 0 0
T189 4440 0 0 0
T190 3802 0 0 0
T191 3863 0 0 0

key_version_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3440 0 0
T38 3935 0 0 0
T71 0 14 0 0
T110 0 98 0 0
T119 31583 19 0 0
T122 0 52 0 0
T136 4109 0 0 0
T141 0 11 0 0
T143 0 2 0 0
T150 0 73 0 0
T172 0 27 0 0
T173 0 288 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

max_creator_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3290 0 0
T38 3935 0 0 0
T71 0 40 0 0
T110 0 95 0 0
T119 31583 13 0 0
T122 0 49 0 0
T136 4109 0 0 0
T141 0 4 0 0
T143 0 8 0 0
T150 0 76 0 0
T172 0 36 0 0
T173 0 225 0 0
T174 0 16 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

max_owner_int_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3334 0 0
T38 3935 0 0 0
T71 0 43 0 0
T110 0 89 0 0
T119 31583 25 0 0
T122 0 47 0 0
T136 4109 0 0 0
T141 0 1 0 0
T143 0 3 0 0
T150 0 97 0 0
T172 0 36 0 0
T173 0 275 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

max_owner_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3590 0 0
T38 3935 0 0 0
T71 0 12 0 0
T110 0 128 0 0
T119 31583 15 0 0
T122 0 116 0 0
T136 4109 0 0 0
T141 0 7 0 0
T150 0 76 0 0
T172 0 18 0 0
T173 0 238 0 0
T174 0 7 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0
T192 0 4 0 0

reseed_interval_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3476 0 0
T38 3935 0 0 0
T71 0 18 0 0
T110 0 87 0 0
T119 31583 4 0 0
T122 0 57 0 0
T136 4109 0 0 0
T141 0 10 0 0
T143 0 16 0 0
T150 0 77 0 0
T172 0 29 0 0
T173 0 332 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3178 0 0
T38 3935 0 0 0
T71 0 27 0 0
T110 0 90 0 0
T119 31583 30 0 0
T122 0 80 0 0
T136 4109 0 0 0
T141 0 9 0 0
T143 0 4 0 0
T150 0 94 0 0
T172 0 39 0 0
T173 0 282 0 0
T174 0 5 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3320 0 0
T38 3935 0 0 0
T71 0 28 0 0
T110 0 92 0 0
T119 31583 8 0 0
T122 0 48 0 0
T136 4109 0 0 0
T141 0 11 0 0
T143 0 1 0 0
T150 0 67 0 0
T172 0 32 0 0
T173 0 293 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3581 0 0
T38 3935 0 0 0
T71 0 35 0 0
T110 0 107 0 0
T119 31583 19 0 0
T122 0 58 0 0
T136 4109 0 0 0
T141 0 6 0 0
T150 0 93 0 0
T172 0 29 0 0
T173 0 285 0 0
T174 0 14 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0
T193 0 8 0 0

salt_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3230 0 0
T38 3935 0 0 0
T71 0 41 0 0
T110 0 95 0 0
T119 31583 14 0 0
T122 0 96 0 0
T136 4109 0 0 0
T141 0 4 0 0
T143 0 11 0 0
T150 0 69 0 0
T172 0 14 0 0
T173 0 278 0 0
T174 0 11 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3366 0 0
T38 3935 0 0 0
T71 0 16 0 0
T110 0 124 0 0
T119 31583 26 0 0
T122 0 66 0 0
T136 4109 0 0 0
T141 0 9 0 0
T143 0 5 0 0
T150 0 64 0 0
T172 0 17 0 0
T173 0 344 0 0
T174 0 9 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3330 0 0
T38 3935 0 0 0
T71 0 26 0 0
T110 0 74 0 0
T119 31583 10 0 0
T122 0 79 0 0
T136 4109 0 0 0
T141 0 12 0 0
T143 0 8 0 0
T150 0 106 0 0
T172 0 52 0 0
T173 0 248 0 0
T174 0 4 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3212 0 0
T38 3935 0 0 0
T71 0 17 0 0
T110 0 87 0 0
T119 31583 1 0 0
T122 0 59 0 0
T136 4109 0 0 0
T141 0 5 0 0
T143 0 6 0 0
T150 0 79 0 0
T172 0 19 0 0
T173 0 293 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

salt_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3306 0 0
T38 3935 0 0 0
T71 0 43 0 0
T110 0 83 0 0
T119 31583 15 0 0
T122 0 74 0 0
T136 4109 0 0 0
T141 0 1 0 0
T143 0 5 0 0
T150 0 84 0 0
T172 0 39 0 0
T173 0 210 0 0
T174 0 3 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3270 0 0
T38 3935 0 0 0
T71 0 36 0 0
T110 0 86 0 0
T119 31583 1 0 0
T122 0 36 0 0
T136 4109 0 0 0
T141 0 13 0 0
T143 0 12 0 0
T150 0 80 0 0
T172 0 35 0 0
T173 0 303 0 0
T174 0 4 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3371 0 0
T38 3935 0 0 0
T71 0 33 0 0
T110 0 84 0 0
T119 31583 18 0 0
T122 0 70 0 0
T136 4109 0 0 0
T141 0 5 0 0
T143 0 6 0 0
T150 0 84 0 0
T172 0 37 0 0
T173 0 321 0 0
T174 0 9 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3181 0 0
T38 3935 0 0 0
T71 0 49 0 0
T110 0 97 0 0
T119 31583 36 0 0
T122 0 49 0 0
T136 4109 0 0 0
T141 0 18 0 0
T143 0 6 0 0
T150 0 68 0 0
T172 0 25 0 0
T173 0 266 0 0
T174 0 15 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3316 0 0
T38 3935 0 0 0
T71 0 29 0 0
T110 0 84 0 0
T119 31583 28 0 0
T122 0 52 0 0
T136 4109 0 0 0
T141 0 13 0 0
T143 0 10 0 0
T150 0 79 0 0
T172 0 30 0 0
T173 0 256 0 0
T174 0 9 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3205 0 0
T38 3935 0 0 0
T71 0 26 0 0
T110 0 118 0 0
T119 31583 21 0 0
T122 0 33 0 0
T136 4109 0 0 0
T141 0 7 0 0
T143 0 13 0 0
T150 0 88 0 0
T172 0 21 0 0
T173 0 241 0 0
T174 0 8 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3388 0 0
T38 3935 0 0 0
T71 0 29 0 0
T110 0 57 0 0
T119 31583 12 0 0
T122 0 68 0 0
T136 4109 0 0 0
T141 0 12 0 0
T143 0 14 0 0
T150 0 94 0 0
T172 0 38 0 0
T173 0 299 0 0
T174 0 6 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3336 0 0
T38 3935 0 0 0
T71 0 64 0 0
T110 0 100 0 0
T119 31583 7 0 0
T122 0 74 0 0
T136 4109 0 0 0
T141 0 7 0 0
T143 0 8 0 0
T150 0 88 0 0
T172 0 13 0 0
T173 0 240 0 0
T174 0 9 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0

sealing_sw_binding_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3302 0 0
T71 0 23 0 0
T110 0 73 0 0
T112 0 13 0 0
T122 56076 79 0 0
T141 0 16 0 0
T143 0 8 0 0
T150 0 81 0 0
T152 0 116 0 0
T172 0 27 0 0
T173 0 223 0 0
T194 2497 0 0 0
T195 27544 0 0 0
T196 13151 0 0 0
T197 4254 0 0 0
T198 3023 0 0 0
T199 5195 0 0 0
T200 16089 0 0 0
T201 3018 0 0 0
T202 4467 0 0 0

sideload_clear_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 29588816 3373 0 0
T38 3935 0 0 0
T71 0 46 0 0
T110 0 115 0 0
T119 31583 4 0 0
T122 0 72 0 0
T136 4109 0 0 0
T141 0 6 0 0
T150 0 68 0 0
T172 0 12 0 0
T173 0 288 0 0
T174 0 6 0 0
T175 1881 0 0 0
T176 26948 0 0 0
T177 5931 0 0 0
T178 36087 0 0 0
T179 2373 0 0 0
T180 1128 0 0 0
T181 5236 0 0 0
T203 0 6 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%