Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.04	95.95	98.39	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	25573066	15716	0	0
attest_sw_binding_0_rd_A	25573066	2187	0	0
attest_sw_binding_1_rd_A	25573066	2199	0	0
attest_sw_binding_2_rd_A	25573066	2290	0	0
attest_sw_binding_3_rd_A	25573066	2177	0	0
attest_sw_binding_4_rd_A	25573066	2113	0	0
attest_sw_binding_5_rd_A	25573066	2380	0	0
attest_sw_binding_6_rd_A	25573066	2369	0	0
attest_sw_binding_7_rd_A	25573066	2209	0	0
intr_enable_rd_A	25573066	3022	0	0
key_version_rd_A	25573066	2378	0	0
max_creator_key_ver_regwen_rd_A	25573066	2286	0	0
max_owner_int_key_ver_regwen_rd_A	25573066	2232	0	0
max_owner_key_ver_regwen_rd_A	25573066	2300	0	0
reseed_interval_regwen_rd_A	25573066	2291	0	0
salt_0_rd_A	25573066	2206	0	0
salt_1_rd_A	25573066	2160	0	0
salt_2_rd_A	25573066	2295	0	0
salt_3_rd_A	25573066	2201	0	0
salt_4_rd_A	25573066	2268	0	0
salt_5_rd_A	25573066	2258	0	0
salt_6_rd_A	25573066	2285	0	0
salt_7_rd_A	25573066	2328	0	0
sealing_sw_binding_0_rd_A	25573066	2343	0	0
sealing_sw_binding_1_rd_A	25573066	2419	0	0
sealing_sw_binding_2_rd_A	25573066	2185	0	0
sealing_sw_binding_3_rd_A	25573066	2206	0	0
sealing_sw_binding_4_rd_A	25573066	2275	0	0
sealing_sw_binding_5_rd_A	25573066	2436	0	0
sealing_sw_binding_6_rd_A	25573066	2236	0	0
sealing_sw_binding_7_rd_A	25573066	2266	0	0
sideload_clear_rd_A	25573066	2162	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	15716	0	0
T1	24182	23	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T6	0	286	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	75	0	0
T52	0	178	0	0
T61	0	261	0	0
T98	0	313	0	0
T113	0	333	0	0
T122	0	22	0	0
T123	0	59	0	0
T171	0	1	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2187	0	0
T1	24182	22	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	22	0	0
T111	0	35	0	0
T122	0	27	0	0
T133	0	3	0	0
T172	0	21	0	0
T173	0	9	0	0
T174	0	30	0	0
T175	0	165	0	0
T176	0	10	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2199	0	0
T1	24182	18	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	9	0	0
T111	0	51	0	0
T122	0	25	0	0
T133	0	7	0	0
T172	0	21	0	0
T173	0	19	0	0
T174	0	48	0	0
T175	0	106	0	0
T177	0	4	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2290	0	0
T1	24182	22	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	11	0	0
T111	0	51	0	0
T122	0	39	0	0
T133	0	8	0	0
T172	0	21	0	0
T173	0	18	0	0
T174	0	23	0	0
T175	0	186	0	0
T176	0	7	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2177	0	0
T1	24182	22	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	5	0	0
T111	0	40	0	0
T122	0	26	0	0
T133	0	5	0	0
T172	0	11	0	0
T173	0	23	0	0
T174	0	25	0	0
T175	0	133	0	0
T176	0	15	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2113	0	0
T1	24182	19	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	4	0	0
T111	0	67	0	0
T122	0	34	0	0
T133	0	5	0	0
T172	0	19	0	0
T173	0	11	0	0
T174	0	33	0	0
T175	0	107	0	0
T177	0	1	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2380	0	0
T1	24182	24	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	20	0	0
T111	0	65	0	0
T122	0	29	0	0
T133	0	3	0	0
T172	0	18	0	0
T173	0	28	0	0
T174	0	35	0	0
T175	0	181	0	0
T177	0	7	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2369	0	0
T1	24182	39	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	28	0	0
T111	0	75	0	0
T122	0	22	0	0
T133	0	4	0	0
T172	0	17	0	0
T173	0	16	0	0
T174	0	20	0	0
T175	0	95	0	0
T176	0	16	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2209	0	0
T1	24182	37	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	11	0	0
T111	0	29	0	0
T122	0	48	0	0
T133	0	1	0	0
T172	0	21	0	0
T173	0	6	0	0
T174	0	21	0	0
T175	0	111	0	0
T176	0	18	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	3022	0	0
T1	24182	41	0	0
T2	113275	24	0	0
T3	4583	0	0	0
T4	0	38	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	9	0	0
T46	0	75	0	0
T50	0	106	0	0
T122	0	37	0	0
T172	0	13	0	0
T178	0	113	0	0
T179	0	9	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2378	0	0
T1	24182	22	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	13	0	0
T111	0	60	0	0
T122	0	24	0	0
T133	0	5	0	0
T172	0	17	0	0
T173	0	16	0	0
T174	0	37	0	0
T175	0	176	0	0
T177	0	3	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2286	0	0
T1	24182	23	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	20	0	0
T111	0	69	0	0
T122	0	43	0	0
T133	0	3	0	0
T172	0	35	0	0
T173	0	6	0	0
T174	0	35	0	0
T175	0	119	0	0
T176	0	14	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2232	0	0
T1	24182	34	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	13	0	0
T111	0	46	0	0
T122	0	54	0	0
T133	0	3	0	0
T172	0	16	0	0
T173	0	30	0	0
T174	0	39	0	0
T175	0	111	0	0
T177	0	19	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2300	0	0
T1	24182	21	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	27	0	0
T111	0	66	0	0
T122	0	19	0	0
T133	0	9	0	0
T172	0	20	0	0
T173	0	24	0	0
T174	0	30	0	0
T175	0	115	0	0
T177	0	5	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2291	0	0
T1	24182	11	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	9	0	0
T111	0	37	0	0
T122	0	23	0	0
T133	0	2	0	0
T172	0	14	0	0
T173	0	10	0	0
T174	0	41	0	0
T175	0	100	0	0
T176	0	16	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2206	0	0
T1	24182	23	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	10	0	0
T111	0	59	0	0
T122	0	32	0	0
T133	0	9	0	0
T172	0	12	0	0
T173	0	23	0	0
T174	0	35	0	0
T175	0	165	0	0
T176	0	9	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2160	0	0
T1	24182	17	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	15	0	0
T111	0	41	0	0
T122	0	19	0	0
T133	0	8	0	0
T172	0	33	0	0
T173	0	10	0	0
T174	0	30	0	0
T175	0	99	0	0
T176	0	21	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2295	0	0
T1	24182	19	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	4	0	0
T111	0	53	0	0
T122	0	18	0	0
T133	0	5	0	0
T172	0	11	0	0
T173	0	8	0	0
T174	0	30	0	0
T175	0	101	0	0
T176	0	21	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2201	0	0
T1	24182	39	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	9	0	0
T111	0	59	0	0
T122	0	31	0	0
T133	0	1	0	0
T172	0	9	0	0
T173	0	4	0	0
T174	0	19	0	0
T175	0	118	0	0
T177	0	3	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2268	0	0
T1	24182	19	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	8	0	0
T111	0	32	0	0
T122	0	44	0	0
T133	0	3	0	0
T172	0	22	0	0
T173	0	15	0	0
T174	0	15	0	0
T175	0	144	0	0
T176	0	19	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2258	0	0
T1	24182	23	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	8	0	0
T111	0	51	0	0
T122	0	40	0	0
T133	0	6	0	0
T172	0	16	0	0
T174	0	21	0	0
T175	0	122	0	0
T176	0	15	0	0
T177	0	9	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2285	0	0
T1	24182	25	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	11	0	0
T111	0	55	0	0
T122	0	27	0	0
T133	0	1	0	0
T172	0	8	0	0
T173	0	10	0	0
T174	0	32	0	0
T175	0	119	0	0
T177	0	1	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2328	0	0
T1	24182	20	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	16	0	0
T111	0	29	0	0
T122	0	28	0	0
T133	0	5	0	0
T172	0	7	0	0
T173	0	12	0	0
T174	0	32	0	0
T175	0	127	0	0
T176	0	23	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2343	0	0
T1	24182	22	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	18	0	0
T111	0	47	0	0
T122	0	11	0	0
T133	0	5	0	0
T172	0	27	0	0
T173	0	29	0	0
T174	0	26	0	0
T175	0	150	0	0
T177	0	5	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2419	0	0
T1	24182	25	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	15	0	0
T111	0	79	0	0
T122	0	28	0	0
T133	0	6	0	0
T172	0	21	0	0
T173	0	25	0	0
T174	0	39	0	0
T175	0	147	0	0
T176	0	19	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2185	0	0
T1	24182	14	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	8	0	0
T111	0	43	0	0
T122	0	25	0	0
T133	0	1	0	0
T172	0	24	0	0
T173	0	32	0	0
T174	0	28	0	0
T175	0	165	0	0
T177	0	13	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2206	0	0
T1	24182	18	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	15	0	0
T111	0	53	0	0
T122	0	42	0	0
T133	0	7	0	0
T172	0	16	0	0
T173	0	12	0	0
T174	0	18	0	0
T175	0	110	0	0
T177	0	11	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2275	0	0
T1	24182	20	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	32	0	0
T111	0	55	0	0
T122	0	13	0	0
T133	0	7	0	0
T172	0	15	0	0
T173	0	12	0	0
T174	0	20	0	0
T175	0	106	0	0
T176	0	19	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2436	0	0
T1	24182	35	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	20	0	0
T111	0	69	0	0
T122	0	40	0	0
T133	0	7	0	0
T172	0	32	0	0
T173	0	15	0	0
T174	0	17	0	0
T175	0	121	0	0
T177	0	8	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2236	0	0
T1	24182	27	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	7	0	0
T111	0	39	0	0
T122	0	30	0	0
T133	0	7	0	0
T172	0	18	0	0
T173	0	21	0	0
T174	0	35	0	0
T175	0	121	0	0
T177	0	5	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2266	0	0
T1	24182	20	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	4	0	0
T111	0	56	0	0
T122	0	37	0	0
T133	0	4	0	0
T172	0	23	0	0
T173	0	6	0	0
T174	0	44	0	0
T175	0	116	0	0
T176	0	19	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25573066	2162	0	0
T1	24182	25	0	0
T2	113275	0	0	0
T3	4583	0	0	0
T13	77194	0	0	0
T14	14859	0	0	0
T15	3641	0	0	0
T16	38410	0	0	0
T17	8371	0	0	0
T18	18810	0	0	0
T19	13373	0	0	0
T45	0	8	0	0
T111	0	47	0	0
T122	0	36	0	0
T133	0	2	0	0
T172	0	11	0	0
T173	0	17	0	0
T174	0	10	0	0
T175	0	125	0	0
T176	0	17	0	0