Assert Coverage for Module :
keymgr_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
13924 |
0 |
0 |
T7 |
203058 |
0 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T45 |
2883 |
0 |
0 |
0 |
T46 |
33904 |
362 |
0 |
0 |
T60 |
0 |
110 |
0 |
0 |
T72 |
0 |
981 |
0 |
0 |
T103 |
18025 |
373 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T124 |
0 |
83 |
0 |
0 |
T125 |
0 |
397 |
0 |
0 |
T126 |
0 |
26 |
0 |
0 |
T127 |
0 |
211 |
0 |
0 |
T128 |
0 |
36 |
0 |
0 |
T129 |
14954 |
0 |
0 |
0 |
T130 |
20232 |
0 |
0 |
0 |
T131 |
2970 |
0 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
31 |
0 |
0 |
attest_sw_binding_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1627 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
13 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
192 |
0 |
0 |
T124 |
0 |
75 |
0 |
0 |
T126 |
0 |
27 |
0 |
0 |
T127 |
0 |
56 |
0 |
0 |
T128 |
0 |
30 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
23 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
4 |
0 |
0 |
T166 |
0 |
4 |
0 |
0 |
T167 |
0 |
79 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
attest_sw_binding_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1672 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
10 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
180 |
0 |
0 |
T124 |
0 |
77 |
0 |
0 |
T126 |
0 |
24 |
0 |
0 |
T127 |
0 |
74 |
0 |
0 |
T128 |
0 |
29 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
1 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
3 |
0 |
0 |
T167 |
0 |
75 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
7 |
0 |
0 |
attest_sw_binding_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1635 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
18 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
193 |
0 |
0 |
T124 |
0 |
65 |
0 |
0 |
T126 |
0 |
19 |
0 |
0 |
T127 |
0 |
61 |
0 |
0 |
T128 |
0 |
8 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
9 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
11 |
0 |
0 |
T167 |
0 |
94 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
11 |
0 |
0 |
attest_sw_binding_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1668 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
15 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
238 |
0 |
0 |
T124 |
0 |
45 |
0 |
0 |
T126 |
0 |
30 |
0 |
0 |
T127 |
0 |
66 |
0 |
0 |
T128 |
0 |
33 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
16 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
7 |
0 |
0 |
T166 |
0 |
1 |
0 |
0 |
T167 |
0 |
111 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
attest_sw_binding_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1683 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
15 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
186 |
0 |
0 |
T124 |
0 |
44 |
0 |
0 |
T126 |
0 |
21 |
0 |
0 |
T127 |
0 |
67 |
0 |
0 |
T128 |
0 |
39 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
16 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
4 |
0 |
0 |
T167 |
0 |
114 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
11 |
0 |
0 |
attest_sw_binding_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1621 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
12 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
191 |
0 |
0 |
T124 |
0 |
37 |
0 |
0 |
T126 |
0 |
20 |
0 |
0 |
T127 |
0 |
49 |
0 |
0 |
T128 |
0 |
39 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
3 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
3 |
0 |
0 |
T167 |
0 |
87 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
3 |
0 |
0 |
attest_sw_binding_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1687 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
11 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
226 |
0 |
0 |
T124 |
0 |
39 |
0 |
0 |
T126 |
0 |
22 |
0 |
0 |
T127 |
0 |
75 |
0 |
0 |
T128 |
0 |
25 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
10 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T167 |
0 |
88 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
6 |
0 |
0 |
T170 |
0 |
7 |
0 |
0 |
attest_sw_binding_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1601 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
16 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
175 |
0 |
0 |
T124 |
0 |
43 |
0 |
0 |
T126 |
0 |
21 |
0 |
0 |
T127 |
0 |
34 |
0 |
0 |
T128 |
0 |
10 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
13 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
6 |
0 |
0 |
T166 |
0 |
7 |
0 |
0 |
T167 |
0 |
95 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
2427 |
0 |
0 |
T6 |
171007 |
13 |
0 |
0 |
T7 |
203058 |
0 |
0 |
0 |
T23 |
34526 |
0 |
0 |
0 |
T30 |
10647 |
0 |
0 |
0 |
T46 |
0 |
40 |
0 |
0 |
T103 |
18025 |
0 |
0 |
0 |
T124 |
0 |
71 |
0 |
0 |
T126 |
0 |
32 |
0 |
0 |
T127 |
0 |
116 |
0 |
0 |
T128 |
0 |
55 |
0 |
0 |
T129 |
14954 |
0 |
0 |
0 |
T130 |
20232 |
0 |
0 |
0 |
T131 |
2970 |
0 |
0 |
0 |
T171 |
0 |
11 |
0 |
0 |
T172 |
0 |
25 |
0 |
0 |
T173 |
0 |
23 |
0 |
0 |
T174 |
0 |
31 |
0 |
0 |
T175 |
168884 |
0 |
0 |
0 |
T176 |
8408 |
0 |
0 |
0 |
key_version_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1699 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
23 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
183 |
0 |
0 |
T124 |
0 |
67 |
0 |
0 |
T126 |
0 |
29 |
0 |
0 |
T127 |
0 |
64 |
0 |
0 |
T128 |
0 |
30 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
10 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T167 |
0 |
55 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
11 |
0 |
0 |
T177 |
0 |
95 |
0 |
0 |
max_creator_key_ver_regwen_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1724 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
15 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
205 |
0 |
0 |
T124 |
0 |
85 |
0 |
0 |
T126 |
0 |
26 |
0 |
0 |
T127 |
0 |
62 |
0 |
0 |
T128 |
0 |
35 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
14 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
11 |
0 |
0 |
T167 |
0 |
68 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
6 |
0 |
0 |
max_owner_int_key_ver_regwen_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1673 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
17 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
204 |
0 |
0 |
T124 |
0 |
49 |
0 |
0 |
T126 |
0 |
31 |
0 |
0 |
T127 |
0 |
52 |
0 |
0 |
T128 |
0 |
22 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
5 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
9 |
0 |
0 |
T166 |
0 |
8 |
0 |
0 |
T167 |
0 |
68 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
max_owner_key_ver_regwen_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1699 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
38 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
186 |
0 |
0 |
T124 |
0 |
61 |
0 |
0 |
T126 |
0 |
15 |
0 |
0 |
T127 |
0 |
37 |
0 |
0 |
T128 |
0 |
24 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
19 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
7 |
0 |
0 |
T167 |
0 |
96 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
5 |
0 |
0 |
reseed_interval_regwen_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1747 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
11 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
213 |
0 |
0 |
T124 |
0 |
70 |
0 |
0 |
T126 |
0 |
24 |
0 |
0 |
T127 |
0 |
53 |
0 |
0 |
T128 |
0 |
18 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
5 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
3 |
0 |
0 |
T167 |
0 |
89 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
5 |
0 |
0 |
salt_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1522 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
19 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
217 |
0 |
0 |
T124 |
0 |
52 |
0 |
0 |
T126 |
0 |
18 |
0 |
0 |
T127 |
0 |
52 |
0 |
0 |
T128 |
0 |
21 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
13 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
4 |
0 |
0 |
T166 |
0 |
8 |
0 |
0 |
T167 |
0 |
50 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
salt_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1546 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
15 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
210 |
0 |
0 |
T124 |
0 |
56 |
0 |
0 |
T126 |
0 |
15 |
0 |
0 |
T127 |
0 |
71 |
0 |
0 |
T128 |
0 |
31 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
1 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
8 |
0 |
0 |
T166 |
0 |
12 |
0 |
0 |
T167 |
0 |
79 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
salt_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1527 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
20 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
198 |
0 |
0 |
T124 |
0 |
83 |
0 |
0 |
T126 |
0 |
20 |
0 |
0 |
T127 |
0 |
52 |
0 |
0 |
T128 |
0 |
35 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
3 |
0 |
0 |
T166 |
0 |
15 |
0 |
0 |
T167 |
0 |
90 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
8 |
0 |
0 |
salt_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1499 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
11 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
198 |
0 |
0 |
T124 |
0 |
61 |
0 |
0 |
T126 |
0 |
25 |
0 |
0 |
T127 |
0 |
38 |
0 |
0 |
T128 |
0 |
20 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
11 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
5 |
0 |
0 |
T166 |
0 |
11 |
0 |
0 |
T167 |
0 |
59 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
salt_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1607 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
11 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
212 |
0 |
0 |
T124 |
0 |
49 |
0 |
0 |
T126 |
0 |
16 |
0 |
0 |
T127 |
0 |
53 |
0 |
0 |
T128 |
0 |
23 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
12 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T166 |
0 |
1 |
0 |
0 |
T167 |
0 |
58 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
12 |
0 |
0 |
salt_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1584 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
26 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
180 |
0 |
0 |
T124 |
0 |
64 |
0 |
0 |
T126 |
0 |
27 |
0 |
0 |
T127 |
0 |
59 |
0 |
0 |
T128 |
0 |
36 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
15 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
7 |
0 |
0 |
T166 |
0 |
10 |
0 |
0 |
T167 |
0 |
55 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
salt_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1658 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
33 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
191 |
0 |
0 |
T124 |
0 |
65 |
0 |
0 |
T126 |
0 |
27 |
0 |
0 |
T127 |
0 |
90 |
0 |
0 |
T128 |
0 |
16 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
19 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T166 |
0 |
1 |
0 |
0 |
T167 |
0 |
74 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
8 |
0 |
0 |
salt_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1689 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
15 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
196 |
0 |
0 |
T124 |
0 |
47 |
0 |
0 |
T126 |
0 |
19 |
0 |
0 |
T127 |
0 |
42 |
0 |
0 |
T128 |
0 |
43 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
12 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
7 |
0 |
0 |
T166 |
0 |
4 |
0 |
0 |
T167 |
0 |
93 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
sealing_sw_binding_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1645 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
22 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
229 |
0 |
0 |
T124 |
0 |
63 |
0 |
0 |
T126 |
0 |
32 |
0 |
0 |
T127 |
0 |
58 |
0 |
0 |
T128 |
0 |
17 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
12 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T166 |
0 |
17 |
0 |
0 |
T167 |
0 |
77 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
14 |
0 |
0 |
sealing_sw_binding_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1614 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
16 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
229 |
0 |
0 |
T124 |
0 |
53 |
0 |
0 |
T126 |
0 |
32 |
0 |
0 |
T127 |
0 |
72 |
0 |
0 |
T128 |
0 |
28 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
19 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
5 |
0 |
0 |
T166 |
0 |
4 |
0 |
0 |
T167 |
0 |
75 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
sealing_sw_binding_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1734 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
17 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
174 |
0 |
0 |
T124 |
0 |
82 |
0 |
0 |
T126 |
0 |
25 |
0 |
0 |
T127 |
0 |
86 |
0 |
0 |
T128 |
0 |
23 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
5 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
8 |
0 |
0 |
T167 |
0 |
92 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
5 |
0 |
0 |
sealing_sw_binding_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1697 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
16 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
200 |
0 |
0 |
T124 |
0 |
68 |
0 |
0 |
T126 |
0 |
22 |
0 |
0 |
T127 |
0 |
48 |
0 |
0 |
T128 |
0 |
28 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
14 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
4 |
0 |
0 |
T166 |
0 |
3 |
0 |
0 |
T167 |
0 |
71 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
sealing_sw_binding_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1632 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
16 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
192 |
0 |
0 |
T124 |
0 |
67 |
0 |
0 |
T126 |
0 |
14 |
0 |
0 |
T127 |
0 |
53 |
0 |
0 |
T128 |
0 |
40 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
5 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
6 |
0 |
0 |
T166 |
0 |
7 |
0 |
0 |
T167 |
0 |
95 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
sealing_sw_binding_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1640 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
39 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
209 |
0 |
0 |
T124 |
0 |
54 |
0 |
0 |
T126 |
0 |
25 |
0 |
0 |
T127 |
0 |
54 |
0 |
0 |
T128 |
0 |
29 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
8 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
9 |
0 |
0 |
T166 |
0 |
13 |
0 |
0 |
T167 |
0 |
92 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
sealing_sw_binding_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1710 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
22 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
200 |
0 |
0 |
T124 |
0 |
77 |
0 |
0 |
T126 |
0 |
18 |
0 |
0 |
T127 |
0 |
63 |
0 |
0 |
T128 |
0 |
18 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
25 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T166 |
0 |
23 |
0 |
0 |
T167 |
0 |
71 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
8 |
0 |
0 |
sealing_sw_binding_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1533 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
23 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
156 |
0 |
0 |
T124 |
0 |
51 |
0 |
0 |
T126 |
0 |
27 |
0 |
0 |
T127 |
0 |
70 |
0 |
0 |
T128 |
0 |
25 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
13 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T166 |
0 |
12 |
0 |
0 |
T167 |
0 |
67 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |
T169 |
0 |
5 |
0 |
0 |
sideload_clear_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
28457410 |
1684 |
0 |
0 |
T8 |
28486 |
0 |
0 |
0 |
T24 |
204019 |
0 |
0 |
0 |
T29 |
24892 |
0 |
0 |
0 |
T46 |
33904 |
17 |
0 |
0 |
T68 |
5570 |
0 |
0 |
0 |
T101 |
900 |
0 |
0 |
0 |
T112 |
3068 |
0 |
0 |
0 |
T115 |
0 |
194 |
0 |
0 |
T124 |
0 |
52 |
0 |
0 |
T126 |
0 |
25 |
0 |
0 |
T127 |
0 |
64 |
0 |
0 |
T128 |
0 |
21 |
0 |
0 |
T132 |
21324 |
0 |
0 |
0 |
T134 |
0 |
20 |
0 |
0 |
T136 |
6721 |
0 |
0 |
0 |
T164 |
0 |
6 |
0 |
0 |
T166 |
0 |
3 |
0 |
0 |
T167 |
0 |
77 |
0 |
0 |
T168 |
5504 |
0 |
0 |
0 |