Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	23533741	15435	0	0
attest_sw_binding_0_rd_A	23533741	2421	0	0
attest_sw_binding_1_rd_A	23533741	2744	0	0
attest_sw_binding_2_rd_A	23533741	2447	0	0
attest_sw_binding_3_rd_A	23533741	2528	0	0
attest_sw_binding_4_rd_A	23533741	2617	0	0
attest_sw_binding_5_rd_A	23533741	2543	0	0
attest_sw_binding_6_rd_A	23533741	2653	0	0
attest_sw_binding_7_rd_A	23533741	2556	0	0
intr_enable_rd_A	23533741	3114	0	0
key_version_rd_A	23533741	2526	0	0
max_creator_key_ver_regwen_rd_A	23533741	2484	0	0
max_owner_int_key_ver_regwen_rd_A	23533741	2580	0	0
max_owner_key_ver_regwen_rd_A	23533741	2468	0	0
reseed_interval_regwen_rd_A	23533741	2813	0	0
salt_0_rd_A	23533741	2649	0	0
salt_1_rd_A	23533741	2633	0	0
salt_2_rd_A	23533741	2619	0	0
salt_3_rd_A	23533741	2558	0	0
salt_4_rd_A	23533741	2494	0	0
salt_5_rd_A	23533741	2637	0	0
salt_6_rd_A	23533741	2630	0	0
salt_7_rd_A	23533741	2468	0	0
sealing_sw_binding_0_rd_A	23533741	2434	0	0
sealing_sw_binding_1_rd_A	23533741	2614	0	0
sealing_sw_binding_2_rd_A	23533741	2644	0	0
sealing_sw_binding_3_rd_A	23533741	2506	0	0
sealing_sw_binding_4_rd_A	23533741	2587	0	0
sealing_sw_binding_5_rd_A	23533741	2578	0	0
sealing_sw_binding_6_rd_A	23533741	2419	0	0
sealing_sw_binding_7_rd_A	23533741	2506	0	0
sideload_clear_rd_A	23533741	2763	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	15435	0	0
T4	82446	540	0	0
T5	27675	0	0	0
T9	76445	0	0	0
T12	60527	0	0	0
T13	10094	0	0	0
T14	7411	0	0	0
T15	12191	0	0	0
T30	5656	0	0	0
T31	18780	0	0	0
T41	8560	0	0	0
T58	0	404	0	0
T59	0	218	0	0
T73	0	763	0	0
T77	0	936	0	0
T113	0	1279	0	0
T114	0	39	0	0
T115	0	362	0	0
T116	0	51	0	0
T117	0	107	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2421	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	35	0	0
T65	0	8	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	21	0	0
T110	0	66	0	0
T114	0	27	0	0
T116	0	23	0	0
T127	0	1	0	0
T141	0	71	0	0
T145	0	11	0	0
T162	0	35	0	0
T163	14605	0	0	0
T164	7248	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2744	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	58	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	34	0	0
T110	0	54	0	0
T114	0	30	0	0
T116	0	21	0	0
T127	0	5	0	0
T141	0	87	0	0
T145	0	9	0	0
T162	0	15	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	32	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2447	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	47	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	6	0	0
T110	0	64	0	0
T114	0	31	0	0
T116	0	28	0	0
T127	0	8	0	0
T141	0	84	0	0
T145	0	7	0	0
T162	0	27	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	20	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2528	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	49	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	12	0	0
T110	0	54	0	0
T114	0	28	0	0
T116	0	23	0	0
T127	0	9	0	0
T141	0	78	0	0
T145	0	12	0	0
T162	0	23	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	29	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2617	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	41	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	28	0	0
T110	0	49	0	0
T114	0	9	0	0
T116	0	13	0	0
T127	0	8	0	0
T141	0	79	0	0
T145	0	24	0	0
T162	0	19	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	18	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2543	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	62	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	18	0	0
T110	0	73	0	0
T114	0	28	0	0
T116	0	17	0	0
T141	0	84	0	0
T145	0	20	0	0
T162	0	36	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	24	0	0
T166	0	38	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2653	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	80	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	12	0	0
T110	0	54	0	0
T114	0	16	0	0
T116	0	16	0	0
T127	0	3	0	0
T141	0	103	0	0
T145	0	21	0	0
T162	0	25	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	16	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2556	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	51	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	18	0	0
T110	0	35	0	0
T114	0	21	0	0
T116	0	24	0	0
T127	0	8	0	0
T141	0	73	0	0
T145	0	14	0	0
T162	0	24	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	10	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	3114	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T44	0	40	0	0
T59	54094	77	0	0
T75	0	21	0	0
T78	0	14	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T114	0	66	0	0
T116	0	40	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T167	0	43	0	0
T168	0	28	0	0
T169	0	11	0	0
T170	0	32	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2526	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	70	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	19	0	0
T110	0	32	0	0
T114	0	40	0	0
T116	0	30	0	0
T127	0	7	0	0
T141	0	62	0	0
T145	0	18	0	0
T162	0	24	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	27	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2484	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	55	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	16	0	0
T110	0	46	0	0
T114	0	29	0	0
T116	0	22	0	0
T127	0	9	0	0
T141	0	58	0	0
T145	0	11	0	0
T162	0	17	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	16	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2580	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	56	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	14	0	0
T110	0	67	0	0
T114	0	23	0	0
T116	0	14	0	0
T127	0	2	0	0
T141	0	80	0	0
T145	0	18	0	0
T162	0	64	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	11	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2468	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	53	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	18	0	0
T110	0	60	0	0
T114	0	20	0	0
T116	0	25	0	0
T127	0	2	0	0
T141	0	88	0	0
T145	0	14	0	0
T162	0	34	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	12	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2813	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	69	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	28	0	0
T110	0	53	0	0
T114	0	21	0	0
T116	0	33	0	0
T127	0	7	0	0
T141	0	68	0	0
T145	0	28	0	0
T162	0	28	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	30	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2649	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	56	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T114	0	21	0	0
T116	0	18	0	0
T127	0	6	0	0
T141	0	78	0	0
T145	0	12	0	0
T162	0	29	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	7	0	0
T171	0	2	0	0
T172	0	6	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2633	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	64	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	23	0	0
T110	0	75	0	0
T114	0	48	0	0
T116	0	17	0	0
T127	0	6	0	0
T141	0	59	0	0
T145	0	21	0	0
T162	0	29	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	18	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2619	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	53	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	23	0	0
T110	0	73	0	0
T114	0	48	0	0
T116	0	23	0	0
T127	0	3	0	0
T141	0	80	0	0
T145	0	14	0	0
T162	0	14	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T166	0	16	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2558	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	60	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	30	0	0
T110	0	54	0	0
T114	0	25	0	0
T116	0	27	0	0
T127	0	7	0	0
T141	0	91	0	0
T145	0	27	0	0
T162	0	37	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	22	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2494	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	80	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	19	0	0
T110	0	45	0	0
T114	0	36	0	0
T116	0	26	0	0
T127	0	5	0	0
T141	0	59	0	0
T145	0	14	0	0
T162	0	33	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	8	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2637	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	64	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	6	0	0
T110	0	52	0	0
T114	0	33	0	0
T116	0	16	0	0
T127	0	3	0	0
T141	0	92	0	0
T145	0	13	0	0
T162	0	9	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	4	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2630	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	57	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	28	0	0
T110	0	67	0	0
T114	0	17	0	0
T116	0	33	0	0
T127	0	1	0	0
T141	0	84	0	0
T145	0	23	0	0
T162	0	8	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	12	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2468	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	65	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	26	0	0
T110	0	34	0	0
T114	0	28	0	0
T116	0	23	0	0
T127	0	1	0	0
T141	0	93	0	0
T145	0	15	0	0
T162	0	19	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	26	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2434	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	78	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	11	0	0
T110	0	50	0	0
T114	0	18	0	0
T116	0	7	0	0
T127	0	1	0	0
T141	0	94	0	0
T145	0	13	0	0
T162	0	25	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	13	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2614	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	46	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	20	0	0
T110	0	32	0	0
T114	0	30	0	0
T116	0	33	0	0
T127	0	6	0	0
T141	0	75	0	0
T145	0	24	0	0
T162	0	26	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	39	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2644	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	56	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	30	0	0
T110	0	49	0	0
T114	0	24	0	0
T116	0	34	0	0
T127	0	2	0	0
T141	0	90	0	0
T145	0	16	0	0
T162	0	21	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	3	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2506	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	44	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	21	0	0
T110	0	44	0	0
T114	0	38	0	0
T116	0	27	0	0
T127	0	6	0	0
T141	0	80	0	0
T145	0	19	0	0
T162	0	25	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	11	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2587	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	32	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	11	0	0
T110	0	76	0	0
T114	0	20	0	0
T116	0	34	0	0
T127	0	9	0	0
T141	0	80	0	0
T145	0	24	0	0
T162	0	34	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	11	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2578	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	47	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	18	0	0
T110	0	44	0	0
T114	0	33	0	0
T116	0	18	0	0
T127	0	9	0	0
T141	0	85	0	0
T145	0	27	0	0
T162	0	22	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	29	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2419	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	35	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	12	0	0
T110	0	52	0	0
T114	0	37	0	0
T116	0	30	0	0
T127	0	4	0	0
T141	0	79	0	0
T145	0	12	0	0
T162	0	12	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	15	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2506	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	33	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	18	0	0
T110	0	53	0	0
T114	0	27	0	0
T116	0	20	0	0
T127	0	1	0	0
T141	0	69	0	0
T145	0	26	0	0
T162	0	29	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	13	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23533741	2763	0	0
T7	105165	0	0	0
T21	78997	0	0	0
T43	14869	0	0	0
T59	54094	89	0	0
T82	22665	0	0	0
T83	8806	0	0	0
T84	13212	0	0	0
T85	17631	0	0	0
T107	0	22	0	0
T110	0	57	0	0
T114	0	49	0	0
T116	0	11	0	0
T127	0	2	0	0
T141	0	89	0	0
T145	0	16	0	0
T162	0	27	0	0
T163	14605	0	0	0
T164	7248	0	0	0
T165	0	23	0	0