Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	22371992	14790	0	0
attest_sw_binding_0_rd_A	22371992	2442	0	0
attest_sw_binding_1_rd_A	22371992	2489	0	0
attest_sw_binding_2_rd_A	22371992	2425	0	0
attest_sw_binding_3_rd_A	22371992	2465	0	0
attest_sw_binding_4_rd_A	22371992	2596	0	0
attest_sw_binding_5_rd_A	22371992	2485	0	0
attest_sw_binding_6_rd_A	22371992	2545	0	0
attest_sw_binding_7_rd_A	22371992	2553	0	0
intr_enable_rd_A	22371992	2815	0	0
key_version_rd_A	22371992	2441	0	0
max_creator_key_ver_regwen_rd_A	22371992	2448	0	0
max_owner_int_key_ver_regwen_rd_A	22371992	2573	0	0
max_owner_key_ver_regwen_rd_A	22371992	2351	0	0
reseed_interval_regwen_rd_A	22371992	2419	0	0
salt_0_rd_A	22371992	2442	0	0
salt_1_rd_A	22371992	2475	0	0
salt_2_rd_A	22371992	2445	0	0
salt_3_rd_A	22371992	2470	0	0
salt_4_rd_A	22371992	2463	0	0
salt_5_rd_A	22371992	2414	0	0
salt_6_rd_A	22371992	2577	0	0
salt_7_rd_A	22371992	2346	0	0
sealing_sw_binding_0_rd_A	22371992	2460	0	0
sealing_sw_binding_1_rd_A	22371992	2444	0	0
sealing_sw_binding_2_rd_A	22371992	2446	0	0
sealing_sw_binding_3_rd_A	22371992	2405	0	0
sealing_sw_binding_4_rd_A	22371992	2363	0	0
sealing_sw_binding_5_rd_A	22371992	2416	0	0
sealing_sw_binding_6_rd_A	22371992	2475	0	0
sealing_sw_binding_7_rd_A	22371992	2480	0	0
sideload_clear_rd_A	22371992	2516	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	14790	0	0
T12	36649	32	0	0
T13	4746	0	0	0
T14	6273	0	0	0
T15	6937	0	0	0
T16	7021	0	0	0
T25	8043	0	0	0
T36	75730	0	0	0
T37	17086	0	0	0
T91	14215	0	0	0
T109	0	29	0	0
T118	0	675	0	0
T122	0	281	0	0
T127	0	77	0	0
T128	0	490	0	0
T129	0	18	0	0
T130	0	19	0	0
T132	0	1369	0	0
T133	8443	0	0	0
T134	0	891	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2442	0	0
T94	3124	0	0	0
T124	0	74	0	0
T130	26195	29	0	0
T145	0	14	0	0
T149	0	3	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	53	0	0
T186	0	11	0	0
T187	0	471	0	0
T188	0	4	0	0
T189	0	23	0	0
T190	0	12	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2489	0	0
T94	3124	0	0	0
T124	0	76	0	0
T130	26195	23	0	0
T145	0	11	0	0
T149	0	1	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	30	0	0
T187	0	493	0	0
T188	0	1	0	0
T189	0	50	0	0
T190	0	5	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	4	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2425	0	0
T94	3124	0	0	0
T124	0	73	0	0
T130	26195	36	0	0
T145	0	19	0	0
T149	0	1	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	74	0	0
T187	0	426	0	0
T188	0	1	0	0
T189	0	47	0	0
T190	0	13	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T198	0	4	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2465	0	0
T94	3124	0	0	0
T124	0	57	0	0
T130	26195	20	0	0
T145	0	10	0	0
T149	0	2	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	52	0	0
T186	0	4	0	0
T187	0	474	0	0
T189	0	28	0	0
T190	0	2	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T198	0	7	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2596	0	0
T94	3124	0	0	0
T124	0	61	0	0
T130	26195	34	0	0
T145	0	34	0	0
T149	0	9	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	51	0	0
T186	0	21	0	0
T187	0	485	0	0
T188	0	1	0	0
T189	0	47	0	0
T190	0	2	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2485	0	0
T94	3124	0	0	0
T124	0	73	0	0
T130	26195	28	0	0
T145	0	12	0	0
T149	0	5	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	42	0	0
T186	0	14	0	0
T187	0	415	0	0
T188	0	1	0	0
T189	0	30	0	0
T190	0	18	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2545	0	0
T94	3124	0	0	0
T124	0	49	0	0
T130	26195	27	0	0
T145	0	14	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	73	0	0
T187	0	426	0	0
T189	0	32	0	0
T190	0	3	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	7	0	0
T198	0	4	0	0
T199	0	95	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2553	0	0
T94	3124	0	0	0
T124	0	79	0	0
T130	26195	36	0	0
T145	0	32	0	0
T149	0	3	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	84	0	0
T187	0	461	0	0
T189	0	44	0	0
T190	0	7	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	7	0	0
T200	0	2	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2815	0	0
T34	7258	0	0	0
T51	0	25	0	0
T64	5907	0	0	0
T69	0	7	0	0
T70	0	43	0	0
T130	0	56	0	0
T185	0	62	0	0
T201	45771	13	0	0
T202	0	4	0	0
T203	0	1	0	0
T204	0	19	0	0
T205	0	80	0	0
T206	2838	0	0	0
T207	3072	0	0	0
T208	18232	0	0	0
T209	868	0	0	0
T210	10696	0	0	0
T211	12045	0	0	0
T212	7029	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2441	0	0
T94	3124	0	0	0
T124	0	62	0	0
T130	26195	53	0	0
T145	0	3	0	0
T149	0	2	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	45	0	0
T186	0	5	0	0
T187	0	456	0	0
T188	0	14	0	0
T189	0	33	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	8	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2448	0	0
T94	3124	0	0	0
T124	0	85	0	0
T130	26195	23	0	0
T145	0	7	0	0
T149	0	2	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	36	0	0
T187	0	454	0	0
T188	0	6	0	0
T189	0	40	0	0
T190	0	12	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	1	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2573	0	0
T94	3124	0	0	0
T124	0	70	0	0
T130	26195	16	0	0
T145	0	7	0	0
T149	0	5	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	55	0	0
T187	0	499	0	0
T189	0	39	0	0
T190	0	2	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	4	0	0
T200	0	3	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2351	0	0
T94	3124	0	0	0
T124	0	81	0	0
T130	26195	13	0	0
T145	0	7	0	0
T149	0	7	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	54	0	0
T187	0	408	0	0
T189	0	25	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	5	0	0
T199	0	83	0	0
T200	0	3	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2419	0	0
T34	7258	0	0	0
T64	5907	0	0	0
T124	0	82	0	0
T130	0	33	0	0
T145	0	1	0	0
T185	0	59	0	0
T186	0	8	0	0
T187	0	439	0	0
T189	0	45	0	0
T190	0	6	0	0
T197	0	5	0	0
T206	2838	2	0	0
T207	3072	0	0	0
T208	18232	0	0	0
T209	868	0	0	0
T210	10696	0	0	0
T211	12045	0	0	0
T212	7029	0	0	0
T213	8853	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2442	0	0
T94	3124	0	0	0
T124	0	50	0	0
T130	26195	28	0	0
T145	0	10	0	0
T149	0	15	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	50	0	0
T187	0	526	0	0
T188	0	1	0	0
T189	0	28	0	0
T190	0	6	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T198	0	6	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2475	0	0
T94	3124	0	0	0
T124	0	51	0	0
T130	26195	30	0	0
T149	0	1	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	29	0	0
T186	0	7	0	0
T187	0	450	0	0
T188	0	6	0	0
T189	0	43	0	0
T190	0	4	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T200	0	3	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2445	0	0
T94	3124	0	0	0
T124	0	72	0	0
T130	26195	29	0	0
T145	0	13	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	60	0	0
T187	0	460	0	0
T189	0	34	0	0
T190	0	8	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T199	0	82	0	0
T200	0	3	0	0
T214	0	4	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2470	0	0
T94	3124	0	0	0
T124	0	49	0	0
T130	26195	11	0	0
T149	0	2	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	45	0	0
T186	0	16	0	0
T187	0	431	0	0
T188	0	6	0	0
T189	0	45	0	0
T190	0	12	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	1	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2463	0	0
T94	3124	0	0	0
T124	0	58	0	0
T130	26195	12	0	0
T145	0	39	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	39	0	0
T187	0	403	0	0
T188	0	1	0	0
T189	0	39	0	0
T190	0	11	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	7	0	0
T198	0	4	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2414	0	0
T94	3124	0	0	0
T124	0	65	0	0
T130	26195	36	0	0
T145	0	13	0	0
T149	0	8	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	57	0	0
T186	0	10	0	0
T187	0	459	0	0
T188	0	2	0	0
T189	0	49	0	0
T190	0	3	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2577	0	0
T94	3124	0	0	0
T124	0	66	0	0
T130	26195	19	0	0
T149	0	4	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	60	0	0
T186	0	6	0	0
T187	0	481	0	0
T188	0	7	0	0
T189	0	31	0	0
T190	0	2	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	1	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2346	0	0
T94	3124	0	0	0
T124	0	65	0	0
T130	26195	33	0	0
T145	0	9	0	0
T149	0	11	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	51	0	0
T187	0	422	0	0
T189	0	51	0	0
T190	0	6	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T198	0	5	0	0
T200	0	1	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2460	0	0
T94	3124	0	0	0
T124	0	60	0	0
T130	26195	22	0	0
T145	0	4	0	0
T149	0	5	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	56	0	0
T187	0	416	0	0
T188	0	12	0	0
T189	0	37	0	0
T190	0	3	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T200	0	6	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2444	0	0
T94	3124	0	0	0
T124	0	59	0	0
T130	26195	10	0	0
T145	0	21	0	0
T149	0	4	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	51	0	0
T186	0	9	0	0
T187	0	427	0	0
T188	0	11	0	0
T189	0	38	0	0
T190	0	8	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2446	0	0
T94	3124	0	0	0
T124	0	55	0	0
T130	26195	24	0	0
T145	0	10	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	32	0	0
T187	0	465	0	0
T188	0	1	0	0
T189	0	39	0	0
T190	0	10	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	2	0	0
T200	0	4	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2405	0	0
T94	3124	0	0	0
T124	0	74	0	0
T130	26195	20	0	0
T145	0	6	0	0
T149	0	2	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	49	0	0
T186	0	6	0	0
T187	0	476	0	0
T188	0	9	0	0
T189	0	32	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	9	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2363	0	0
T94	3124	0	0	0
T124	0	69	0	0
T130	26195	31	0	0
T145	0	22	0	0
T149	0	1	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	55	0	0
T186	0	2	0	0
T187	0	381	0	0
T188	0	1	0	0
T189	0	51	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	4	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2416	0	0
T94	3124	0	0	0
T124	0	76	0	0
T130	26195	23	0	0
T145	0	3	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	54	0	0
T186	0	20	0	0
T187	0	480	0	0
T189	0	35	0	0
T190	0	16	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	5	0	0
T200	0	1	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2475	0	0
T94	3124	0	0	0
T124	0	95	0	0
T130	26195	20	0	0
T145	0	25	0	0
T149	0	3	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	36	0	0
T187	0	430	0	0
T188	0	8	0	0
T189	0	58	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T199	0	118	0	0
T200	0	1	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2480	0	0
T94	3124	0	0	0
T124	0	73	0	0
T130	26195	33	0	0
T145	0	8	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	30	0	0
T187	0	479	0	0
T189	0	40	0	0
T190	0	3	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T199	0	124	0	0
T200	0	6	0	0
T214	0	8	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22371992	2516	0	0
T94	3124	0	0	0
T124	0	64	0	0
T130	26195	23	0	0
T149	0	3	0	0
T174	3386	0	0	0
T180	7855	0	0	0
T185	0	37	0	0
T187	0	455	0	0
T189	0	40	0	0
T190	0	5	0	0
T191	4612	0	0	0
T192	4731	0	0	0
T193	7289	0	0	0
T194	11410	0	0	0
T195	6357	0	0	0
T196	13963	0	0	0
T197	0	4	0	0
T199	0	130	0	0
T214	0	7	0	0