Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	26336548	16077	0	0
attest_sw_binding_0_rd_A	26336548	2927	0	0
attest_sw_binding_1_rd_A	26336548	2993	0	0
attest_sw_binding_2_rd_A	26336548	2961	0	0
attest_sw_binding_3_rd_A	26336548	3042	0	0
attest_sw_binding_4_rd_A	26336548	2961	0	0
attest_sw_binding_5_rd_A	26336548	2896	0	0
attest_sw_binding_6_rd_A	26336548	3013	0	0
attest_sw_binding_7_rd_A	26336548	2948	0	0
intr_enable_rd_A	26336548	3821	0	0
key_version_rd_A	26336548	3063	0	0
max_creator_key_ver_regwen_rd_A	26336548	2868	0	0
max_owner_int_key_ver_regwen_rd_A	26336548	2974	0	0
max_owner_key_ver_regwen_rd_A	26336548	2821	0	0
reseed_interval_regwen_rd_A	26336548	2904	0	0
salt_0_rd_A	26336548	2891	0	0
salt_1_rd_A	26336548	2793	0	0
salt_2_rd_A	26336548	2790	0	0
salt_3_rd_A	26336548	3014	0	0
salt_4_rd_A	26336548	3049	0	0
salt_5_rd_A	26336548	2956	0	0
salt_6_rd_A	26336548	2995	0	0
salt_7_rd_A	26336548	2886	0	0
sealing_sw_binding_0_rd_A	26336548	2862	0	0
sealing_sw_binding_1_rd_A	26336548	2901	0	0
sealing_sw_binding_2_rd_A	26336548	2909	0	0
sealing_sw_binding_3_rd_A	26336548	3124	0	0
sealing_sw_binding_4_rd_A	26336548	2885	0	0
sealing_sw_binding_5_rd_A	26336548	3054	0	0
sealing_sw_binding_6_rd_A	26336548	2825	0	0
sealing_sw_binding_7_rd_A	26336548	2935	0	0
sideload_clear_rd_A	26336548	2815	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	16077	0	0
T9	0	180	0	0
T20	12518	0	0	0
T56	3784	0	0	0
T59	18924	0	0	0
T62	0	36	0	0
T77	16646	335	0	0
T110	8070	0	0	0
T111	5139	0	0	0
T112	2046	0	0	0
T113	0	27	0	0
T119	15657	0	0	0
T128	0	58	0	0
T130	0	509	0	0
T131	0	29	0	0
T132	0	26	0	0
T133	0	46	0	0
T134	16634	0	0	0
T135	5802	0	0	0
T136	0	159	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2927	0	0
T9	0	53	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	13	0	0
T128	0	69	0	0
T131	0	18	0	0
T132	0	13	0	0
T139	2854	0	0	0
T187	0	34	0	0
T188	0	74	0	0
T189	0	22	0	0
T190	0	25	0	0
T191	0	21	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2993	0	0
T9	0	58	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	21	0	0
T128	0	47	0	0
T131	0	14	0	0
T132	0	3	0	0
T139	2854	0	0	0
T187	0	16	0	0
T188	0	66	0	0
T189	0	43	0	0
T190	0	48	0	0
T191	0	10	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2961	0	0
T9	0	66	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	20	0	0
T128	0	63	0	0
T131	0	18	0	0
T132	0	16	0	0
T139	2854	0	0	0
T187	0	23	0	0
T188	0	55	0	0
T189	0	43	0	0
T190	0	58	0	0
T191	0	19	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3042	0	0
T9	0	55	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	24	0	0
T128	0	84	0	0
T131	0	6	0	0
T132	0	11	0	0
T139	2854	0	0	0
T187	0	40	0	0
T188	0	104	0	0
T189	0	25	0	0
T190	0	54	0	0
T191	0	42	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2961	0	0
T9	0	58	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	8	0	0
T128	0	56	0	0
T131	0	24	0	0
T132	0	13	0	0
T139	2854	0	0	0
T187	0	48	0	0
T188	0	90	0	0
T189	0	12	0	0
T190	0	47	0	0
T191	0	23	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2896	0	0
T9	0	72	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	35	0	0
T128	0	48	0	0
T131	0	15	0	0
T132	0	4	0	0
T139	2854	0	0	0
T187	0	30	0	0
T188	0	96	0	0
T189	0	21	0	0
T190	0	51	0	0
T191	0	20	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3013	0	0
T9	0	59	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	30	0	0
T128	0	41	0	0
T131	0	9	0	0
T132	0	13	0	0
T139	2854	0	0	0
T187	0	30	0	0
T188	0	71	0	0
T189	0	27	0	0
T190	0	79	0	0
T191	0	41	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2948	0	0
T9	0	51	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	15	0	0
T128	0	73	0	0
T131	0	22	0	0
T132	0	17	0	0
T139	2854	0	0	0
T187	0	36	0	0
T188	0	53	0	0
T189	0	19	0	0
T190	0	61	0	0
T191	0	47	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3821	0	0
T7	179278	0	0	0
T9	0	72	0	0
T23	9033	0	0	0
T27	41396	54	0	0
T38	4330	0	0	0
T39	6338	0	0	0
T49	2802	0	0	0
T107	12695	12	0	0
T113	0	13	0	0
T128	0	57	0	0
T131	0	6	0	0
T132	0	6	0	0
T187	0	45	0	0
T197	0	42	0	0
T198	0	34	0	0
T199	94972	0	0	0
T200	87761	0	0	0
T201	26813	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3063	0	0
T9	0	55	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	9	0	0
T128	0	52	0	0
T131	0	6	0	0
T132	0	13	0	0
T139	2854	0	0	0
T187	0	32	0	0
T188	0	55	0	0
T189	0	44	0	0
T190	0	62	0	0
T191	0	34	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2868	0	0
T9	0	62	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	10	0	0
T128	0	76	0	0
T131	0	12	0	0
T132	0	14	0	0
T139	2854	0	0	0
T187	0	32	0	0
T188	0	100	0	0
T189	0	22	0	0
T190	0	50	0	0
T191	0	43	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2974	0	0
T9	0	56	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	15	0	0
T128	0	43	0	0
T131	0	30	0	0
T132	0	21	0	0
T139	2854	0	0	0
T187	0	26	0	0
T188	0	65	0	0
T189	0	14	0	0
T190	0	71	0	0
T191	0	48	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2821	0	0
T9	0	51	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	12	0	0
T128	0	53	0	0
T131	0	22	0	0
T132	0	8	0	0
T139	2854	0	0	0
T187	0	28	0	0
T188	0	50	0	0
T189	0	31	0	0
T190	0	54	0	0
T191	0	11	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2904	0	0
T9	0	50	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	30	0	0
T128	0	55	0	0
T131	0	8	0	0
T132	0	8	0	0
T139	2854	0	0	0
T187	0	31	0	0
T188	0	104	0	0
T189	0	21	0	0
T190	0	70	0	0
T191	0	25	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2891	0	0
T9	0	62	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	6	0	0
T128	0	58	0	0
T131	0	31	0	0
T132	0	30	0	0
T139	2854	0	0	0
T187	0	22	0	0
T188	0	70	0	0
T189	0	36	0	0
T190	0	44	0	0
T191	0	32	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2793	0	0
T9	0	68	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	14	0	0
T128	0	44	0	0
T131	0	7	0	0
T132	0	5	0	0
T139	2854	0	0	0
T187	0	25	0	0
T188	0	50	0	0
T189	0	23	0	0
T190	0	56	0	0
T191	0	12	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2790	0	0
T9	0	54	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	15	0	0
T128	0	73	0	0
T131	0	15	0	0
T132	0	4	0	0
T139	2854	0	0	0
T187	0	23	0	0
T188	0	78	0	0
T189	0	20	0	0
T190	0	39	0	0
T191	0	29	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3014	0	0
T9	0	52	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	2	0	0
T128	0	45	0	0
T131	0	11	0	0
T132	0	17	0	0
T139	2854	0	0	0
T187	0	18	0	0
T188	0	70	0	0
T189	0	32	0	0
T190	0	68	0	0
T191	0	28	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3049	0	0
T9	0	53	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	6	0	0
T128	0	48	0	0
T131	0	15	0	0
T132	0	14	0	0
T139	2854	0	0	0
T187	0	11	0	0
T188	0	71	0	0
T189	0	20	0	0
T190	0	50	0	0
T191	0	32	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2956	0	0
T9	0	81	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	15	0	0
T128	0	64	0	0
T131	0	12	0	0
T132	0	22	0	0
T139	2854	0	0	0
T187	0	18	0	0
T188	0	58	0	0
T189	0	40	0	0
T190	0	53	0	0
T191	0	31	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2995	0	0
T9	0	46	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	3	0	0
T128	0	48	0	0
T131	0	27	0	0
T132	0	10	0	0
T139	2854	0	0	0
T187	0	29	0	0
T188	0	69	0	0
T189	0	28	0	0
T190	0	71	0	0
T191	0	26	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2886	0	0
T9	0	72	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	15	0	0
T128	0	46	0	0
T131	0	18	0	0
T132	0	21	0	0
T139	2854	0	0	0
T187	0	42	0	0
T188	0	40	0	0
T189	0	55	0	0
T190	0	65	0	0
T191	0	28	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2862	0	0
T9	0	30	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	17	0	0
T128	0	49	0	0
T131	0	21	0	0
T132	0	7	0	0
T139	2854	0	0	0
T187	0	47	0	0
T188	0	46	0	0
T189	0	33	0	0
T190	0	50	0	0
T191	0	21	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2901	0	0
T9	0	61	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	9	0	0
T128	0	71	0	0
T131	0	6	0	0
T132	0	22	0	0
T139	2854	0	0	0
T187	0	44	0	0
T188	0	69	0	0
T189	0	15	0	0
T190	0	60	0	0
T191	0	30	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2909	0	0
T9	0	57	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	12	0	0
T128	0	68	0	0
T132	0	20	0	0
T139	2854	0	0	0
T187	0	39	0	0
T188	0	83	0	0
T189	0	28	0	0
T190	0	52	0	0
T191	0	24	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0
T202	0	57	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3124	0	0
T9	0	64	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	7	0	0
T128	0	58	0	0
T131	0	16	0	0
T132	0	19	0	0
T139	2854	0	0	0
T187	0	31	0	0
T188	0	73	0	0
T189	0	46	0	0
T190	0	70	0	0
T191	0	39	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2885	0	0
T9	0	59	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	10	0	0
T128	0	48	0	0
T131	0	6	0	0
T132	0	9	0	0
T139	2854	0	0	0
T187	0	30	0	0
T188	0	59	0	0
T189	0	33	0	0
T190	0	56	0	0
T191	0	24	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	3054	0	0
T9	0	63	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	17	0	0
T128	0	49	0	0
T131	0	8	0	0
T132	0	12	0	0
T139	2854	0	0	0
T187	0	29	0	0
T188	0	69	0	0
T189	0	20	0	0
T190	0	64	0	0
T191	0	49	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2825	0	0
T9	0	50	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	18	0	0
T128	0	44	0	0
T131	0	20	0	0
T132	0	12	0	0
T139	2854	0	0	0
T187	0	19	0	0
T188	0	74	0	0
T189	0	36	0	0
T190	0	48	0	0
T191	0	34	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2935	0	0
T9	0	43	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	7	0	0
T128	0	56	0	0
T131	0	7	0	0
T132	0	20	0	0
T139	2854	0	0	0
T187	0	37	0	0
T188	0	82	0	0
T189	0	33	0	0
T190	0	62	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0
T203	0	8	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26336548	2815	0	0
T9	0	37	0	0
T43	7120	0	0	0
T65	2932	0	0	0
T105	2822	0	0	0
T113	18896	12	0	0
T128	0	34	0	0
T131	0	17	0	0
T132	0	21	0	0
T139	2854	0	0	0
T187	0	29	0	0
T188	0	67	0	0
T189	0	17	0	0
T190	0	42	0	0
T191	0	25	0	0
T192	4045	0	0	0
T193	935	0	0	0
T194	1543	0	0	0
T195	14250	0	0	0
T196	13475	0	0	0