Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	30356232	16793	0	0
attest_sw_binding_0_rd_A	30356232	1784	0	0
attest_sw_binding_1_rd_A	30356232	1800	0	0
attest_sw_binding_2_rd_A	30356232	1729	0	0
attest_sw_binding_3_rd_A	30356232	1829	0	0
attest_sw_binding_4_rd_A	30356232	1870	0	0
attest_sw_binding_5_rd_A	30356232	1652	0	0
attest_sw_binding_6_rd_A	30356232	1812	0	0
attest_sw_binding_7_rd_A	30356232	1833	0	0
intr_enable_rd_A	30356232	2483	0	0
key_version_rd_A	30356232	1966	0	0
max_creator_key_ver_regwen_rd_A	30356232	1854	0	0
max_owner_int_key_ver_regwen_rd_A	30356232	1757	0	0
max_owner_key_ver_regwen_rd_A	30356232	1968	0	0
reseed_interval_regwen_rd_A	30356232	1884	0	0
salt_0_rd_A	30356232	1912	0	0
salt_1_rd_A	30356232	1905	0	0
salt_2_rd_A	30356232	1927	0	0
salt_3_rd_A	30356232	1944	0	0
salt_4_rd_A	30356232	1986	0	0
salt_5_rd_A	30356232	1839	0	0
salt_6_rd_A	30356232	2019	0	0
salt_7_rd_A	30356232	1871	0	0
sealing_sw_binding_0_rd_A	30356232	1922	0	0
sealing_sw_binding_1_rd_A	30356232	1849	0	0
sealing_sw_binding_2_rd_A	30356232	1879	0	0
sealing_sw_binding_3_rd_A	30356232	1792	0	0
sealing_sw_binding_4_rd_A	30356232	1833	0	0
sealing_sw_binding_5_rd_A	30356232	1912	0	0
sealing_sw_binding_6_rd_A	30356232	1949	0	0
sealing_sw_binding_7_rd_A	30356232	1715	0	0
sideload_clear_rd_A	30356232	1954	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	16793	0	0
T66	11934	0	0	0
T68	0	468	0	0
T95	906	0	0	0
T110	15554	574	0	0
T111	0	45	0	0
T112	0	183	0	0
T116	0	297	0	0
T123	0	131	0	0
T124	0	1042	0	0
T125	0	204	0	0
T126	0	554	0	0
T127	0	93	0	0
T128	5490	0	0	0
T129	26766	0	0	0
T130	56893	0	0	0
T131	1560	0	0	0
T132	3343	0	0	0
T133	68733	0	0	0
T134	4837	0	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1784	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	25	0	0
T112	49794	0	0	0
T121	0	55	0	0
T122	0	73	0	0
T127	0	17	0	0
T147	4857	0	0	0
T184	0	28	0	0
T185	0	31	0	0
T186	0	66	0	0
T187	0	24	0	0
T188	0	7	0	0
T189	0	11	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1800	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	43	0	0
T112	49794	0	0	0
T121	0	66	0	0
T122	0	81	0	0
T127	0	32	0	0
T147	4857	0	0	0
T184	0	34	0	0
T185	0	39	0	0
T186	0	55	0	0
T187	0	18	0	0
T188	0	9	0	0
T189	0	13	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1729	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	33	0	0
T112	49794	0	0	0
T121	0	47	0	0
T122	0	74	0	0
T127	0	29	0	0
T147	4857	0	0	0
T184	0	25	0	0
T185	0	63	0	0
T186	0	39	0	0
T187	0	18	0	0
T188	0	14	0	0
T189	0	20	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1829	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	23	0	0
T112	49794	0	0	0
T121	0	52	0	0
T122	0	98	0	0
T127	0	23	0	0
T147	4857	0	0	0
T184	0	27	0	0
T185	0	27	0	0
T186	0	56	0	0
T187	0	51	0	0
T188	0	1	0	0
T189	0	4	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1870	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	50	0	0
T112	49794	0	0	0
T121	0	70	0	0
T122	0	73	0	0
T127	0	32	0	0
T147	4857	0	0	0
T184	0	24	0	0
T185	0	56	0	0
T186	0	71	0	0
T187	0	30	0	0
T188	0	8	0	0
T189	0	10	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1652	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	23	0	0
T112	49794	0	0	0
T121	0	81	0	0
T122	0	72	0	0
T127	0	24	0	0
T147	4857	0	0	0
T184	0	21	0	0
T185	0	36	0	0
T186	0	49	0	0
T187	0	29	0	0
T188	0	11	0	0
T189	0	8	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1812	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	25	0	0
T112	49794	0	0	0
T121	0	74	0	0
T122	0	73	0	0
T127	0	31	0	0
T147	4857	0	0	0
T184	0	17	0	0
T185	0	34	0	0
T186	0	40	0	0
T187	0	22	0	0
T188	0	11	0	0
T189	0	8	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1833	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	33	0	0
T112	49794	0	0	0
T121	0	53	0	0
T122	0	81	0	0
T127	0	31	0	0
T147	4857	0	0	0
T184	0	19	0	0
T185	0	24	0	0
T186	0	60	0	0
T187	0	33	0	0
T189	0	9	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T195	0	13	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	2483	0	0
T26	192433	0	0	0
T58	172706	0	0	0
T61	0	66	0	0
T62	138229	21	0	0
T64	0	32	0	0
T67	203856	0	0	0
T98	4367	0	0	0
T111	0	40	0	0
T127	0	71	0	0
T184	0	40	0	0
T185	0	23	0	0
T196	0	9	0	0
T197	0	17	0	0
T198	0	25	0	0
T199	5207	0	0	0
T200	9340	0	0	0
T201	11617	0	0	0
T202	6555	0	0	0
T203	9467	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1966	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	43	0	0
T112	49794	0	0	0
T121	0	45	0	0
T122	0	101	0	0
T127	0	39	0	0
T147	4857	0	0	0
T184	0	29	0	0
T185	0	31	0	0
T186	0	71	0	0
T187	0	26	0	0
T188	0	1	0	0
T189	0	12	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1854	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	18	0	0
T112	49794	0	0	0
T121	0	43	0	0
T122	0	66	0	0
T127	0	41	0	0
T147	4857	0	0	0
T184	0	26	0	0
T185	0	22	0	0
T186	0	61	0	0
T187	0	51	0	0
T188	0	7	0	0
T189	0	4	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1757	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T57	0	1	0	0
T111	29019	18	0	0
T112	49794	0	0	0
T121	0	48	0	0
T127	0	45	0	0
T147	4857	0	0	0
T184	0	16	0	0
T185	0	43	0	0
T186	0	61	0	0
T187	0	34	0	0
T188	0	8	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T204	0	2	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1968	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	35	0	0
T112	49794	0	0	0
T121	0	72	0	0
T122	0	95	0	0
T127	0	48	0	0
T147	4857	0	0	0
T184	0	29	0	0
T185	0	49	0	0
T186	0	48	0	0
T187	0	53	0	0
T188	0	12	0	0
T189	0	13	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1884	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	22	0	0
T112	49794	0	0	0
T121	0	31	0	0
T122	0	87	0	0
T127	0	31	0	0
T147	4857	0	0	0
T184	0	26	0	0
T185	0	25	0	0
T186	0	55	0	0
T187	0	26	0	0
T188	0	8	0	0
T189	0	7	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1912	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	21	0	0
T112	49794	0	0	0
T121	0	102	0	0
T122	0	84	0	0
T127	0	32	0	0
T147	4857	0	0	0
T184	0	39	0	0
T185	0	37	0	0
T186	0	65	0	0
T187	0	21	0	0
T189	0	12	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T195	0	4	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1905	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	20	0	0
T112	49794	0	0	0
T121	0	75	0	0
T122	0	77	0	0
T127	0	27	0	0
T147	4857	0	0	0
T184	0	31	0	0
T185	0	64	0	0
T186	0	70	0	0
T187	0	41	0	0
T188	0	11	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T205	0	1	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1927	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	30	0	0
T112	49794	0	0	0
T121	0	40	0	0
T122	0	91	0	0
T127	0	36	0	0
T147	4857	0	0	0
T184	0	18	0	0
T185	0	27	0	0
T186	0	70	0	0
T187	0	33	0	0
T188	0	8	0	0
T189	0	3	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1944	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	35	0	0
T112	49794	0	0	0
T121	0	55	0	0
T122	0	99	0	0
T127	0	40	0	0
T147	4857	0	0	0
T184	0	40	0	0
T185	0	15	0	0
T186	0	62	0	0
T187	0	51	0	0
T188	0	17	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T195	0	13	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1986	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	20	0	0
T112	49794	0	0	0
T121	0	61	0	0
T122	0	68	0	0
T127	0	61	0	0
T147	4857	0	0	0
T184	0	21	0	0
T185	0	48	0	0
T186	0	62	0	0
T187	0	53	0	0
T188	0	19	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T206	0	5	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1839	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	38	0	0
T112	49794	0	0	0
T121	0	49	0	0
T122	0	79	0	0
T127	0	33	0	0
T147	4857	0	0	0
T184	0	29	0	0
T185	0	38	0	0
T186	0	62	0	0
T187	0	13	0	0
T188	0	6	0	0
T189	0	13	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	2019	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	43	0	0
T112	49794	0	0	0
T121	0	78	0	0
T122	0	66	0	0
T127	0	43	0	0
T147	4857	0	0	0
T184	0	35	0	0
T185	0	31	0	0
T186	0	49	0	0
T187	0	32	0	0
T188	0	18	0	0
T189	0	4	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1871	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	46	0	0
T112	49794	0	0	0
T121	0	83	0	0
T122	0	68	0	0
T127	0	42	0	0
T147	4857	0	0	0
T184	0	31	0	0
T185	0	23	0	0
T186	0	47	0	0
T187	0	29	0	0
T188	0	7	0	0
T189	0	8	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1922	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	21	0	0
T112	49794	0	0	0
T121	0	46	0	0
T122	0	67	0	0
T127	0	32	0	0
T147	4857	0	0	0
T184	0	34	0	0
T185	0	21	0	0
T186	0	68	0	0
T187	0	33	0	0
T188	0	11	0	0
T189	0	10	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1849	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	39	0	0
T112	49794	0	0	0
T121	0	64	0	0
T122	0	69	0	0
T127	0	51	0	0
T147	4857	0	0	0
T184	0	16	0	0
T185	0	45	0	0
T186	0	61	0	0
T187	0	30	0	0
T188	0	13	0	0
T189	0	3	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1879	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	50	0	0
T112	49794	0	0	0
T121	0	46	0	0
T122	0	77	0	0
T127	0	42	0	0
T147	4857	0	0	0
T153	0	104	0	0
T184	0	42	0	0
T185	0	54	0	0
T186	0	54	0	0
T187	0	32	0	0
T188	0	8	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1792	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	38	0	0
T112	49794	0	0	0
T121	0	74	0	0
T122	0	58	0	0
T127	0	46	0	0
T147	4857	0	0	0
T184	0	18	0	0
T185	0	39	0	0
T186	0	57	0	0
T187	0	47	0	0
T188	0	2	0	0
T189	0	2	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1833	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	24	0	0
T112	49794	0	0	0
T121	0	54	0	0
T122	0	89	0	0
T127	0	30	0	0
T147	4857	0	0	0
T184	0	31	0	0
T185	0	27	0	0
T186	0	49	0	0
T187	0	43	0	0
T189	0	19	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0
T195	0	6	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1912	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	16	0	0
T112	49794	0	0	0
T121	0	84	0	0
T122	0	60	0	0
T127	0	41	0	0
T147	4857	0	0	0
T184	0	33	0	0
T185	0	47	0	0
T186	0	66	0	0
T187	0	51	0	0
T188	0	6	0	0
T189	0	4	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1949	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	26	0	0
T112	49794	0	0	0
T121	0	78	0	0
T122	0	80	0	0
T127	0	41	0	0
T147	4857	0	0	0
T184	0	38	0	0
T185	0	18	0	0
T186	0	53	0	0
T187	0	52	0	0
T188	0	3	0	0
T189	0	9	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1715	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	44	0	0
T112	49794	0	0	0
T121	0	58	0	0
T122	0	92	0	0
T127	0	37	0	0
T147	4857	0	0	0
T184	0	11	0	0
T185	0	30	0	0
T186	0	46	0	0
T187	0	35	0	0
T188	0	11	0	0
T189	0	21	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	30356232	1954	0	0
T7	242630	0	0	0
T22	24272	0	0	0
T111	29019	22	0	0
T112	49794	0	0	0
T121	0	44	0	0
T122	0	92	0	0
T127	0	42	0	0
T147	4857	0	0	0
T153	0	102	0	0
T184	0	27	0	0
T185	0	34	0	0
T186	0	49	0	0
T187	0	47	0	0
T188	0	8	0	0
T190	4210	0	0	0
T191	844	0	0	0
T192	8031	0	0	0
T193	8364	0	0	0
T194	7160	0	0	0