Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_keymgr_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_keymgr_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_keymgr_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_keymgr_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_keymgr_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3070083	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

628173

1

T1

2538

T2

561

T3

330

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	3280664	1			T1	3462		T2	615		T3	4743
values[0x0]	206610	1			T1	926		T2	226		T3	97
values[0x1]	210982	1			T1	929		T2	205		T3	100

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2107370	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1590886

1

T1

3134

T2

674

T3

1790

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	30151	1			T1	22		T3	27		T11	12
valid_sources[0x01]	11020	1			T1	23		T3	7		T11	25
valid_sources[0x02]	10681	1			T1	16		T3	15		T11	52
valid_sources[0x03]	12095	1			T1	20		T3	20		T11	34
valid_sources[0x04]	9977	1			T1	18		T3	28		T11	32
valid_sources[0x05]	10580	1			T1	22		T3	31		T11	43
valid_sources[0x06]	11511	1			T1	15		T3	14		T11	34
valid_sources[0x07]	10706	1			T1	21		T3	3		T11	34
valid_sources[0x08]	10525	1			T1	22		T3	16		T11	27
valid_sources[0x09]	10874	1			T1	28		T3	29		T11	53
valid_sources[0x0a]	10673	1			T1	25		T3	16		T11	32
valid_sources[0x0b]	97569	1			T1	9		T3	11		T11	8
valid_sources[0x0c]	21409	1			T1	11		T3	24		T11	30
valid_sources[0x0d]	13334	1			T1	17		T3	51		T11	38
valid_sources[0x0e]	12348	1			T1	18		T3	13		T11	35
valid_sources[0x0f]	13846	1			T1	24		T3	9		T11	40
valid_sources[0x10]	10179	1			T1	16		T3	16		T11	30
valid_sources[0x11]	41284	1			T1	17		T3	11		T11	35
valid_sources[0x12]	10363	1			T1	31		T3	13		T11	40
valid_sources[0x13]	10673	1			T1	18		T3	7		T11	25
valid_sources[0x14]	10762	1			T1	18		T3	32		T11	50
valid_sources[0x15]	10967	1			T1	21		T3	34		T11	22
valid_sources[0x16]	12078	1			T1	25		T3	22		T11	32
valid_sources[0x17]	10051	1			T1	23		T3	16		T11	24
valid_sources[0x18]	20833	1			T1	22		T3	8		T11	27
valid_sources[0x19]	12197	1			T1	24		T3	4		T11	28
valid_sources[0x1a]	28655	1			T1	19		T3	16		T11	23
valid_sources[0x1b]	10289	1			T1	25		T3	5		T11	31
valid_sources[0x1c]	20614	1			T1	19		T3	15		T11	29
valid_sources[0x1d]	11515	1			T1	15		T3	29		T11	48
valid_sources[0x1e]	14534	1			T1	26		T3	16		T11	26
valid_sources[0x1f]	11654	1			T1	18		T3	23		T11	55
valid_sources[0x20]	10839	1			T1	16		T3	12		T11	47
valid_sources[0x21]	10160	1			T1	16		T3	22		T11	21
valid_sources[0x22]	10223	1			T1	25		T3	9		T11	40
valid_sources[0x23]	13318	1			T1	13		T3	39		T11	35
valid_sources[0x24]	10632	1			T1	17		T3	4		T11	33
valid_sources[0x25]	11897	1			T1	20		T3	38		T11	40
valid_sources[0x26]	22245	1			T1	24		T3	27		T11	40
valid_sources[0x27]	10476	1			T1	24		T3	5		T11	40
valid_sources[0x28]	17136	1			T1	32		T3	14		T11	22
valid_sources[0x29]	10113	1			T1	33		T3	8		T11	71
valid_sources[0x2a]	11935	1			T1	18		T3	24		T11	23
valid_sources[0x2b]	11557	1			T1	17		T3	10		T11	44
valid_sources[0x2c]	14800	1			T1	11		T3	16		T11	33
valid_sources[0x2d]	11962	1			T1	16		T3	3		T11	35
valid_sources[0x2e]	10644	1			T1	21		T3	32		T11	34
valid_sources[0x2f]	14082	1			T1	30		T3	9		T11	25
valid_sources[0x30]	11558	1			T1	20		T3	19		T11	38
valid_sources[0x31]	12390	1			T1	34		T3	45		T11	19
valid_sources[0x32]	13652	1			T1	18		T3	22		T11	39
valid_sources[0x33]	69762	1			T1	23		T3	37		T11	18
valid_sources[0x34]	10263	1			T1	18		T3	6		T11	25
valid_sources[0x35]	10292	1			T1	18		T11	34		T12	3
valid_sources[0x36]	11857	1			T1	37		T3	12		T11	43
valid_sources[0x37]	11844	1			T1	20		T3	10		T11	19
valid_sources[0x38]	10648	1			T1	15		T3	21		T11	45
valid_sources[0x39]	11737	1			T1	21		T3	30		T11	34
valid_sources[0x3a]	13949	1			T1	12		T3	10		T11	51
valid_sources[0x3b]	17383	1			T1	16		T3	19		T11	51
valid_sources[0x3c]	10414	1			T1	17		T3	7		T11	26
valid_sources[0x3d]	10159	1			T1	19		T3	18		T11	38
valid_sources[0x3e]	119331	1			T1	34		T3	23		T11	23
valid_sources[0x3f]	10511	1			T1	15		T3	9		T11	33
valid_sources[0x40]	15407	1			T1	27		T3	24		T11	27
valid_sources[0x41]	13389	1			T1	17		T3	20		T11	19
valid_sources[0x42]	10336	1			T1	15		T3	19		T11	29
valid_sources[0x43]	11599	1			T1	19		T3	8		T11	30
valid_sources[0x44]	18702	1			T1	18		T3	20		T11	34
valid_sources[0x45]	12877	1			T1	18		T3	29		T11	29
valid_sources[0x46]	48588	1			T1	29		T3	18		T11	38
valid_sources[0x47]	12348	1			T1	23		T3	13		T11	52
valid_sources[0x48]	12493	1			T1	19		T3	15		T11	46
valid_sources[0x49]	11015	1			T1	27		T3	36		T11	41
valid_sources[0x4a]	10142	1			T1	13		T3	23		T11	19
valid_sources[0x4b]	17418	1			T1	17		T3	16		T11	34
valid_sources[0x4c]	12586	1			T1	18		T3	22		T11	20
valid_sources[0x4d]	11559	1			T1	15		T3	24		T11	46
valid_sources[0x4e]	12469	1			T1	14		T3	26		T11	37
valid_sources[0x4f]	11423	1			T1	19		T3	7		T11	29
valid_sources[0x50]	49540	1			T1	24		T3	27		T11	28
valid_sources[0x51]	10495	1			T1	22		T3	25		T11	31
valid_sources[0x52]	10542	1			T1	14		T3	3		T11	43
valid_sources[0x53]	10120	1			T1	15		T3	13		T11	21
valid_sources[0x54]	10086	1			T1	17		T3	25		T11	27
valid_sources[0x55]	13111	1			T1	13		T3	13		T11	44
valid_sources[0x56]	14136	1			T1	23		T3	26		T11	38
valid_sources[0x57]	10472	1			T1	25		T3	11		T11	43
valid_sources[0x58]	12776	1			T1	16		T3	38		T11	20
valid_sources[0x59]	11672	1			T1	25		T3	13		T11	36
valid_sources[0x5a]	47919	1			T1	19		T3	28		T11	11
valid_sources[0x5b]	11327	1			T1	24		T3	23		T11	36
valid_sources[0x5c]	10995	1			T1	22		T3	22		T11	15
valid_sources[0x5d]	10728	1			T1	21		T3	27		T11	34
valid_sources[0x5e]	10291	1			T1	29		T3	27		T11	16
valid_sources[0x5f]	12123	1			T1	21		T2	1046		T3	14
valid_sources[0x60]	94617	1			T1	17		T3	14		T11	52
valid_sources[0x61]	12088	1			T1	20		T3	14		T11	40
valid_sources[0x62]	13612	1			T1	19		T3	45		T11	34
valid_sources[0x63]	12587	1			T1	21		T3	25		T11	35
valid_sources[0x64]	10317	1			T1	17		T3	8		T11	32
valid_sources[0x65]	23555	1			T1	15		T3	19		T11	34
valid_sources[0x66]	14622	1			T1	30		T3	11		T11	42
valid_sources[0x67]	10075	1			T1	22		T3	26		T11	42
valid_sources[0x68]	16250	1			T1	23		T3	21		T11	23
valid_sources[0x69]	11114	1			T1	16		T3	23		T11	32
valid_sources[0x6a]	10787	1			T1	16		T3	9		T11	19
valid_sources[0x6b]	10649	1			T1	19		T3	24		T11	41
valid_sources[0x6c]	10566	1			T1	31		T3	16		T11	35
valid_sources[0x6d]	10666	1			T1	10		T3	22		T11	42
valid_sources[0x6e]	10714	1			T1	17		T3	11		T11	29
valid_sources[0x6f]	11148	1			T1	36		T3	19		T11	47
valid_sources[0x70]	12369	1			T1	22		T3	21		T11	48
valid_sources[0x71]	10663	1			T1	18		T3	12		T11	63
valid_sources[0x72]	11435	1			T1	21		T3	17		T11	21
valid_sources[0x73]	12263	1			T1	20		T3	25		T11	24
valid_sources[0x74]	12354	1			T1	23		T3	25		T11	45
valid_sources[0x75]	15422	1			T1	31		T3	25		T11	26
valid_sources[0x76]	10085	1			T1	20		T3	34		T11	8
valid_sources[0x77]	12277	1			T1	14		T3	48		T11	46
valid_sources[0x78]	10883	1			T1	18		T3	24		T11	49
valid_sources[0x79]	10569	1			T1	13		T3	12		T11	44
valid_sources[0x7a]	13122	1			T1	21		T3	33		T11	58
valid_sources[0x7b]	10948	1			T1	30		T3	30		T11	41
valid_sources[0x7c]	12512	1			T1	19		T3	20		T11	28
valid_sources[0x7d]	11166	1			T1	33		T3	18		T11	38
valid_sources[0x7e]	10533	1			T1	24		T3	18		T11	27
valid_sources[0x7f]	10742	1			T1	24		T3	14		T11	24
valid_sources[0x80]	11846	1			T1	19		T3	16		T11	37

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

344997

1

T1

1413

T2

240

T3

203

values[0x0]

all_enables

biggest_size

148845

1

T1

609

T2

175

T3

67

values[0x1]

all_enables

biggest_size

134331

1

T1

516

T2

146

T3

60