Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	26770997	17072	0	0
attest_sw_binding_0_rd_A	26770997	3054	0	0
attest_sw_binding_1_rd_A	26770997	3052	0	0
attest_sw_binding_2_rd_A	26770997	3143	0	0
attest_sw_binding_3_rd_A	26770997	3103	0	0
attest_sw_binding_4_rd_A	26770997	3169	0	0
attest_sw_binding_5_rd_A	26770997	3057	0	0
attest_sw_binding_6_rd_A	26770997	3077	0	0
attest_sw_binding_7_rd_A	26770997	3183	0	0
intr_enable_rd_A	26770997	3625	0	0
key_version_rd_A	26770997	3078	0	0
max_creator_key_ver_regwen_rd_A	26770997	3200	0	0
max_owner_int_key_ver_regwen_rd_A	26770997	3168	0	0
max_owner_key_ver_regwen_rd_A	26770997	2995	0	0
reseed_interval_regwen_rd_A	26770997	3185	0	0
salt_0_rd_A	26770997	3134	0	0
salt_1_rd_A	26770997	3078	0	0
salt_2_rd_A	26770997	3118	0	0
salt_3_rd_A	26770997	3229	0	0
salt_4_rd_A	26770997	3008	0	0
salt_5_rd_A	26770997	2997	0	0
salt_6_rd_A	26770997	3063	0	0
salt_7_rd_A	26770997	3058	0	0
sealing_sw_binding_0_rd_A	26770997	2929	0	0
sealing_sw_binding_1_rd_A	26770997	3242	0	0
sealing_sw_binding_2_rd_A	26770997	3208	0	0
sealing_sw_binding_3_rd_A	26770997	3139	0	0
sealing_sw_binding_4_rd_A	26770997	2917	0	0
sealing_sw_binding_5_rd_A	26770997	3172	0	0
sealing_sw_binding_6_rd_A	26770997	2866	0	0
sealing_sw_binding_7_rd_A	26770997	3077	0	0
sideload_clear_rd_A	26770997	3276	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	17072	0	0
T56	0	500	0	0
T62	32214	347	0	0
T66	0	84	0	0
T73	2039	0	0	0
T113	0	483	0	0
T115	0	26	0	0
T128	0	645	0	0
T129	0	141	0	0
T130	0	222	0	0
T131	0	413	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	191	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3054	0	0
T62	32214	27	0	0
T66	0	76	0	0
T73	2039	0	0	0
T115	0	23	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	59	0	0
T182	0	15	0	0
T183	0	8	0	0
T184	0	46	0	0
T185	0	6	0	0
T186	0	20	0	0
T187	0	33	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3052	0	0
T62	32214	28	0	0
T66	0	46	0	0
T73	2039	0	0	0
T115	0	29	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	57	0	0
T182	0	1	0	0
T183	0	18	0	0
T184	0	64	0	0
T185	0	9	0	0
T186	0	4	0	0
T187	0	31	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3143	0	0
T62	32214	28	0	0
T66	0	58	0	0
T73	2039	0	0	0
T115	0	32	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	55	0	0
T182	0	29	0	0
T183	0	16	0	0
T184	0	59	0	0
T185	0	6	0	0
T186	0	19	0	0
T187	0	25	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3103	0	0
T62	32214	47	0	0
T66	0	62	0	0
T73	2039	0	0	0
T115	0	13	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	64	0	0
T182	0	10	0	0
T183	0	13	0	0
T184	0	43	0	0
T185	0	3	0	0
T186	0	10	0	0
T187	0	36	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3169	0	0
T62	32214	34	0	0
T66	0	55	0	0
T73	2039	0	0	0
T115	0	14	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	77	0	0
T182	0	19	0	0
T183	0	21	0	0
T184	0	50	0	0
T185	0	23	0	0
T186	0	5	0	0
T188	0	1	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3057	0	0
T62	32214	36	0	0
T66	0	53	0	0
T73	2039	0	0	0
T115	0	28	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	42	0	0
T182	0	16	0	0
T183	0	25	0	0
T184	0	41	0	0
T185	0	16	0	0
T186	0	7	0	0
T187	0	44	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3077	0	0
T62	32214	36	0	0
T66	0	44	0	0
T73	2039	0	0	0
T115	0	17	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	62	0	0
T183	0	15	0	0
T184	0	52	0	0
T185	0	17	0	0
T186	0	14	0	0
T187	0	20	0	0
T189	0	45	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3183	0	0
T62	32214	24	0	0
T66	0	62	0	0
T73	2039	0	0	0
T115	0	34	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	79	0	0
T182	0	38	0	0
T183	0	22	0	0
T184	0	56	0	0
T185	0	17	0	0
T186	0	11	0	0
T187	0	35	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3625	0	0
T7	3599	0	0	0
T19	1737	0	0	0
T33	106302	0	0	0
T34	13578	0	0	0
T47	107286	66	0	0
T48	22283	0	0	0
T51	0	35	0	0
T62	0	29	0	0
T66	0	128	0	0
T79	2364	0	0	0
T80	15620	0	0	0
T81	2102	0	0	0
T82	5818	0	0	0
T115	0	71	0	0
T140	0	57	0	0
T182	0	10	0	0
T183	0	33	0	0
T190	0	9	0	0
T191	0	12	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3078	0	0
T62	32214	24	0	0
T66	0	59	0	0
T73	2039	0	0	0
T115	0	26	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	47	0	0
T182	0	30	0	0
T183	0	16	0	0
T184	0	59	0	0
T185	0	9	0	0
T186	0	8	0	0
T187	0	23	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3200	0	0
T62	32214	26	0	0
T66	0	54	0	0
T73	2039	0	0	0
T115	0	24	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	71	0	0
T182	0	26	0	0
T183	0	21	0	0
T184	0	35	0	0
T185	0	8	0	0
T186	0	10	0	0
T187	0	41	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3168	0	0
T62	32214	30	0	0
T66	0	56	0	0
T73	2039	0	0	0
T115	0	22	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	67	0	0
T182	0	8	0	0
T183	0	37	0	0
T184	0	54	0	0
T185	0	14	0	0
T186	0	44	0	0
T187	0	40	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	2995	0	0
T62	32214	30	0	0
T66	0	59	0	0
T73	2039	0	0	0
T115	0	23	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	59	0	0
T182	0	35	0	0
T183	0	26	0	0
T184	0	32	0	0
T185	0	21	0	0
T186	0	22	0	0
T187	0	47	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3185	0	0
T62	32214	35	0	0
T66	0	35	0	0
T73	2039	0	0	0
T115	0	21	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	52	0	0
T182	0	18	0	0
T183	0	29	0	0
T184	0	71	0	0
T185	0	15	0	0
T186	0	2	0	0
T187	0	18	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3134	0	0
T62	32214	32	0	0
T66	0	59	0	0
T73	2039	0	0	0
T115	0	42	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	56	0	0
T182	0	21	0	0
T183	0	21	0	0
T184	0	47	0	0
T185	0	5	0	0
T186	0	8	0	0
T187	0	27	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3078	0	0
T62	32214	31	0	0
T66	0	67	0	0
T73	2039	0	0	0
T115	0	11	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	62	0	0
T182	0	7	0	0
T183	0	26	0	0
T184	0	58	0	0
T185	0	14	0	0
T186	0	27	0	0
T187	0	27	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3118	0	0
T62	32214	25	0	0
T66	0	34	0	0
T73	2039	0	0	0
T115	0	50	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	65	0	0
T182	0	47	0	0
T183	0	27	0	0
T184	0	38	0	0
T185	0	14	0	0
T186	0	9	0	0
T187	0	24	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3229	0	0
T62	32214	47	0	0
T66	0	74	0	0
T73	2039	0	0	0
T115	0	32	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	49	0	0
T182	0	11	0	0
T183	0	25	0	0
T184	0	41	0	0
T185	0	18	0	0
T186	0	16	0	0
T187	0	30	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3008	0	0
T62	32214	17	0	0
T66	0	46	0	0
T73	2039	0	0	0
T115	0	21	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	45	0	0
T182	0	6	0	0
T183	0	38	0	0
T184	0	61	0	0
T185	0	10	0	0
T186	0	13	0	0
T187	0	25	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	2997	0	0
T62	32214	23	0	0
T66	0	73	0	0
T73	2039	0	0	0
T115	0	21	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	56	0	0
T182	0	7	0	0
T183	0	21	0	0
T184	0	40	0	0
T185	0	11	0	0
T186	0	13	0	0
T187	0	35	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3063	0	0
T62	32214	33	0	0
T66	0	73	0	0
T73	2039	0	0	0
T115	0	19	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	52	0	0
T182	0	11	0	0
T183	0	29	0	0
T184	0	43	0	0
T185	0	22	0	0
T186	0	9	0	0
T187	0	23	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3058	0	0
T62	32214	28	0	0
T66	0	61	0	0
T73	2039	0	0	0
T115	0	28	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	52	0	0
T182	0	8	0	0
T183	0	15	0	0
T184	0	47	0	0
T185	0	22	0	0
T186	0	6	0	0
T187	0	30	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	2929	0	0
T62	32214	31	0	0
T66	0	24	0	0
T73	2039	0	0	0
T115	0	23	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	51	0	0
T182	0	8	0	0
T183	0	38	0	0
T184	0	63	0	0
T185	0	40	0	0
T186	0	25	0	0
T187	0	31	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3242	0	0
T62	32214	19	0	0
T66	0	44	0	0
T73	2039	0	0	0
T115	0	22	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	62	0	0
T182	0	18	0	0
T183	0	16	0	0
T184	0	47	0	0
T185	0	21	0	0
T186	0	15	0	0
T187	0	29	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3208	0	0
T62	32214	16	0	0
T66	0	42	0	0
T73	2039	0	0	0
T115	0	38	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	61	0	0
T182	0	35	0	0
T183	0	41	0	0
T184	0	61	0	0
T185	0	34	0	0
T186	0	27	0	0
T187	0	42	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3139	0	0
T62	32214	28	0	0
T66	0	74	0	0
T73	2039	0	0	0
T115	0	23	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	50	0	0
T182	0	16	0	0
T183	0	20	0	0
T184	0	41	0	0
T185	0	19	0	0
T186	0	15	0	0
T187	0	27	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	2917	0	0
T62	32214	17	0	0
T66	0	43	0	0
T73	2039	0	0	0
T115	0	11	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	32	0	0
T182	0	10	0	0
T183	0	33	0	0
T184	0	66	0	0
T185	0	17	0	0
T186	0	10	0	0
T187	0	32	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3172	0	0
T62	32214	30	0	0
T66	0	51	0	0
T73	2039	0	0	0
T115	0	20	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	58	0	0
T182	0	22	0	0
T183	0	35	0	0
T184	0	94	0	0
T185	0	19	0	0
T186	0	11	0	0
T187	0	34	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	2866	0	0
T62	32214	30	0	0
T66	0	62	0	0
T73	2039	0	0	0
T115	0	13	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	47	0	0
T182	0	33	0	0
T183	0	14	0	0
T184	0	55	0	0
T185	0	18	0	0
T186	0	23	0	0
T187	0	15	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3077	0	0
T62	32214	19	0	0
T66	0	65	0	0
T73	2039	0	0	0
T115	0	26	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	40	0	0
T182	0	12	0	0
T183	0	23	0	0
T184	0	46	0	0
T185	0	17	0	0
T186	0	19	0	0
T187	0	21	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	26770997	3276	0	0
T62	32214	22	0	0
T66	0	60	0	0
T73	2039	0	0	0
T115	0	29	0	0
T132	786	0	0	0
T133	7474	0	0	0
T134	3644	0	0	0
T135	38572	0	0	0
T136	9297	0	0	0
T137	9119	0	0	0
T138	8853	0	0	0
T139	4646	0	0	0
T140	0	65	0	0
T182	0	25	0	0
T183	0	13	0	0
T184	0	53	0	0
T185	0	12	0	0
T186	0	11	0	0
T187	0	36	0	0