Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	24711825	17058	0	0
attest_sw_binding_0_rd_A	24711825	3126	0	0
attest_sw_binding_1_rd_A	24711825	3321	0	0
attest_sw_binding_2_rd_A	24711825	3078	0	0
attest_sw_binding_3_rd_A	24711825	2989	0	0
attest_sw_binding_4_rd_A	24711825	3063	0	0
attest_sw_binding_5_rd_A	24711825	3237	0	0
attest_sw_binding_6_rd_A	24711825	3109	0	0
attest_sw_binding_7_rd_A	24711825	3087	0	0
intr_enable_rd_A	24711825	3648	0	0
key_version_rd_A	24711825	3185	0	0
max_creator_key_ver_regwen_rd_A	24711825	3258	0	0
max_owner_int_key_ver_regwen_rd_A	24711825	3184	0	0
max_owner_key_ver_regwen_rd_A	24711825	3245	0	0
reseed_interval_regwen_rd_A	24711825	3075	0	0
salt_0_rd_A	24711825	3188	0	0
salt_1_rd_A	24711825	3135	0	0
salt_2_rd_A	24711825	3033	0	0
salt_3_rd_A	24711825	3161	0	0
salt_4_rd_A	24711825	3057	0	0
salt_5_rd_A	24711825	2929	0	0
salt_6_rd_A	24711825	3090	0	0
salt_7_rd_A	24711825	3043	0	0
sealing_sw_binding_0_rd_A	24711825	3063	0	0
sealing_sw_binding_1_rd_A	24711825	3124	0	0
sealing_sw_binding_2_rd_A	24711825	3250	0	0
sealing_sw_binding_3_rd_A	24711825	3248	0	0
sealing_sw_binding_4_rd_A	24711825	3219	0	0
sealing_sw_binding_5_rd_A	24711825	3279	0	0
sealing_sw_binding_6_rd_A	24711825	3092	0	0
sealing_sw_binding_7_rd_A	24711825	3062	0	0
sideload_clear_rd_A	24711825	2945	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	17058	0	0
T10	38578	0	0	0
T44	4711	0	0	0
T65	82635	0	0	0
T79	0	226	0	0
T101	6902	0	0	0
T111	22651	29	0	0
T113	0	844	0	0
T114	56069	0	0	0
T116	3071	0	0	0
T117	1112	0	0	0
T118	6159	0	0	0
T119	4155	0	0	0
T121	0	41	0	0
T132	0	24	0	0
T133	0	245	0	0
T134	0	30	0	0
T135	0	1058	0	0
T136	0	106	0	0
T163	0	115	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3126	0	0
T33	12788	0	0	0
T83	0	57	0	0
T123	0	220	0	0
T133	62312	35	0	0
T134	20831	13	0	0
T144	8036	0	0	0
T161	0	38	0	0
T184	0	15	0	0
T185	0	15	0	0
T186	0	69	0	0
T187	0	22	0	0
T188	0	24	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3321	0	0
T33	12788	0	0	0
T83	0	53	0	0
T123	0	220	0	0
T133	62312	22	0	0
T134	20831	12	0	0
T144	8036	0	0	0
T161	0	50	0	0
T184	0	14	0	0
T185	0	48	0	0
T186	0	74	0	0
T187	0	46	0	0
T188	0	17	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3078	0	0
T33	12788	0	0	0
T83	0	50	0	0
T123	0	178	0	0
T133	62312	24	0	0
T134	20831	14	0	0
T144	8036	0	0	0
T161	0	32	0	0
T184	0	9	0	0
T185	0	26	0	0
T186	0	56	0	0
T187	0	42	0	0
T188	0	14	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	2989	0	0
T33	12788	0	0	0
T83	0	53	0	0
T123	0	195	0	0
T133	62312	33	0	0
T134	20831	7	0	0
T144	8036	0	0	0
T161	0	59	0	0
T184	0	12	0	0
T185	0	23	0	0
T186	0	76	0	0
T187	0	24	0	0
T188	0	14	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3063	0	0
T33	12788	0	0	0
T83	0	57	0	0
T123	0	202	0	0
T133	62312	59	0	0
T134	20831	12	0	0
T144	8036	0	0	0
T161	0	25	0	0
T184	0	6	0	0
T185	0	18	0	0
T186	0	71	0	0
T187	0	39	0	0
T188	0	18	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3237	0	0
T33	12788	0	0	0
T83	0	37	0	0
T123	0	212	0	0
T133	62312	39	0	0
T134	20831	18	0	0
T144	8036	0	0	0
T161	0	18	0	0
T184	0	2	0	0
T185	0	57	0	0
T186	0	69	0	0
T187	0	28	0	0
T188	0	12	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3109	0	0
T33	12788	0	0	0
T83	0	38	0	0
T123	0	194	0	0
T133	62312	25	0	0
T134	20831	17	0	0
T144	8036	0	0	0
T161	0	53	0	0
T184	0	41	0	0
T185	0	19	0	0
T186	0	83	0	0
T187	0	21	0	0
T188	0	10	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3087	0	0
T33	12788	0	0	0
T83	0	33	0	0
T123	0	222	0	0
T133	62312	41	0	0
T134	20831	13	0	0
T144	8036	0	0	0
T161	0	47	0	0
T184	0	18	0	0
T185	0	19	0	0
T186	0	66	0	0
T187	0	29	0	0
T188	0	22	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3648	0	0
T5	4177	0	0	0
T44	4711	0	0	0
T49	0	37	0	0
T59	2324	0	0	0
T63	0	15	0	0
T71	5197	0	0	0
T83	0	61	0	0
T93	13114	0	0	0
T101	6902	0	0	0
T114	56069	2	0	0
T133	0	29	0	0
T134	0	47	0	0
T141	0	35	0	0
T152	101197	0	0	0
T184	0	34	0	0
T185	0	60	0	0
T195	0	10	0	0
T196	5197	0	0	0
T197	5002	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3185	0	0
T33	12788	0	0	0
T83	0	35	0	0
T123	0	212	0	0
T133	62312	37	0	0
T134	20831	15	0	0
T144	8036	0	0	0
T161	0	41	0	0
T184	0	14	0	0
T185	0	39	0	0
T186	0	65	0	0
T187	0	6	0	0
T188	0	13	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3258	0	0
T33	12788	0	0	0
T83	0	61	0	0
T123	0	221	0	0
T133	62312	34	0	0
T134	20831	2	0	0
T144	8036	0	0	0
T161	0	40	0	0
T184	0	24	0	0
T185	0	18	0	0
T186	0	83	0	0
T187	0	24	0	0
T188	0	12	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3184	0	0
T33	12788	0	0	0
T83	0	61	0	0
T123	0	188	0	0
T133	62312	27	0	0
T134	20831	9	0	0
T144	8036	0	0	0
T161	0	42	0	0
T184	0	3	0	0
T185	0	38	0	0
T186	0	69	0	0
T187	0	13	0	0
T188	0	12	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3245	0	0
T33	12788	0	0	0
T83	0	76	0	0
T123	0	205	0	0
T133	62312	38	0	0
T134	20831	18	0	0
T144	8036	0	0	0
T161	0	79	0	0
T184	0	4	0	0
T185	0	30	0	0
T186	0	58	0	0
T187	0	35	0	0
T188	0	25	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3075	0	0
T33	12788	0	0	0
T83	0	31	0	0
T123	0	181	0	0
T133	62312	19	0	0
T134	20831	9	0	0
T144	8036	0	0	0
T161	0	53	0	0
T184	0	20	0	0
T185	0	31	0	0
T186	0	68	0	0
T187	0	15	0	0
T188	0	23	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3188	0	0
T33	12788	0	0	0
T83	0	51	0	0
T133	62312	38	0	0
T134	20831	21	0	0
T144	8036	0	0	0
T161	0	52	0	0
T184	0	10	0	0
T185	0	38	0	0
T186	0	32	0	0
T187	0	23	0	0
T188	0	10	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0
T198	0	4	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3135	0	0
T33	12788	0	0	0
T83	0	44	0	0
T123	0	188	0	0
T133	62312	68	0	0
T134	20831	15	0	0
T144	8036	0	0	0
T161	0	46	0	0
T184	0	18	0	0
T185	0	15	0	0
T186	0	64	0	0
T187	0	24	0	0
T188	0	9	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3033	0	0
T33	12788	0	0	0
T83	0	62	0	0
T123	0	179	0	0
T133	62312	37	0	0
T134	20831	13	0	0
T144	8036	0	0	0
T161	0	65	0	0
T184	0	15	0	0
T185	0	33	0	0
T186	0	61	0	0
T187	0	39	0	0
T188	0	14	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3161	0	0
T33	12788	0	0	0
T83	0	60	0	0
T133	62312	63	0	0
T134	20831	12	0	0
T144	8036	0	0	0
T161	0	37	0	0
T184	0	11	0	0
T185	0	21	0	0
T186	0	39	0	0
T187	0	21	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0
T199	0	3	0	0
T200	0	5	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3057	0	0
T33	12788	0	0	0
T83	0	34	0	0
T123	0	226	0	0
T133	62312	30	0	0
T134	20831	20	0	0
T144	8036	0	0	0
T161	0	35	0	0
T184	0	9	0	0
T185	0	39	0	0
T186	0	33	0	0
T187	0	8	0	0
T188	0	15	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	2929	0	0
T33	12788	0	0	0
T83	0	44	0	0
T123	0	195	0	0
T133	62312	31	0	0
T134	20831	0	0	0
T144	8036	0	0	0
T161	0	28	0	0
T184	0	9	0	0
T185	0	29	0	0
T186	0	31	0	0
T187	0	37	0	0
T188	0	10	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0
T201	0	1	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3090	0	0
T33	12788	0	0	0
T83	0	35	0	0
T123	0	182	0	0
T133	62312	21	0	0
T134	20831	17	0	0
T144	8036	0	0	0
T161	0	33	0	0
T184	0	12	0	0
T185	0	19	0	0
T186	0	67	0	0
T187	0	27	0	0
T188	0	16	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3043	0	0
T33	12788	0	0	0
T83	0	41	0	0
T123	0	201	0	0
T133	62312	31	0	0
T134	20831	26	0	0
T144	8036	0	0	0
T161	0	33	0	0
T184	0	19	0	0
T185	0	22	0	0
T186	0	53	0	0
T187	0	38	0	0
T188	0	19	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3063	0	0
T33	12788	0	0	0
T83	0	52	0	0
T123	0	159	0	0
T133	62312	21	0	0
T134	20831	20	0	0
T144	8036	0	0	0
T161	0	31	0	0
T184	0	14	0	0
T185	0	45	0	0
T186	0	51	0	0
T187	0	30	0	0
T188	0	9	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3124	0	0
T33	12788	0	0	0
T83	0	57	0	0
T123	0	214	0	0
T133	62312	21	0	0
T134	20831	12	0	0
T144	8036	0	0	0
T161	0	37	0	0
T184	0	10	0	0
T185	0	35	0	0
T186	0	61	0	0
T187	0	31	0	0
T188	0	19	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3250	0	0
T33	12788	0	0	0
T83	0	71	0	0
T123	0	191	0	0
T133	62312	28	0	0
T134	20831	13	0	0
T144	8036	0	0	0
T161	0	62	0	0
T184	0	7	0	0
T185	0	33	0	0
T186	0	61	0	0
T187	0	43	0	0
T188	0	26	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3248	0	0
T33	12788	0	0	0
T83	0	35	0	0
T123	0	187	0	0
T133	62312	56	0	0
T134	20831	9	0	0
T144	8036	0	0	0
T161	0	64	0	0
T184	0	16	0	0
T185	0	23	0	0
T186	0	44	0	0
T187	0	13	0	0
T188	0	4	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3219	0	0
T33	12788	0	0	0
T83	0	68	0	0
T123	0	215	0	0
T133	62312	29	0	0
T134	20831	21	0	0
T144	8036	0	0	0
T161	0	40	0	0
T184	0	15	0	0
T185	0	17	0	0
T186	0	68	0	0
T187	0	31	0	0
T188	0	23	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3279	0	0
T33	12788	0	0	0
T83	0	63	0	0
T123	0	188	0	0
T133	62312	34	0	0
T134	20831	4	0	0
T144	8036	0	0	0
T161	0	26	0	0
T184	0	19	0	0
T185	0	27	0	0
T186	0	83	0	0
T187	0	44	0	0
T188	0	19	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3092	0	0
T33	12788	0	0	0
T83	0	52	0	0
T123	0	192	0	0
T133	62312	31	0	0
T134	20831	9	0	0
T144	8036	0	0	0
T161	0	62	0	0
T184	0	22	0	0
T185	0	9	0	0
T186	0	50	0	0
T187	0	30	0	0
T188	0	17	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	3062	0	0
T33	12788	0	0	0
T83	0	58	0	0
T123	0	233	0	0
T133	62312	36	0	0
T134	20831	15	0	0
T144	8036	0	0	0
T161	0	63	0	0
T184	0	13	0	0
T185	0	31	0	0
T186	0	81	0	0
T187	0	29	0	0
T188	0	20	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	24711825	2945	0	0
T33	12788	0	0	0
T83	0	40	0	0
T123	0	205	0	0
T133	62312	8	0	0
T134	20831	0	0	0
T144	8036	0	0	0
T161	0	43	0	0
T184	0	22	0	0
T185	0	49	0	0
T186	0	60	0	0
T187	0	15	0	0
T188	0	24	0	0
T189	24903	0	0	0
T190	3632	0	0	0
T191	1074	0	0	0
T192	8558	0	0	0
T193	844	0	0	0
T194	3306	0	0	0
T202	0	7	0	0