Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	23312482	14293	0	0
attest_sw_binding_0_rd_A	23312482	2938	0	0
attest_sw_binding_1_rd_A	23312482	2875	0	0
attest_sw_binding_2_rd_A	23312482	2841	0	0
attest_sw_binding_3_rd_A	23312482	2885	0	0
attest_sw_binding_4_rd_A	23312482	3087	0	0
attest_sw_binding_5_rd_A	23312482	3005	0	0
attest_sw_binding_6_rd_A	23312482	2885	0	0
attest_sw_binding_7_rd_A	23312482	2838	0	0
intr_enable_rd_A	23312482	3503	0	0
key_version_rd_A	23312482	2908	0	0
max_creator_key_ver_regwen_rd_A	23312482	3010	0	0
max_owner_int_key_ver_regwen_rd_A	23312482	3051	0	0
max_owner_key_ver_regwen_rd_A	23312482	2989	0	0
reseed_interval_regwen_rd_A	23312482	2989	0	0
salt_0_rd_A	23312482	3009	0	0
salt_1_rd_A	23312482	3046	0	0
salt_2_rd_A	23312482	3017	0	0
salt_3_rd_A	23312482	3069	0	0
salt_4_rd_A	23312482	2729	0	0
salt_5_rd_A	23312482	2835	0	0
salt_6_rd_A	23312482	3075	0	0
salt_7_rd_A	23312482	2975	0	0
sealing_sw_binding_0_rd_A	23312482	3011	0	0
sealing_sw_binding_1_rd_A	23312482	2916	0	0
sealing_sw_binding_2_rd_A	23312482	2992	0	0
sealing_sw_binding_3_rd_A	23312482	3013	0	0
sealing_sw_binding_4_rd_A	23312482	2880	0	0
sealing_sw_binding_5_rd_A	23312482	3050	0	0
sealing_sw_binding_6_rd_A	23312482	2754	0	0
sealing_sw_binding_7_rd_A	23312482	3244	0	0
sideload_clear_rd_A	23312482	2915	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	14293	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	35	0	0
T61	0	48	0	0
T64	0	310	0	0
T71	0	870	0	0
T81	0	51	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T121	0	602	0	0
T127	0	59	0	0
T128	0	157	0	0
T129	0	235	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T154	0	146	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2938	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	16	0	0
T81	0	15	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	20	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	10	0	0
T176	0	39	0	0
T177	0	25	0	0
T178	0	74	0	0
T179	0	47	0	0
T180	0	35	0	0
T181	0	22	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2875	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	16	0	0
T81	0	24	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	36	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	18	0	0
T176	0	34	0	0
T177	0	38	0	0
T178	0	46	0	0
T179	0	64	0	0
T180	0	23	0	0
T181	0	14	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2841	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	23	0	0
T81	0	17	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	37	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	21	0	0
T176	0	31	0	0
T177	0	26	0	0
T178	0	54	0	0
T179	0	61	0	0
T180	0	25	0	0
T181	0	12	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2885	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	11	0	0
T81	0	19	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	28	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	8	0	0
T176	0	15	0	0
T177	0	24	0	0
T178	0	66	0	0
T179	0	67	0	0
T180	0	15	0	0
T181	0	18	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3087	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	14	0	0
T81	0	27	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	43	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	17	0	0
T176	0	44	0	0
T177	0	23	0	0
T178	0	61	0	0
T179	0	72	0	0
T180	0	23	0	0
T181	0	26	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3005	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	15	0	0
T81	0	30	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	14	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	13	0	0
T176	0	45	0	0
T177	0	54	0	0
T178	0	49	0	0
T179	0	82	0	0
T180	0	25	0	0
T181	0	34	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2885	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	16	0	0
T81	0	29	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	40	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	29	0	0
T176	0	18	0	0
T177	0	24	0	0
T178	0	57	0	0
T179	0	102	0	0
T180	0	20	0	0
T181	0	20	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2838	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	12	0	0
T81	0	11	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	34	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	21	0	0
T176	0	27	0	0
T177	0	21	0	0
T178	0	47	0	0
T179	0	53	0	0
T180	0	45	0	0
T181	0	26	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3503	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	9	0	0
T81	0	51	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	51	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	28	0	0
T176	0	57	0	0
T182	0	25	0	0
T183	0	27	0	0
T184	0	67	0	0
T185	0	22	0	0
T186	0	66	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2908	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	21	0	0
T81	0	27	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	24	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	23	0	0
T176	0	31	0	0
T177	0	27	0	0
T178	0	30	0	0
T179	0	71	0	0
T180	0	34	0	0
T181	0	16	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3010	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	22	0	0
T81	0	23	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	30	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	10	0	0
T176	0	42	0	0
T177	0	24	0	0
T178	0	55	0	0
T179	0	75	0	0
T180	0	43	0	0
T181	0	13	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3051	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	10	0	0
T81	0	17	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	17	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	33	0	0
T176	0	62	0	0
T177	0	29	0	0
T178	0	43	0	0
T179	0	72	0	0
T180	0	9	0	0
T181	0	42	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2989	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	16	0	0
T81	0	35	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	37	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	5	0	0
T176	0	27	0	0
T177	0	21	0	0
T178	0	76	0	0
T179	0	53	0	0
T180	0	31	0	0
T181	0	23	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2989	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	15	0	0
T81	0	27	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	23	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	20	0	0
T176	0	26	0	0
T177	0	40	0	0
T178	0	65	0	0
T179	0	53	0	0
T180	0	36	0	0
T181	0	22	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3009	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	16	0	0
T81	0	16	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	45	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	22	0	0
T176	0	35	0	0
T177	0	31	0	0
T178	0	67	0	0
T179	0	62	0	0
T180	0	29	0	0
T181	0	28	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3046	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	27	0	0
T81	0	34	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	27	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	15	0	0
T176	0	33	0	0
T177	0	39	0	0
T178	0	63	0	0
T179	0	64	0	0
T180	0	25	0	0
T181	0	22	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3017	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	18	0	0
T81	0	37	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	28	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	28	0	0
T176	0	44	0	0
T177	0	34	0	0
T178	0	65	0	0
T179	0	50	0	0
T180	0	42	0	0
T181	0	29	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3069	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	13	0	0
T81	0	16	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	35	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	18	0	0
T176	0	36	0	0
T177	0	30	0	0
T178	0	91	0	0
T179	0	63	0	0
T180	0	25	0	0
T181	0	26	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2729	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	22	0	0
T81	0	28	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	28	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T150	0	45	0	0
T176	0	22	0	0
T177	0	30	0	0
T178	0	82	0	0
T179	0	50	0	0
T180	0	37	0	0
T181	0	27	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2835	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	28	0	0
T81	0	12	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	25	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	37	0	0
T176	0	38	0	0
T177	0	32	0	0
T178	0	41	0	0
T179	0	67	0	0
T180	0	33	0	0
T181	0	18	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3075	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	17	0	0
T81	0	34	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	26	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	17	0	0
T176	0	31	0	0
T177	0	21	0	0
T178	0	66	0	0
T179	0	68	0	0
T180	0	16	0	0
T181	0	26	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2975	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	23	0	0
T81	0	36	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	33	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	25	0	0
T176	0	33	0	0
T177	0	23	0	0
T178	0	58	0	0
T179	0	61	0	0
T180	0	27	0	0
T181	0	36	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3011	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	7	0	0
T81	0	23	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	30	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	29	0	0
T176	0	30	0	0
T177	0	24	0	0
T178	0	96	0	0
T179	0	59	0	0
T180	0	32	0	0
T181	0	34	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2916	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	26	0	0
T81	0	19	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	14	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	42	0	0
T176	0	43	0	0
T177	0	31	0	0
T178	0	63	0	0
T179	0	56	0	0
T180	0	19	0	0
T181	0	28	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2992	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	6	0	0
T81	0	19	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	30	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	6	0	0
T176	0	37	0	0
T177	0	37	0	0
T178	0	51	0	0
T179	0	69	0	0
T180	0	25	0	0
T181	0	23	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3013	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	2	0	0
T81	0	26	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	48	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	21	0	0
T176	0	25	0	0
T177	0	29	0	0
T178	0	45	0	0
T179	0	58	0	0
T180	0	33	0	0
T181	0	41	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2880	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	8	0	0
T81	0	22	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	13	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	25	0	0
T176	0	23	0	0
T177	0	45	0	0
T178	0	66	0	0
T179	0	43	0	0
T180	0	18	0	0
T187	0	9	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3050	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	14	0	0
T81	0	38	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	23	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	9	0	0
T176	0	42	0	0
T177	0	30	0	0
T178	0	44	0	0
T179	0	69	0	0
T180	0	31	0	0
T181	0	26	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2754	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	9	0	0
T81	0	26	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	18	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	22	0	0
T176	0	19	0	0
T177	0	46	0	0
T178	0	73	0	0
T179	0	64	0	0
T180	0	19	0	0
T181	0	23	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	3244	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	28	0	0
T81	0	26	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	25	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	27	0	0
T176	0	40	0	0
T177	0	35	0	0
T178	0	89	0	0
T179	0	57	0	0
T180	0	37	0	0
T181	0	48	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	23312482	2915	0	0
T25	21814	0	0	0
T26	25182	0	0	0
T35	15475	0	0	0
T44	24113	2	0	0
T81	0	19	0	0
T86	4570	0	0	0
T87	20966	0	0	0
T104	770	0	0	0
T108	75226	0	0	0
T129	0	18	0	0
T130	7485	0	0	0
T131	138639	0	0	0
T155	0	39	0	0
T176	0	37	0	0
T177	0	27	0	0
T178	0	100	0	0
T179	0	64	0	0
T180	0	37	0	0
T181	0	36	0	0