Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	25512195	13293	0	0
attest_sw_binding_0_rd_A	25512195	2006	0	0
attest_sw_binding_1_rd_A	25512195	2048	0	0
attest_sw_binding_2_rd_A	25512195	1935	0	0
attest_sw_binding_3_rd_A	25512195	1970	0	0
attest_sw_binding_4_rd_A	25512195	2054	0	0
attest_sw_binding_5_rd_A	25512195	2048	0	0
attest_sw_binding_6_rd_A	25512195	1903	0	0
attest_sw_binding_7_rd_A	25512195	1915	0	0
intr_enable_rd_A	25512195	2468	0	0
key_version_rd_A	25512195	2051	0	0
max_creator_key_ver_regwen_rd_A	25512195	1884	0	0
max_owner_int_key_ver_regwen_rd_A	25512195	2006	0	0
max_owner_key_ver_regwen_rd_A	25512195	2078	0	0
reseed_interval_regwen_rd_A	25512195	1957	0	0
salt_0_rd_A	25512195	1815	0	0
salt_1_rd_A	25512195	1883	0	0
salt_2_rd_A	25512195	1922	0	0
salt_3_rd_A	25512195	2013	0	0
salt_4_rd_A	25512195	2003	0	0
salt_5_rd_A	25512195	1865	0	0
salt_6_rd_A	25512195	2041	0	0
salt_7_rd_A	25512195	2010	0	0
sealing_sw_binding_0_rd_A	25512195	1939	0	0
sealing_sw_binding_1_rd_A	25512195	1936	0	0
sealing_sw_binding_2_rd_A	25512195	2046	0	0
sealing_sw_binding_3_rd_A	25512195	1919	0	0
sealing_sw_binding_4_rd_A	25512195	1894	0	0
sealing_sw_binding_5_rd_A	25512195	1992	0	0
sealing_sw_binding_6_rd_A	25512195	2215	0	0
sealing_sw_binding_7_rd_A	25512195	2033	0	0
sideload_clear_rd_A	25512195	1959	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	13293	0	0
T26	16474	0	0	0
T27	5561	0	0	0
T28	10883	0	0	0
T39	37648	1478	0	0
T41	2166	0	0	0
T50	9750	0	0	0
T63	0	205	0	0
T98	35413	0	0	0
T99	5216	0	0	0
T100	16067	0	0	0
T113	0	434	0	0
T135	0	49	0	0
T136	0	885	0	0
T137	0	316	0	0
T138	0	27	0	0
T139	0	273	0	0
T140	0	185	0	0
T141	0	951	0	0
T142	39762	0	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2006	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	48	0	0
T126	0	72	0	0
T128	0	1	0	0
T135	0	35	0	0
T138	0	25	0	0
T196	0	19	0	0
T197	0	13	0	0
T198	0	18	0	0
T199	0	22	0	0
T200	0	8	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2048	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	51	0	0
T126	0	58	0	0
T128	0	4	0	0
T135	0	26	0	0
T138	0	31	0	0
T196	0	15	0	0
T197	0	24	0	0
T198	0	43	0	0
T199	0	27	0	0
T200	0	2	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1935	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	60	0	0
T126	0	45	0	0
T128	0	11	0	0
T135	0	45	0	0
T138	0	29	0	0
T196	0	31	0	0
T197	0	7	0	0
T198	0	52	0	0
T199	0	25	0	0
T200	0	2	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1970	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	54	0	0
T126	0	58	0	0
T128	0	5	0	0
T135	0	21	0	0
T138	0	14	0	0
T196	0	20	0	0
T197	0	10	0	0
T198	0	26	0	0
T199	0	25	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0
T204	0	8	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2054	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T43	0	7	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	46	0	0
T126	0	71	0	0
T128	0	9	0	0
T135	0	29	0	0
T138	0	35	0	0
T196	0	29	0	0
T197	0	25	0	0
T198	0	22	0	0
T199	0	42	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2048	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	54	0	0
T126	0	44	0	0
T128	0	5	0	0
T135	0	18	0	0
T138	0	38	0	0
T196	0	23	0	0
T197	0	8	0	0
T198	0	20	0	0
T199	0	21	0	0
T200	0	7	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1903	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	63	0	0
T126	0	42	0	0
T135	0	16	0	0
T138	0	20	0	0
T181	0	36	0	0
T196	0	57	0	0
T197	0	7	0	0
T198	0	45	0	0
T199	0	16	0	0
T200	0	7	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1915	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	33	0	0
T126	0	28	0	0
T128	0	6	0	0
T135	0	34	0	0
T138	0	23	0	0
T196	0	23	0	0
T197	0	11	0	0
T198	0	18	0	0
T199	0	39	0	0
T200	0	8	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2468	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T64	0	48	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T87	0	14	0	0
T113	66844	51	0	0
T135	0	37	0	0
T138	0	38	0	0
T196	0	34	0	0
T197	0	20	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0
T205	0	21	0	0
T206	0	28	0	0
T207	0	32	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2051	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	63	0	0
T126	0	41	0	0
T128	0	2	0	0
T135	0	29	0	0
T138	0	15	0	0
T196	0	11	0	0
T197	0	26	0	0
T198	0	27	0	0
T199	0	36	0	0
T200	0	4	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1884	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	60	0	0
T126	0	92	0	0
T128	0	20	0	0
T135	0	34	0	0
T138	0	37	0	0
T196	0	29	0	0
T197	0	13	0	0
T198	0	17	0	0
T199	0	17	0	0
T200	0	6	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2006	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	44	0	0
T126	0	59	0	0
T128	0	18	0	0
T135	0	34	0	0
T138	0	24	0	0
T196	0	25	0	0
T197	0	8	0	0
T198	0	41	0	0
T199	0	25	0	0
T200	0	6	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2078	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	90	0	0
T126	0	73	0	0
T128	0	3	0	0
T135	0	37	0	0
T138	0	27	0	0
T196	0	25	0	0
T197	0	11	0	0
T198	0	14	0	0
T199	0	25	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0
T208	0	2	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1957	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	46	0	0
T126	0	67	0	0
T135	0	26	0	0
T138	0	30	0	0
T196	0	12	0	0
T197	0	16	0	0
T198	0	22	0	0
T199	0	20	0	0
T200	0	9	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0
T209	0	6	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1815	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	50	0	0
T126	0	27	0	0
T128	0	2	0	0
T135	0	26	0	0
T138	0	22	0	0
T196	0	42	0	0
T197	0	15	0	0
T198	0	24	0	0
T199	0	16	0	0
T200	0	1	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1883	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	65	0	0
T126	0	37	0	0
T135	0	33	0	0
T138	0	46	0	0
T181	0	40	0	0
T196	0	46	0	0
T197	0	22	0	0
T198	0	20	0	0
T199	0	45	0	0
T200	0	6	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1922	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	72	0	0
T126	0	56	0	0
T128	0	8	0	0
T135	0	28	0	0
T138	0	33	0	0
T196	0	22	0	0
T197	0	17	0	0
T198	0	14	0	0
T199	0	26	0	0
T200	0	8	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2013	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	47	0	0
T126	0	68	0	0
T128	0	6	0	0
T135	0	40	0	0
T138	0	16	0	0
T196	0	22	0	0
T197	0	24	0	0
T198	0	17	0	0
T199	0	17	0	0
T200	0	7	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2003	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	53	0	0
T126	0	56	0	0
T128	0	4	0	0
T135	0	21	0	0
T138	0	30	0	0
T196	0	22	0	0
T197	0	12	0	0
T198	0	21	0	0
T199	0	40	0	0
T200	0	1	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1865	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	28	0	0
T126	0	68	0	0
T128	0	10	0	0
T135	0	20	0	0
T138	0	29	0	0
T196	0	26	0	0
T197	0	1	0	0
T198	0	25	0	0
T199	0	55	0	0
T200	0	1	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2041	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	39	0	0
T126	0	56	0	0
T128	0	11	0	0
T135	0	29	0	0
T138	0	28	0	0
T196	0	19	0	0
T197	0	25	0	0
T198	0	27	0	0
T199	0	45	0	0
T200	0	8	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2010	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	37	0	0
T126	0	43	0	0
T128	0	11	0	0
T135	0	32	0	0
T138	0	31	0	0
T196	0	25	0	0
T197	0	23	0	0
T198	0	25	0	0
T199	0	24	0	0
T200	0	2	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1939	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	74	0	0
T126	0	37	0	0
T128	0	13	0	0
T135	0	29	0	0
T138	0	36	0	0
T196	0	26	0	0
T197	0	10	0	0
T198	0	20	0	0
T199	0	29	0	0
T200	0	4	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1936	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	69	0	0
T126	0	37	0	0
T128	0	17	0	0
T135	0	19	0	0
T138	0	22	0	0
T196	0	31	0	0
T197	0	20	0	0
T198	0	31	0	0
T199	0	15	0	0
T200	0	9	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2046	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	54	0	0
T126	0	66	0	0
T128	0	18	0	0
T135	0	35	0	0
T138	0	42	0	0
T196	0	35	0	0
T197	0	23	0	0
T198	0	29	0	0
T199	0	46	0	0
T200	0	2	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1919	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	73	0	0
T126	0	64	0	0
T128	0	8	0	0
T135	0	29	0	0
T138	0	21	0	0
T196	0	33	0	0
T197	0	7	0	0
T198	0	24	0	0
T199	0	39	0	0
T200	0	4	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1894	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	33	0	0
T126	0	52	0	0
T128	0	11	0	0
T135	0	39	0	0
T138	0	43	0	0
T196	0	24	0	0
T197	0	8	0	0
T198	0	24	0	0
T199	0	40	0	0
T200	0	4	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1992	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	44	0	0
T126	0	48	0	0
T128	0	7	0	0
T135	0	22	0	0
T138	0	31	0	0
T196	0	16	0	0
T197	0	22	0	0
T198	0	36	0	0
T199	0	40	0	0
T200	0	4	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2215	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	82	0	0
T126	0	83	0	0
T128	0	12	0	0
T135	0	32	0	0
T138	0	16	0	0
T196	0	17	0	0
T197	0	15	0	0
T198	0	14	0	0
T199	0	26	0	0
T200	0	5	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	2033	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	59	0	0
T126	0	63	0	0
T128	0	19	0	0
T135	0	38	0	0
T138	0	25	0	0
T196	0	30	0	0
T197	0	20	0	0
T198	0	26	0	0
T199	0	48	0	0
T200	0	6	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	25512195	1959	0	0
T6	7907	0	0	0
T24	24139	0	0	0
T48	6835	0	0	0
T60	13598	0	0	0
T69	4281	0	0	0
T76	9408	0	0	0
T113	66844	67	0	0
T126	0	40	0	0
T128	0	6	0	0
T135	0	30	0	0
T138	0	11	0	0
T196	0	38	0	0
T197	0	34	0	0
T198	0	27	0	0
T199	0	45	0	0
T200	0	5	0	0
T201	6221	0	0	0
T202	6028	0	0	0
T203	38329	0	0	0