Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	20823410	17928	0	0
attest_sw_binding_0_rd_A	20823410	1617	0	0
attest_sw_binding_1_rd_A	20823410	1617	0	0
attest_sw_binding_2_rd_A	20823410	1631	0	0
attest_sw_binding_3_rd_A	20823410	1607	0	0
attest_sw_binding_4_rd_A	20823410	1544	0	0
attest_sw_binding_5_rd_A	20823410	1635	0	0
attest_sw_binding_6_rd_A	20823410	1618	0	0
attest_sw_binding_7_rd_A	20823410	1605	0	0
intr_enable_rd_A	20823410	2356	0	0
key_version_rd_A	20823410	1556	0	0
max_creator_key_ver_regwen_rd_A	20823410	1679	0	0
max_owner_int_key_ver_regwen_rd_A	20823410	1633	0	0
max_owner_key_ver_regwen_rd_A	20823410	1580	0	0
reseed_interval_regwen_rd_A	20823410	1719	0	0
salt_0_rd_A	20823410	1641	0	0
salt_1_rd_A	20823410	1551	0	0
salt_2_rd_A	20823410	1484	0	0
salt_3_rd_A	20823410	1609	0	0
salt_4_rd_A	20823410	1529	0	0
salt_5_rd_A	20823410	1527	0	0
salt_6_rd_A	20823410	1572	0	0
salt_7_rd_A	20823410	1649	0	0
sealing_sw_binding_0_rd_A	20823410	1570	0	0
sealing_sw_binding_1_rd_A	20823410	1669	0	0
sealing_sw_binding_2_rd_A	20823410	1498	0	0
sealing_sw_binding_3_rd_A	20823410	1687	0	0
sealing_sw_binding_4_rd_A	20823410	1583	0	0
sealing_sw_binding_5_rd_A	20823410	1686	0	0
sealing_sw_binding_6_rd_A	20823410	1641	0	0
sealing_sw_binding_7_rd_A	20823410	1542	0	0
sideload_clear_rd_A	20823410	1483	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	17928	0	0
T6	0	540	0	0
T39	5444	0	0	0
T64	42932	113	0	0
T69	0	370	0	0
T70	0	987	0	0
T78	37706	141	0	0
T79	0	117	0	0
T83	0	400	0	0
T91	0	29	0	0
T92	0	171	0	0
T93	0	182	0	0
T94	68044	0	0	0
T95	9298	0	0	0
T96	4286	0	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1617	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	33	0	0
T79	0	40	0	0
T83	0	52	0	0
T91	0	24	0	0
T93	0	70	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	36	0	0
T169	0	28	0	0
T170	0	22	0	0
T171	0	38	0	0
T172	0	27	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1617	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	35	0	0
T79	0	67	0	0
T83	0	88	0	0
T91	0	46	0	0
T93	0	66	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	29	0	0
T169	0	25	0	0
T170	0	14	0	0
T171	0	39	0	0
T172	0	47	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1631	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	25	0	0
T79	0	57	0	0
T83	0	101	0	0
T91	0	31	0	0
T93	0	44	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	26	0	0
T169	0	38	0	0
T170	0	10	0	0
T171	0	27	0	0
T172	0	58	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1607	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	30	0	0
T79	0	72	0	0
T83	0	85	0	0
T91	0	24	0	0
T93	0	55	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	22	0	0
T169	0	35	0	0
T170	0	13	0	0
T171	0	27	0	0
T172	0	40	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1544	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	28	0	0
T79	0	29	0	0
T83	0	94	0	0
T91	0	44	0	0
T93	0	73	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	17	0	0
T169	0	28	0	0
T170	0	1	0	0
T171	0	24	0	0
T172	0	31	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1635	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T72	0	3	0	0
T78	37706	25	0	0
T79	0	55	0	0
T83	0	39	0	0
T91	0	36	0	0
T93	0	57	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	13	0	0
T169	0	44	0	0
T170	0	11	0	0
T171	0	34	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1618	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	32	0	0
T79	0	58	0	0
T83	0	55	0	0
T91	0	33	0	0
T93	0	53	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	31	0	0
T169	0	27	0	0
T170	0	28	0	0
T171	0	28	0	0
T172	0	26	0	0
T173	1301	0	0	0
T174	12957	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1605	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	27	0	0
T79	0	92	0	0
T83	0	68	0	0
T91	0	31	0	0
T93	0	46	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	19	0	0
T169	0	26	0	0
T170	0	7	0	0
T171	0	27	0	0
T172	0	29	0	0
T173	1301	0	0	0
T174	12957	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	2356	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	75	0	0
T79	0	64	0	0
T83	0	59	0	0
T91	0	29	0	0
T93	0	144	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T137	0	24	0	0
T168	0	39	0	0
T173	1301	0	0	0
T174	12957	0	0	0
T175	0	63	0	0
T176	0	25	0	0
T177	0	7	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1556	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	28	0	0
T79	0	47	0	0
T83	0	43	0	0
T91	0	26	0	0
T93	0	56	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	19	0	0
T169	0	39	0	0
T170	0	7	0	0
T171	0	13	0	0
T172	0	42	0	0
T173	1301	0	0	0
T174	12957	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1679	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	37	0	0
T79	0	99	0	0
T83	0	68	0	0
T91	0	22	0	0
T93	0	59	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	19	0	0
T169	0	11	0	0
T170	0	24	0	0
T171	0	26	0	0
T172	0	55	0	0
T173	1301	0	0	0
T174	12957	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1633	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	25	0	0
T79	0	82	0	0
T83	0	69	0	0
T91	0	17	0	0
T93	0	60	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	30	0	0
T169	0	34	0	0
T170	0	18	0	0
T171	0	32	0	0
T172	0	28	0	0
T173	1301	0	0	0
T174	12957	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1580	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	51	0	0
T79	0	74	0	0
T83	0	92	0	0
T91	0	25	0	0
T93	0	54	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	20	0	0
T169	0	21	0	0
T170	0	9	0	0
T171	0	32	0	0
T172	0	21	0	0
T173	1301	0	0	0
T174	12957	0	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1719	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	47	0	0
T79	0	40	0	0
T83	0	69	0	0
T91	0	19	0	0
T93	0	82	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	24	0	0
T169	0	37	0	0
T170	0	28	0	0
T171	0	29	0	0
T172	0	37	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1641	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	24	0	0
T79	0	96	0	0
T83	0	74	0	0
T91	0	33	0	0
T93	0	60	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	21	0	0
T169	0	37	0	0
T170	0	16	0	0
T171	0	29	0	0
T172	0	23	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1551	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	42	0	0
T79	0	76	0	0
T83	0	43	0	0
T91	0	23	0	0
T93	0	56	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	27	0	0
T169	0	32	0	0
T170	0	4	0	0
T171	0	23	0	0
T172	0	26	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1484	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	33	0	0
T79	0	45	0	0
T83	0	58	0	0
T91	0	20	0	0
T93	0	44	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	17	0	0
T169	0	29	0	0
T170	0	4	0	0
T171	0	33	0	0
T172	0	22	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1609	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	23	0	0
T79	0	70	0	0
T83	0	62	0	0
T91	0	31	0	0
T93	0	80	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	26	0	0
T169	0	21	0	0
T170	0	22	0	0
T171	0	47	0	0
T172	0	39	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1529	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	20	0	0
T79	0	30	0	0
T83	0	52	0	0
T91	0	20	0	0
T93	0	46	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	28	0	0
T169	0	20	0	0
T170	0	25	0	0
T171	0	21	0	0
T172	0	56	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1527	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	8	0	0
T79	0	56	0	0
T83	0	74	0	0
T91	0	44	0	0
T93	0	41	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	36	0	0
T169	0	29	0	0
T170	0	14	0	0
T171	0	49	0	0
T172	0	40	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1572	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	17	0	0
T79	0	42	0	0
T83	0	41	0	0
T91	0	26	0	0
T93	0	51	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	12	0	0
T169	0	21	0	0
T170	0	1	0	0
T171	0	46	0	0
T172	0	41	0	0
T173	1301	0	0	0
T174	12957	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1649	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	44	0	0
T79	0	87	0	0
T83	0	41	0	0
T91	0	25	0	0
T93	0	82	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	22	0	0
T169	0	14	0	0
T170	0	9	0	0
T171	0	13	0	0
T172	0	65	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1570	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	28	0	0
T79	0	39	0	0
T83	0	40	0	0
T91	0	32	0	0
T93	0	63	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	34	0	0
T169	0	31	0	0
T170	0	17	0	0
T171	0	30	0	0
T172	0	33	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1669	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	35	0	0
T79	0	61	0	0
T83	0	103	0	0
T91	0	30	0	0
T93	0	55	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	21	0	0
T169	0	35	0	0
T170	0	4	0	0
T171	0	40	0	0
T173	1301	0	0	0
T174	12957	0	0	0
T178	0	2	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1498	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	14	0	0
T79	0	45	0	0
T83	0	41	0	0
T91	0	35	0	0
T93	0	61	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	29	0	0
T169	0	38	0	0
T170	0	53	0	0
T171	0	34	0	0
T172	0	58	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1687	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	39	0	0
T79	0	66	0	0
T83	0	54	0	0
T91	0	24	0	0
T93	0	51	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	30	0	0
T169	0	26	0	0
T170	0	4	0	0
T171	0	31	0	0
T172	0	42	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1583	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	25	0	0
T79	0	62	0	0
T83	0	73	0	0
T91	0	34	0	0
T93	0	63	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	26	0	0
T169	0	32	0	0
T170	0	6	0	0
T171	0	23	0	0
T172	0	34	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1686	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	54	0	0
T79	0	52	0	0
T83	0	83	0	0
T91	0	20	0	0
T93	0	67	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	15	0	0
T169	0	14	0	0
T170	0	25	0	0
T171	0	35	0	0
T172	0	57	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1641	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	43	0	0
T79	0	63	0	0
T83	0	70	0	0
T91	0	49	0	0
T93	0	48	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	20	0	0
T169	0	40	0	0
T170	0	19	0	0
T171	0	30	0	0
T172	0	50	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1542	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	23	0	0
T79	0	43	0	0
T83	0	80	0	0
T91	0	30	0	0
T93	0	38	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	22	0	0
T169	0	28	0	0
T170	0	10	0	0
T171	0	31	0	0
T172	0	40	0	0
T173	1301	0	0	0
T174	12957	0	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	20823410	1483	0	0
T20	2933	0	0	0
T44	29385	0	0	0
T50	21622	0	0	0
T78	37706	44	0	0
T79	0	66	0	0
T83	0	43	0	0
T91	0	37	0	0
T93	0	55	0	0
T97	2436	0	0	0
T98	13163	0	0	0
T99	8434	0	0	0
T100	5625	0	0	0
T168	0	15	0	0
T169	0	44	0	0
T170	0	12	0	0
T171	0	23	0	0
T172	0	28	0	0
T173	1301	0	0	0
T174	12957	0	0	0