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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.77 99.04 98.11 98.39 100.00 99.02 98.63 91.22


Total test records in report: 1067
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T810 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/33.keymgr_sideload.3207436078 Sep 01 01:33:42 PM UTC 24 Sep 01 01:34:33 PM UTC 24 1683593591 ps
T811 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/40.keymgr_sideload_otbn.3605852824 Sep 01 01:34:13 PM UTC 24 Sep 01 01:34:33 PM UTC 24 702327829 ps
T812 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_kmac_rsp_err.3274854680 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:34 PM UTC 24 102834393 ps
T813 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_cfg_regwen.1011818781 Sep 01 01:34:30 PM UTC 24 Sep 01 01:34:34 PM UTC 24 278233829 ps
T814 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/43.keymgr_hwsw_invalid_input.896349084 Sep 01 01:34:25 PM UTC 24 Sep 01 01:34:34 PM UTC 24 985225114 ps
T815 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_protect.3498864377 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:34 PM UTC 24 361323357 ps
T816 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_random.153460243 Sep 01 01:34:26 PM UTC 24 Sep 01 01:34:34 PM UTC 24 341832686 ps
T817 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_aes.1803037251 Sep 01 01:34:30 PM UTC 24 Sep 01 01:34:34 PM UTC 24 492053362 ps
T818 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_hwsw_invalid_input.3334335116 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:34 PM UTC 24 495412674 ps
T819 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_protect.1607934800 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:35 PM UTC 24 597752401 ps
T820 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_sw_invalid_input.2143286291 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:35 PM UTC 24 2129101215 ps
T821 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_lc_disable.2123588486 Sep 01 01:34:30 PM UTC 24 Sep 01 01:34:35 PM UTC 24 67699036 ps
T822 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_smoke.525636137 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:35 PM UTC 24 265583258 ps
T823 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_otbn.1438030590 Sep 01 01:34:30 PM UTC 24 Sep 01 01:34:35 PM UTC 24 73548759 ps
T824 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_random.2926519288 Sep 01 01:34:30 PM UTC 24 Sep 01 01:34:35 PM UTC 24 93134407 ps
T825 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_sw_invalid_input.802995271 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:35 PM UTC 24 217187489 ps
T826 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/28.keymgr_stress_all.168636426 Sep 01 01:32:58 PM UTC 24 Sep 01 01:34:36 PM UTC 24 4407136607 ps
T395 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_kmac_rsp_err.2923512519 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:36 PM UTC 24 348180729 ps
T827 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_sync_async_fault_cross.2454674637 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:36 PM UTC 24 383886298 ps
T828 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_kmac.2494242100 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:36 PM UTC 24 238650726 ps
T439 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/42.keymgr_cfg_regwen.4161452921 Sep 01 01:34:19 PM UTC 24 Sep 01 01:34:36 PM UTC 24 318193072 ps
T829 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_sideload.1138912481 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:36 PM UTC 24 179903138 ps
T830 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_alert_test.1831907929 Sep 01 01:34:34 PM UTC 24 Sep 01 01:34:36 PM UTC 24 24521971 ps
T831 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_otbn.3732828123 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:37 PM UTC 24 221140084 ps
T230 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_lc_disable.2970548721 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:37 PM UTC 24 94460179 ps
T832 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_kmac_rsp_err.1076726824 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:37 PM UTC 24 129192344 ps
T833 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_sync_async_fault_cross.1608601371 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:37 PM UTC 24 60523210 ps
T834 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/13.keymgr_stress_all.3144034823 Sep 01 01:32:14 PM UTC 24 Sep 01 01:34:37 PM UTC 24 22448573334 ps
T835 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_smoke.345893722 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:37 PM UTC 24 156093491 ps
T836 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_custom_cm.3648499011 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:37 PM UTC 24 1590350135 ps
T837 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_direct_to_disabled.817465898 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:37 PM UTC 24 222342034 ps
T416 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_hwsw_invalid_input.2323854144 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:37 PM UTC 24 184626918 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/42.keymgr_stress_all_with_rand_reset.4054749683 Sep 01 01:34:21 PM UTC 24 Sep 01 01:34:37 PM UTC 24 2049232986 ps
T838 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_smoke.3423300691 Sep 01 01:34:34 PM UTC 24 Sep 01 01:34:38 PM UTC 24 143133776 ps
T839 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_protect.1302719305 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:38 PM UTC 24 95957658 ps
T244 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_custom_cm.3106826291 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:38 PM UTC 24 66979379 ps
T840 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_kmac.3259256171 Sep 01 01:34:35 PM UTC 24 Sep 01 01:34:39 PM UTC 24 82033520 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_hwsw_invalid_input.697636338 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:39 PM UTC 24 1147955742 ps
T237 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all_with_rand_reset.2602632613 Sep 01 01:34:19 PM UTC 24 Sep 01 01:34:39 PM UTC 24 2050932834 ps
T841 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_random.2729847132 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:40 PM UTC 24 148616570 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_sync_async_fault_cross.2833410140 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:40 PM UTC 24 109703361 ps
T842 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_custom_cm.3985558864 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:40 PM UTC 24 242128662 ps
T843 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/37.keymgr_random.1333455447 Sep 01 01:34:04 PM UTC 24 Sep 01 01:34:40 PM UTC 24 4517603663 ps
T844 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_aes.1589821425 Sep 01 01:34:33 PM UTC 24 Sep 01 01:34:40 PM UTC 24 297838346 ps
T845 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_lc_disable.2471480275 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:40 PM UTC 24 144176195 ps
T846 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_kmac_rsp_err.2283106927 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:40 PM UTC 24 237238664 ps
T847 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_hwsw_invalid_input.3095681060 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:40 PM UTC 24 2071183900 ps
T848 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_alert_test.4013385637 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:40 PM UTC 24 104267207 ps
T849 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_direct_to_disabled.1231775884 Sep 01 01:34:30 PM UTC 24 Sep 01 01:34:40 PM UTC 24 362298307 ps
T850 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_protect.1172849060 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:41 PM UTC 24 121388506 ps
T851 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_direct_to_disabled.501095469 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:41 PM UTC 24 489092263 ps
T852 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_smoke.2409252686 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:42 PM UTC 24 216440848 ps
T853 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sync_async_fault_cross.2204982040 Sep 01 01:34:39 PM UTC 24 Sep 01 01:34:42 PM UTC 24 181559513 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_cfg_regwen.3481526299 Sep 01 01:34:36 PM UTC 24 Sep 01 01:34:43 PM UTC 24 497636139 ps
T854 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_protect.2699748321 Sep 01 01:34:39 PM UTC 24 Sep 01 01:34:43 PM UTC 24 118660769 ps
T855 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sideload.2600513715 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:43 PM UTC 24 1093913852 ps
T235 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/33.keymgr_stress_all.3081039739 Sep 01 01:33:56 PM UTC 24 Sep 01 01:34:43 PM UTC 24 2292994572 ps
T856 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/43.keymgr_sideload_aes.2489498592 Sep 01 01:34:22 PM UTC 24 Sep 01 01:34:43 PM UTC 24 1557035526 ps
T857 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_otbn.1138730084 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:43 PM UTC 24 35974627 ps
T858 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_sideload.2082516726 Sep 01 01:34:34 PM UTC 24 Sep 01 01:34:44 PM UTC 24 817842236 ps
T859 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_kmac_rsp_err.2423993140 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:44 PM UTC 24 140743768 ps
T860 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sideload.641048030 Sep 01 01:34:40 PM UTC 24 Sep 01 01:34:44 PM UTC 24 63665785 ps
T861 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_custom_cm.3026686948 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:44 PM UTC 24 2328368859 ps
T862 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_alert_test.2547488763 Sep 01 01:34:39 PM UTC 24 Sep 01 01:34:44 PM UTC 24 64609575 ps
T863 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all_with_rand_reset.2476312599 Sep 01 01:34:28 PM UTC 24 Sep 01 01:34:44 PM UTC 24 390508752 ps
T864 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_aes.4210090860 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:44 PM UTC 24 166208139 ps
T415 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_hwsw_invalid_input.2210320497 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:44 PM UTC 24 163336898 ps
T865 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_direct_to_disabled.2406769171 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:45 PM UTC 24 288808967 ps
T866 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_otbn.1784721451 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:45 PM UTC 24 215257616 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_cfg_regwen.777841622 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:45 PM UTC 24 35532155 ps
T867 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_lc_disable.1165828127 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:45 PM UTC 24 155638133 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_hwsw_invalid_input.2032311780 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:45 PM UTC 24 79968390 ps
T868 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_direct_to_disabled.2040313193 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:45 PM UTC 24 132939580 ps
T869 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_cfg_regwen.2009106526 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:46 PM UTC 24 55120417 ps
T870 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/42.keymgr_stress_all.2641577901 Sep 01 01:34:21 PM UTC 24 Sep 01 01:34:46 PM UTC 24 1369747924 ps
T871 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_kmac.3028587035 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:47 PM UTC 24 2067038631 ps
T872 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/42.keymgr_sideload.627790946 Sep 01 01:34:19 PM UTC 24 Sep 01 01:34:47 PM UTC 24 948732691 ps
T873 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_kmac_rsp_err.1338611167 Sep 01 01:34:42 PM UTC 24 Sep 01 01:34:47 PM UTC 24 709004516 ps
T874 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_custom_cm.3349399015 Sep 01 01:34:42 PM UTC 24 Sep 01 01:34:47 PM UTC 24 256118219 ps
T875 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sw_invalid_input.1559041225 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:48 PM UTC 24 373287149 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_protect.3095948166 Sep 01 01:34:43 PM UTC 24 Sep 01 01:34:48 PM UTC 24 256545212 ps
T876 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/39.keymgr_stress_all.2035796847 Sep 01 01:34:11 PM UTC 24 Sep 01 01:34:48 PM UTC 24 14055168416 ps
T877 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_alert_test.3688764746 Sep 01 01:34:43 PM UTC 24 Sep 01 01:34:48 PM UTC 24 15840821 ps
T878 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_random.2493185896 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:48 PM UTC 24 491611049 ps
T879 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/42.keymgr_sw_invalid_input.3156326479 Sep 01 01:34:20 PM UTC 24 Sep 01 01:34:49 PM UTC 24 1243728361 ps
T880 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_random.4150869240 Sep 01 01:34:41 PM UTC 24 Sep 01 01:34:49 PM UTC 24 330627756 ps
T881 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_otbn.475310033 Sep 01 01:34:35 PM UTC 24 Sep 01 01:34:50 PM UTC 24 502680700 ps
T882 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sync_async_fault_cross.3672686266 Sep 01 01:34:43 PM UTC 24 Sep 01 01:34:50 PM UTC 24 392728751 ps
T883 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_stress_all.1618376843 Sep 01 01:34:31 PM UTC 24 Sep 01 01:34:50 PM UTC 24 398479285 ps
T884 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_custom_cm.3295849324 Sep 01 01:34:39 PM UTC 24 Sep 01 01:34:51 PM UTC 24 1443834619 ps
T885 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sw_invalid_input.1672487693 Sep 01 01:34:38 PM UTC 24 Sep 01 01:34:52 PM UTC 24 468337301 ps
T886 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all_with_rand_reset.181982223 Sep 01 01:34:39 PM UTC 24 Sep 01 01:34:53 PM UTC 24 545598173 ps
T887 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_kmac.2582597028 Sep 01 01:34:30 PM UTC 24 Sep 01 01:35:00 PM UTC 24 1773807920 ps
T888 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_sw_invalid_input.2345269721 Sep 01 01:34:36 PM UTC 24 Sep 01 01:35:04 PM UTC 24 2548495472 ps
T889 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_aes.854329429 Sep 01 01:34:38 PM UTC 24 Sep 01 01:35:06 PM UTC 24 2766882319 ps
T890 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_smoke.3980568583 Sep 01 01:34:40 PM UTC 24 Sep 01 01:35:06 PM UTC 24 3223542109 ps
T891 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all_with_rand_reset.937943165 Sep 01 01:34:43 PM UTC 24 Sep 01 01:35:08 PM UTC 24 497253670 ps
T248 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_stress_all.2763019625 Sep 01 01:34:36 PM UTC 24 Sep 01 01:35:11 PM UTC 24 5134212890 ps
T892 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_kmac.3584179203 Sep 01 01:34:40 PM UTC 24 Sep 01 01:35:15 PM UTC 24 5914372614 ps
T893 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_cfg_regwen.3560911318 Sep 01 01:34:33 PM UTC 24 Sep 01 01:35:18 PM UTC 24 4762472244 ps
T894 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/42.keymgr_sideload_aes.2011141480 Sep 01 01:34:19 PM UTC 24 Sep 01 01:35:23 PM UTC 24 7097424785 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all.855303245 Sep 01 01:34:39 PM UTC 24 Sep 01 01:35:26 PM UTC 24 2685682527 ps
T895 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all.3973494341 Sep 01 01:34:19 PM UTC 24 Sep 01 01:35:27 PM UTC 24 5618053577 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/46.keymgr_stress_all.2232834312 Sep 01 01:34:34 PM UTC 24 Sep 01 01:35:29 PM UTC 24 8600149732 ps
T896 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/43.keymgr_sw_invalid_input.4184730473 Sep 01 01:34:24 PM UTC 24 Sep 01 01:35:32 PM UTC 24 4599892041 ps
T897 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/37.keymgr_stress_all.4270184014 Sep 01 01:34:06 PM UTC 24 Sep 01 01:35:39 PM UTC 24 7927232062 ps
T386 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/16.keymgr_stress_all.2758387165 Sep 01 01:32:23 PM UTC 24 Sep 01 01:35:42 PM UTC 24 29676801348 ps
T898 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/47.keymgr_random.395224753 Sep 01 01:34:36 PM UTC 24 Sep 01 01:35:43 PM UTC 24 8505306703 ps
T382 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/43.keymgr_cfg_regwen.3070887863 Sep 01 01:34:24 PM UTC 24 Sep 01 01:35:45 PM UTC 24 1810039137 ps
T899 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all.2081952133 Sep 01 01:34:28 PM UTC 24 Sep 01 01:35:53 PM UTC 24 20261230484 ps
T900 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all.138230125 Sep 01 01:34:43 PM UTC 24 Sep 01 01:36:16 PM UTC 24 8200770189 ps
T901 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/default/35.keymgr_stress_all.195012055 Sep 01 01:33:59 PM UTC 24 Sep 01 01:37:40 PM UTC 24 81118454299 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors.3704537713 Sep 01 12:27:02 PM UTC 24 Sep 01 12:27:06 PM UTC 24 171063536 ps
T902 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_intr_test.2157649552 Sep 01 12:27:05 PM UTC 24 Sep 01 12:27:07 PM UTC 24 11478968 ps
T903 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_errors.721529283 Sep 01 12:27:03 PM UTC 24 Sep 01 12:27:09 PM UTC 24 89650594 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_hw_reset.598015965 Sep 01 12:27:07 PM UTC 24 Sep 01 12:27:10 PM UTC 24 30355876 ps
T118 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_rw.660257428 Sep 01 12:27:08 PM UTC 24 Sep 01 12:27:11 PM UTC 24 25293534 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_intg_err.3431664950 Sep 01 12:27:03 PM UTC 24 Sep 01 12:27:13 PM UTC 24 514053222 ps
T422 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_mem_rw_with_rand_reset.1555055758 Sep 01 12:27:12 PM UTC 24 Sep 01 12:27:16 PM UTC 24 38994443 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors_with_csr_rw.2958513420 Sep 01 12:27:02 PM UTC 24 Sep 01 12:27:16 PM UTC 24 380378369 ps
T119 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_aliasing.327339609 Sep 01 12:27:09 PM UTC 24 Sep 01 12:27:16 PM UTC 24 189338293 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_same_csr_outstanding.1383177776 Sep 01 12:27:11 PM UTC 24 Sep 01 12:27:18 PM UTC 24 1523402218 ps
T904 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_errors.2587310851 Sep 01 12:27:13 PM UTC 24 Sep 01 12:27:18 PM UTC 24 86931733 ps
T905 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_intr_test.3847706038 Sep 01 12:27:16 PM UTC 24 Sep 01 12:27:18 PM UTC 24 22291708 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors.4155341273 Sep 01 12:27:13 PM UTC 24 Sep 01 12:27:19 PM UTC 24 293270966 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors_with_csr_rw.631857772 Sep 01 12:27:13 PM UTC 24 Sep 01 12:27:19 PM UTC 24 293690763 ps
T906 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_hw_reset.1617651228 Sep 01 12:27:17 PM UTC 24 Sep 01 12:27:20 PM UTC 24 55796413 ps
T121 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_rw.2253912322 Sep 01 12:27:19 PM UTC 24 Sep 01 12:27:21 PM UTC 24 19881706 ps
T197 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_mem_rw_with_rand_reset.2846587612 Sep 01 12:27:20 PM UTC 24 Sep 01 12:27:24 PM UTC 24 203713827 ps
T122 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_same_csr_outstanding.2477450558 Sep 01 12:27:20 PM UTC 24 Sep 01 12:27:24 PM UTC 24 168072303 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_intg_err.496119455 Sep 01 12:27:16 PM UTC 24 Sep 01 12:27:27 PM UTC 24 263734958 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors.1400480999 Sep 01 12:27:21 PM UTC 24 Sep 01 12:27:27 PM UTC 24 279637443 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors_with_csr_rw.1864127977 Sep 01 12:27:22 PM UTC 24 Sep 01 12:27:28 PM UTC 24 76793000 ps
T907 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_intr_test.1335350253 Sep 01 12:27:26 PM UTC 24 Sep 01 12:27:28 PM UTC 24 45617513 ps
T908 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_errors.3521671416 Sep 01 12:27:24 PM UTC 24 Sep 01 12:27:29 PM UTC 24 63968859 ps
T909 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_bit_bash.4189730112 Sep 01 12:27:08 PM UTC 24 Sep 01 12:27:29 PM UTC 24 253617858 ps
T910 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_hw_reset.1655993961 Sep 01 12:27:27 PM UTC 24 Sep 01 12:27:30 PM UTC 24 48052828 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_rw.2719277828 Sep 01 12:27:29 PM UTC 24 Sep 01 12:27:31 PM UTC 24 29221811 ps
T911 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_aliasing.3488706895 Sep 01 12:27:20 PM UTC 24 Sep 01 12:27:32 PM UTC 24 530145370 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_same_csr_outstanding.3279357533 Sep 01 12:27:30 PM UTC 24 Sep 01 12:27:34 PM UTC 24 121696176 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors.44048492 Sep 01 12:27:31 PM UTC 24 Sep 01 12:27:34 PM UTC 24 101973512 ps
T912 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_mem_rw_with_rand_reset.1850046411 Sep 01 12:27:31 PM UTC 24 Sep 01 12:27:34 PM UTC 24 77412724 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_intg_err.3296638110 Sep 01 12:27:25 PM UTC 24 Sep 01 12:27:36 PM UTC 24 265832276 ps
T913 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_intr_test.3343143155 Sep 01 12:27:34 PM UTC 24 Sep 01 12:27:37 PM UTC 24 46516948 ps
T914 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_hw_reset.2193052792 Sep 01 12:27:34 PM UTC 24 Sep 01 12:27:37 PM UTC 24 65456589 ps
T915 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_errors.850398539 Sep 01 12:27:33 PM UTC 24 Sep 01 12:27:38 PM UTC 24 207212976 ps
T916 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_rw.1440559521 Sep 01 12:27:35 PM UTC 24 Sep 01 12:27:39 PM UTC 24 29451725 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors_with_csr_rw.997243696 Sep 01 12:27:32 PM UTC 24 Sep 01 12:27:39 PM UTC 24 1398942333 ps
T917 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_aliasing.3309440610 Sep 01 12:27:30 PM UTC 24 Sep 01 12:27:39 PM UTC 24 900711524 ps
T918 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_bit_bash.4161552429 Sep 01 12:27:19 PM UTC 24 Sep 01 12:27:40 PM UTC 24 1038391344 ps
T919 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_same_csr_outstanding.2833001993 Sep 01 12:27:38 PM UTC 24 Sep 01 12:27:42 PM UTC 24 47816424 ps
T418 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_intg_err.485854209 Sep 01 12:27:34 PM UTC 24 Sep 01 12:27:42 PM UTC 24 220234686 ps
T920 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_mem_rw_with_rand_reset.4282726514 Sep 01 12:27:38 PM UTC 24 Sep 01 12:27:42 PM UTC 24 55471711 ps
T921 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_intr_test.1219159755 Sep 01 12:27:41 PM UTC 24 Sep 01 12:27:43 PM UTC 24 26233719 ps
T922 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_hw_reset.3702991841 Sep 01 12:27:41 PM UTC 24 Sep 01 12:27:44 PM UTC 24 118126244 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors.3268797356 Sep 01 12:27:39 PM UTC 24 Sep 01 12:27:44 PM UTC 24 313576255 ps
T923 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_errors.263826034 Sep 01 12:27:39 PM UTC 24 Sep 01 12:27:44 PM UTC 24 85858574 ps
T924 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_rw.664759986 Sep 01 12:27:43 PM UTC 24 Sep 01 12:27:46 PM UTC 24 151660707 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors.561552036 Sep 01 12:27:45 PM UTC 24 Sep 01 12:27:49 PM UTC 24 131972846 ps
T925 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_bit_bash.50152210 Sep 01 12:27:37 PM UTC 24 Sep 01 12:27:49 PM UTC 24 1723745607 ps
T926 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_aliasing.3150106790 Sep 01 12:27:38 PM UTC 24 Sep 01 12:27:49 PM UTC 24 127904874 ps
T927 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_mem_rw_with_rand_reset.3117637561 Sep 01 12:27:45 PM UTC 24 Sep 01 12:27:49 PM UTC 24 155750197 ps
T928 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_errors.771041929 Sep 01 12:27:47 PM UTC 24 Sep 01 12:27:50 PM UTC 24 126943026 ps
T929 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors_with_csr_rw.3488695198 Sep 01 12:27:39 PM UTC 24 Sep 01 12:27:51 PM UTC 24 298873984 ps
T930 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_same_csr_outstanding.2760261303 Sep 01 12:27:44 PM UTC 24 Sep 01 12:27:51 PM UTC 24 152024088 ps
T931 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_intr_test.2615154067 Sep 01 12:27:49 PM UTC 24 Sep 01 12:27:51 PM UTC 24 10316805 ps
T932 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_rw.4092627423 Sep 01 12:27:50 PM UTC 24 Sep 01 12:27:53 PM UTC 24 13468185 ps
T933 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_same_csr_outstanding.1951834013 Sep 01 12:27:50 PM UTC 24 Sep 01 12:27:53 PM UTC 24 22456161 ps
T419 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_intg_err.4220893418 Sep 01 12:27:40 PM UTC 24 Sep 01 12:27:54 PM UTC 24 225254414 ps
T934 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_mem_rw_with_rand_reset.560270256 Sep 01 12:27:52 PM UTC 24 Sep 01 12:27:55 PM UTC 24 31609356 ps
T935 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors_with_csr_rw.996821958 Sep 01 12:27:45 PM UTC 24 Sep 01 12:27:55 PM UTC 24 228382464 ps
T936 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_intr_test.2313281416 Sep 01 12:27:53 PM UTC 24 Sep 01 12:27:55 PM UTC 24 38946681 ps
T165 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_intg_err.3563243473 Sep 01 12:27:49 PM UTC 24 Sep 01 12:27:56 PM UTC 24 264822648 ps
T937 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_rw.3474182251 Sep 01 12:27:54 PM UTC 24 Sep 01 12:27:57 PM UTC 24 27547369 ps
T938 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_aliasing.2722010108 Sep 01 12:27:44 PM UTC 24 Sep 01 12:27:57 PM UTC 24 262840827 ps
T939 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_errors.121932501 Sep 01 12:27:52 PM UTC 24 Sep 01 12:27:57 PM UTC 24 1798462949 ps
T940 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors.803239191 Sep 01 12:27:52 PM UTC 24 Sep 01 12:27:58 PM UTC 24 133151045 ps
T941 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_bit_bash.1207892811 Sep 01 12:27:43 PM UTC 24 Sep 01 12:27:59 PM UTC 24 2482573606 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors.24616384 Sep 01 12:27:56 PM UTC 24 Sep 01 12:28:00 PM UTC 24 75636085 ps
T942 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_intr_test.351986061 Sep 01 12:27:58 PM UTC 24 Sep 01 12:28:00 PM UTC 24 28661991 ps
T943 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_mem_rw_with_rand_reset.1378290298 Sep 01 12:27:56 PM UTC 24 Sep 01 12:28:00 PM UTC 24 42762369 ps
T166 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_intg_err.1522327161 Sep 01 12:27:52 PM UTC 24 Sep 01 12:28:00 PM UTC 24 183012174 ps
T944 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_rw.2414287113 Sep 01 12:27:58 PM UTC 24 Sep 01 12:28:00 PM UTC 24 28641838 ps
T945 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_same_csr_outstanding.322076904 Sep 01 12:27:55 PM UTC 24 Sep 01 12:28:02 PM UTC 24 360902311 ps
T946 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors_with_csr_rw.3704746743 Sep 01 12:27:56 PM UTC 24 Sep 01 12:28:03 PM UTC 24 276457663 ps
T947 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_mem_rw_with_rand_reset.3602948926 Sep 01 12:28:00 PM UTC 24 Sep 01 12:28:03 PM UTC 24 44617217 ps
T948 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_intr_test.1991940834 Sep 01 12:28:01 PM UTC 24 Sep 01 12:28:03 PM UTC 24 9919738 ps
T949 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors.3409724758 Sep 01 12:28:00 PM UTC 24 Sep 01 12:28:04 PM UTC 24 95278578 ps
T950 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors_with_csr_rw.488875151 Sep 01 12:27:52 PM UTC 24 Sep 01 12:28:04 PM UTC 24 160968274 ps
T951 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_same_csr_outstanding.2595720620 Sep 01 12:27:59 PM UTC 24 Sep 01 12:28:05 PM UTC 24 85344450 ps
T952 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_errors.1662459533 Sep 01 12:28:01 PM UTC 24 Sep 01 12:28:05 PM UTC 24 60983572 ps
T953 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_bit_bash.451211071 Sep 01 12:27:29 PM UTC 24 Sep 01 12:28:06 PM UTC 24 898509284 ps
T954 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_errors.3240815357 Sep 01 12:27:57 PM UTC 24 Sep 01 12:28:06 PM UTC 24 538800183 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_intg_err.1652513505 Sep 01 12:27:58 PM UTC 24 Sep 01 12:28:06 PM UTC 24 328835452 ps
T955 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_rw.3736894148 Sep 01 12:28:03 PM UTC 24 Sep 01 12:28:06 PM UTC 24 46515785 ps
T956 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_mem_rw_with_rand_reset.2724926705 Sep 01 12:28:05 PM UTC 24 Sep 01 12:28:07 PM UTC 24 26073322 ps
T957 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_intr_test.2763142277 Sep 01 12:28:06 PM UTC 24 Sep 01 12:28:08 PM UTC 24 23995385 ps
T958 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_rw.85854483 Sep 01 12:28:06 PM UTC 24 Sep 01 12:28:08 PM UTC 24 17657197 ps
T959 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors_with_csr_rw.3556512863 Sep 01 12:28:01 PM UTC 24 Sep 01 12:28:08 PM UTC 24 294108443 ps
T960 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_same_csr_outstanding.1890688204 Sep 01 12:28:05 PM UTC 24 Sep 01 12:28:09 PM UTC 24 34119678 ps
T961 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors.2334484171 Sep 01 12:28:05 PM UTC 24 Sep 01 12:28:09 PM UTC 24 346482776 ps
T962 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_same_csr_outstanding.4183687692 Sep 01 12:28:06 PM UTC 24 Sep 01 12:28:09 PM UTC 24 71281179 ps
T963 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_mem_rw_with_rand_reset.1878108601 Sep 01 12:28:06 PM UTC 24 Sep 01 12:28:10 PM UTC 24 573312981 ps
T964 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_errors.3760218857 Sep 01 12:28:08 PM UTC 24 Sep 01 12:28:11 PM UTC 24 295887614 ps
T965 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_intr_test.2896372457 Sep 01 12:28:09 PM UTC 24 Sep 01 12:28:11 PM UTC 24 161312715 ps
T966 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_rw.2378357810 Sep 01 12:28:09 PM UTC 24 Sep 01 12:28:11 PM UTC 24 40804426 ps
T967 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors.1935373884 Sep 01 12:28:07 PM UTC 24 Sep 01 12:28:12 PM UTC 24 94581742 ps
T968 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_errors.2996977344 Sep 01 12:28:05 PM UTC 24 Sep 01 12:28:13 PM UTC 24 234801358 ps
T969 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_mem_rw_with_rand_reset.2641301549 Sep 01 12:28:10 PM UTC 24 Sep 01 12:28:13 PM UTC 24 19619671 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_intg_err.718841469 Sep 01 12:28:01 PM UTC 24 Sep 01 12:28:13 PM UTC 24 381769599 ps
T970 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_same_csr_outstanding.3992581936 Sep 01 12:28:10 PM UTC 24 Sep 01 12:28:14 PM UTC 24 843223773 ps
T971 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_tl_errors.1207584496 Sep 01 12:28:11 PM UTC 24 Sep 01 12:28:14 PM UTC 24 142041142 ps
T972 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_intg_err.1302501334 Sep 01 12:28:08 PM UTC 24 Sep 01 12:28:14 PM UTC 24 235308689 ps
T973 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_intr_test.2372022832 Sep 01 12:28:12 PM UTC 24 Sep 01 12:28:15 PM UTC 24 13541442 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_intg_err.3433443014 Sep 01 12:28:05 PM UTC 24 Sep 01 12:28:15 PM UTC 24 3026015841 ps
T974 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors.945111025 Sep 01 12:28:10 PM UTC 24 Sep 01 12:28:16 PM UTC 24 897919019 ps
T975 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_rw.1865111187 Sep 01 12:28:12 PM UTC 24 Sep 01 12:28:16 PM UTC 24 48792561 ps
T976 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors_with_csr_rw.3889642703 Sep 01 12:28:05 PM UTC 24 Sep 01 12:28:17 PM UTC 24 159211839 ps
T977 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_same_csr_outstanding.1539220088 Sep 01 12:28:12 PM UTC 24 Sep 01 12:28:17 PM UTC 24 1084347532 ps
T978 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_mem_rw_with_rand_reset.4290503909 Sep 01 12:28:14 PM UTC 24 Sep 01 12:28:17 PM UTC 24 28497024 ps
T979 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_intr_test.1598630117 Sep 01 12:28:15 PM UTC 24 Sep 01 12:28:17 PM UTC 24 8894941 ps
T980 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_rw.2663922267 Sep 01 12:28:15 PM UTC 24 Sep 01 12:28:17 PM UTC 24 13074898 ps
T981 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_shadow_reg_errors.879939723 Sep 01 12:28:14 PM UTC 24 Sep 01 12:28:18 PM UTC 24 289031479 ps
T982 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_tl_intg_err.2633184806 Sep 01 12:28:12 PM UTC 24 Sep 01 12:28:19 PM UTC 24 500017114 ps
T983 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors_with_csr_rw.2501030220 Sep 01 12:28:07 PM UTC 24 Sep 01 12:28:19 PM UTC 24 621474019 ps
T984 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_tl_errors.1310806369 Sep 01 12:28:15 PM UTC 24 Sep 01 12:28:19 PM UTC 24 37772233 ps
T985 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors_with_csr_rw.1909438253 Sep 01 12:28:10 PM UTC 24 Sep 01 12:28:20 PM UTC 24 583393571 ps
T986 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_same_csr_outstanding.2111317484 Sep 01 12:28:16 PM UTC 24 Sep 01 12:28:20 PM UTC 24 25190591 ps
T987 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_intr_test.3222965260 Sep 01 12:28:18 PM UTC 24 Sep 01 12:28:21 PM UTC 24 34952102 ps
T988 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_mem_rw_with_rand_reset.4076725418 Sep 01 12:28:16 PM UTC 24 Sep 01 12:28:21 PM UTC 24 116979604 ps
T989 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_csr_rw.2360935420 Sep 01 12:28:19 PM UTC 24 Sep 01 12:28:22 PM UTC 24 11559311 ps
T990 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_tl_errors.4245027280 Sep 01 12:28:17 PM UTC 24 Sep 01 12:28:22 PM UTC 24 41871468 ps
T991 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_csr_mem_rw_with_rand_reset.1739930267 Sep 01 12:28:19 PM UTC 24 Sep 01 12:28:22 PM UTC 24 304179720 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_tl_intg_err.3730536908 Sep 01 12:28:15 PM UTC 24 Sep 01 12:28:23 PM UTC 24 117963544 ps
T992 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_same_csr_outstanding.3063445939 Sep 01 12:28:19 PM UTC 24 Sep 01 12:28:23 PM UTC 24 31747412 ps
T993 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/18.keymgr_intr_test.1962157735 Sep 01 12:28:33 PM UTC 24 Sep 01 12:28:36 PM UTC 24 14041090 ps
T994 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_shadow_reg_errors.3334198988 Sep 01 12:28:16 PM UTC 24 Sep 01 12:28:23 PM UTC 24 315109256 ps
T995 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_intr_test.941042952 Sep 01 12:28:21 PM UTC 24 Sep 01 12:28:23 PM UTC 24 33418272 ps
T996 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_shadow_reg_errors_with_csr_rw.1483756896 Sep 01 12:28:14 PM UTC 24 Sep 01 12:28:23 PM UTC 24 419683747 ps
T997 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_csr_rw.1481726998 Sep 01 12:28:21 PM UTC 24 Sep 01 12:28:24 PM UTC 24 14355824 ps
T998 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_tl_errors.876025771 Sep 01 12:28:21 PM UTC 24 Sep 01 12:28:25 PM UTC 24 196480085 ps
T999 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_shadow_reg_errors.2130169958 Sep 01 12:28:20 PM UTC 24 Sep 01 12:28:26 PM UTC 24 174223728 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_tl_intg_err.1952505264 Sep 01 12:28:21 PM UTC 24 Sep 01 12:28:26 PM UTC 24 160915267 ps
T1000 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/15.keymgr_intr_test.2508139249 Sep 01 12:28:24 PM UTC 24 Sep 01 12:28:26 PM UTC 24 12870669 ps
T1001 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/15.keymgr_shadow_reg_errors.1910311786 Sep 01 12:28:23 PM UTC 24 Sep 01 12:28:27 PM UTC 24 127762236 ps
T1002 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_csr_mem_rw_with_rand_reset.2448508559 Sep 01 12:28:22 PM UTC 24 Sep 01 12:28:27 PM UTC 24 165930644 ps
T180 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_tl_intg_err.906336510 Sep 01 12:28:18 PM UTC 24 Sep 01 12:28:27 PM UTC 24 510055215 ps
T1003 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_same_csr_outstanding.1939355324 Sep 01 12:28:22 PM UTC 24 Sep 01 12:28:27 PM UTC 24 121347067 ps
T1004 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/15.keymgr_csr_mem_rw_with_rand_reset.3404431177 Sep 01 12:28:25 PM UTC 24 Sep 01 12:28:27 PM UTC 24 25526739 ps
T1005 /workspaces/repo/scratch/os_regression_2024_08_31/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_shadow_reg_errors_with_csr_rw.1715253185 Sep 01 12:28:16 PM UTC 24 Sep 01 12:28:28 PM UTC 24 1060094944 ps
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