Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.80 99.04 98.19 98.53 100.00 99.02 98.63 91.22


Total test records in report: 1088
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T808 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/37.keymgr_stress_all.3165785331 Sep 09 09:08:43 PM UTC 24 Sep 09 09:09:11 PM UTC 24 1110425315 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sideload_kmac.1463888270 Sep 09 09:09:06 PM UTC 24 Sep 09 09:09:11 PM UTC 24 306263390 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_smoke.4147009026 Sep 09 09:09:05 PM UTC 24 Sep 09 09:09:11 PM UTC 24 297178226 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_lc_disable.3802412167 Sep 09 09:09:07 PM UTC 24 Sep 09 09:09:11 PM UTC 24 38894294 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/41.keymgr_sync_async_fault_cross.1996043862 Sep 09 09:09:00 PM UTC 24 Sep 09 09:09:12 PM UTC 24 648635340 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sideload_protect.2612567179 Sep 09 09:09:09 PM UTC 24 Sep 09 09:09:13 PM UTC 24 29108956 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_alert_test.169614437 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:13 PM UTC 24 11299445 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/39.keymgr_sideload_kmac.2104233953 Sep 09 09:08:49 PM UTC 24 Sep 09 09:09:13 PM UTC 24 712804161 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_hwsw_invalid_input.1416706479 Sep 09 09:09:07 PM UTC 24 Sep 09 09:09:13 PM UTC 24 418533743 ps
T233 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/40.keymgr_stress_all.3465227480 Sep 09 09:08:56 PM UTC 24 Sep 09 09:09:25 PM UTC 24 746605243 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_custom_cm.1268740866 Sep 09 09:09:09 PM UTC 24 Sep 09 09:09:14 PM UTC 24 131200760 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sync_async_fault_cross.2498899906 Sep 09 09:09:09 PM UTC 24 Sep 09 09:09:14 PM UTC 24 344763931 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/42.keymgr_stress_all_with_rand_reset.3582211978 Sep 09 09:09:05 PM UTC 24 Sep 09 09:09:15 PM UTC 24 455507605 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_direct_to_disabled.149150246 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:15 PM UTC 24 40642155 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_kmac_rsp_err.1865948849 Sep 09 09:09:09 PM UTC 24 Sep 09 09:09:15 PM UTC 24 455802872 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_smoke.2004186380 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:15 PM UTC 24 1037475823 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_lc_disable.1870603895 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:15 PM UTC 24 93106715 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/40.keymgr_sideload_aes.3243121298 Sep 09 09:08:53 PM UTC 24 Sep 09 09:09:16 PM UTC 24 4691914249 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/41.keymgr_sw_invalid_input.579661861 Sep 09 09:08:59 PM UTC 24 Sep 09 09:09:16 PM UTC 24 1905294557 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sw_invalid_input.3476000123 Sep 09 09:09:07 PM UTC 24 Sep 09 09:09:16 PM UTC 24 4954117581 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_alert_test.1603159245 Sep 09 09:09:14 PM UTC 24 Sep 09 09:09:17 PM UTC 24 14677785 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_otbn.3443234610 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:17 PM UTC 24 485147363 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/40.keymgr_sw_invalid_input.2138830429 Sep 09 09:08:54 PM UTC 24 Sep 09 09:09:17 PM UTC 24 5992375932 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sync_async_fault_cross.1072495828 Sep 09 09:09:13 PM UTC 24 Sep 09 09:09:17 PM UTC 24 281822689 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_custom_cm.1493350152 Sep 09 09:09:13 PM UTC 24 Sep 09 09:09:17 PM UTC 24 79568830 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_kmac_rsp_err.4222760989 Sep 09 09:09:13 PM UTC 24 Sep 09 09:09:17 PM UTC 24 1177711123 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_random.298382133 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:17 PM UTC 24 251220487 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_aes.1727617890 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:18 PM UTC 24 507356030 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_protect.2854661650 Sep 09 09:09:13 PM UTC 24 Sep 09 09:09:18 PM UTC 24 80776188 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sideload.4164430794 Sep 09 09:09:14 PM UTC 24 Sep 09 09:09:18 PM UTC 24 39888139 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_hwsw_invalid_input.1950117496 Sep 09 09:09:12 PM UTC 24 Sep 09 09:09:19 PM UTC 24 664488354 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_cfg_regwen.207042929 Sep 09 09:09:06 PM UTC 24 Sep 09 09:09:19 PM UTC 24 1905059527 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_kmac.2436042036 Sep 09 09:09:14 PM UTC 24 Sep 09 09:09:20 PM UTC 24 413709049 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sideload_otbn.3504142504 Sep 09 09:09:06 PM UTC 24 Sep 09 09:09:20 PM UTC 24 468084555 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_alert_test.1997257766 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:21 PM UTC 24 19937999 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_kmac.1930224057 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:21 PM UTC 24 446267240 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sideload_aes.2750455762 Sep 09 09:09:06 PM UTC 24 Sep 09 09:09:21 PM UTC 24 472197860 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all.1935828680 Sep 09 09:09:14 PM UTC 24 Sep 09 09:09:21 PM UTC 24 151064940 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_otbn.3202560841 Sep 09 09:09:15 PM UTC 24 Sep 09 09:09:21 PM UTC 24 103352642 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_random.1871049871 Sep 09 09:09:21 PM UTC 24 Sep 09 09:09:26 PM UTC 24 181197672 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_direct_to_disabled.696019003 Sep 09 09:09:17 PM UTC 24 Sep 09 09:09:21 PM UTC 24 60463414 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_hwsw_invalid_input.3672729209 Sep 09 09:09:17 PM UTC 24 Sep 09 09:09:22 PM UTC 24 166917249 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_kmac.3475420155 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:22 PM UTC 24 32386695 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_aes.3024073479 Sep 09 09:09:19 PM UTC 24 Sep 09 09:09:22 PM UTC 24 116958052 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_protect.3085965800 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:22 PM UTC 24 914300494 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all_with_rand_reset.3623390902 Sep 09 09:09:14 PM UTC 24 Sep 09 09:09:22 PM UTC 24 356805507 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sw_invalid_input.254565891 Sep 09 09:09:17 PM UTC 24 Sep 09 09:09:23 PM UTC 24 565733740 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sync_async_fault_cross.3192789474 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:23 PM UTC 24 78544095 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_otbn.134919672 Sep 09 09:09:20 PM UTC 24 Sep 09 09:09:23 PM UTC 24 95275124 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/38.keymgr_cfg_regwen.2694511507 Sep 09 09:08:46 PM UTC 24 Sep 09 09:09:23 PM UTC 24 1153011730 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/42.keymgr_cfg_regwen.2439315866 Sep 09 09:09:03 PM UTC 24 Sep 09 09:09:23 PM UTC 24 1406854143 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_kmac_rsp_err.1558959527 Sep 09 09:09:17 PM UTC 24 Sep 09 09:09:23 PM UTC 24 353472162 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_alert_test.3360995353 Sep 09 09:09:24 PM UTC 24 Sep 09 09:09:26 PM UTC 24 64158430 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sw_invalid_input.3503627426 Sep 09 09:09:12 PM UTC 24 Sep 09 09:09:26 PM UTC 24 509043770 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_kmac_rsp_err.932502644 Sep 09 09:09:22 PM UTC 24 Sep 09 09:09:27 PM UTC 24 135110724 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_protect.730523065 Sep 09 09:09:22 PM UTC 24 Sep 09 09:09:27 PM UTC 24 45444597 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_random.3475386481 Sep 09 09:09:16 PM UTC 24 Sep 09 09:09:27 PM UTC 24 317817332 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_stress_all.731980769 Sep 09 09:09:09 PM UTC 24 Sep 09 09:09:27 PM UTC 24 2547514061 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_smoke.909311675 Sep 09 09:09:24 PM UTC 24 Sep 09 09:09:27 PM UTC 24 128812156 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/23.keymgr_stress_all.1747550836 Sep 09 09:07:28 PM UTC 24 Sep 09 09:09:27 PM UTC 24 8802639495 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_otbn.2683131976 Sep 09 09:09:24 PM UTC 24 Sep 09 09:09:28 PM UTC 24 57250556 ps
T50 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_hwsw_invalid_input.2426379466 Sep 09 09:09:22 PM UTC 24 Sep 09 09:09:28 PM UTC 24 117800692 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_custom_cm.4037817911 Sep 09 09:09:22 PM UTC 24 Sep 09 09:09:28 PM UTC 24 255660411 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_aes.2319902596 Sep 09 09:09:24 PM UTC 24 Sep 09 09:09:28 PM UTC 24 45883648 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_direct_to_disabled.417802415 Sep 09 09:09:21 PM UTC 24 Sep 09 09:09:28 PM UTC 24 294139088 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_direct_to_disabled.836765903 Sep 09 09:09:25 PM UTC 24 Sep 09 09:09:29 PM UTC 24 196095803 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sw_invalid_input.3170706968 Sep 09 09:09:22 PM UTC 24 Sep 09 09:09:29 PM UTC 24 110601646 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sideload.3821978024 Sep 09 09:09:24 PM UTC 24 Sep 09 09:09:30 PM UTC 24 378953509 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_lc_disable.1836929195 Sep 09 09:09:25 PM UTC 24 Sep 09 09:09:30 PM UTC 24 325077151 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_kmac.1131066524 Sep 09 09:09:24 PM UTC 24 Sep 09 09:09:30 PM UTC 24 2952011782 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_hwsw_invalid_input.1606242387 Sep 09 09:09:26 PM UTC 24 Sep 09 09:09:31 PM UTC 24 96015797 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_kmac_rsp_err.682122583 Sep 09 09:09:26 PM UTC 24 Sep 09 09:09:31 PM UTC 24 333663932 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_alert_test.643080495 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:31 PM UTC 24 46300197 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/42.keymgr_stress_all.1981510633 Sep 09 09:09:05 PM UTC 24 Sep 09 09:10:39 PM UTC 24 4335377183 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_sideload.2774776028 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:31 PM UTC 24 2839312004 ps
T244 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_stress_all_with_rand_reset.1292021562 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:31 PM UTC 24 189922995 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_protect.3364246568 Sep 09 09:09:27 PM UTC 24 Sep 09 09:09:32 PM UTC 24 267420975 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_cfg_regwen.3159233271 Sep 09 09:09:16 PM UTC 24 Sep 09 09:10:16 PM UTC 24 1261758273 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_otbn.35696204 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:33 PM UTC 24 315307680 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_alert_test.3752523456 Sep 09 09:09:32 PM UTC 24 Sep 09 09:09:34 PM UTC 24 33915407 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_cfg_regwen.1138117512 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:34 PM UTC 24 31931841 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_cfg_regwen.135388861 Sep 09 09:09:21 PM UTC 24 Sep 09 09:09:34 PM UTC 24 1004328913 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_kmac.579999804 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:34 PM UTC 24 79880462 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_random.767568346 Sep 09 09:09:25 PM UTC 24 Sep 09 09:09:34 PM UTC 24 1180211742 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_custom_cm.1501742996 Sep 09 09:09:27 PM UTC 24 Sep 09 09:09:34 PM UTC 24 120122460 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_sideload.2482279304 Sep 09 09:09:06 PM UTC 24 Sep 09 09:09:35 PM UTC 24 5409111176 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_kmac_rsp_err.4130512748 Sep 09 09:09:30 PM UTC 24 Sep 09 09:09:35 PM UTC 24 131460304 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sync_async_fault_cross.766171097 Sep 09 09:09:32 PM UTC 24 Sep 09 09:09:35 PM UTC 24 155682795 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/43.keymgr_direct_to_disabled.223310704 Sep 09 09:09:07 PM UTC 24 Sep 09 09:09:35 PM UTC 24 849219726 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_direct_to_disabled.3968167735 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:35 PM UTC 24 725044016 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_lc_disable.637617799 Sep 09 09:09:30 PM UTC 24 Sep 09 09:09:36 PM UTC 24 464847501 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_hwsw_invalid_input.3430482454 Sep 09 09:09:30 PM UTC 24 Sep 09 09:09:36 PM UTC 24 226427485 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_protect.2129364616 Sep 09 09:09:32 PM UTC 24 Sep 09 09:09:36 PM UTC 24 34877717 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_random.448278801 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:36 PM UTC 24 478814237 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sw_invalid_input.2868708482 Sep 09 09:09:30 PM UTC 24 Sep 09 09:09:36 PM UTC 24 85265070 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_custom_cm.1091054139 Sep 09 09:09:32 PM UTC 24 Sep 09 09:09:37 PM UTC 24 302417000 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_smoke.814193370 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:37 PM UTC 24 6468850899 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_smoke.3399043055 Sep 09 09:09:33 PM UTC 24 Sep 09 09:09:37 PM UTC 24 339848304 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_kmac.832253648 Sep 09 09:09:34 PM UTC 24 Sep 09 09:09:38 PM UTC 24 113955637 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sw_invalid_input.1929434283 Sep 09 09:09:26 PM UTC 24 Sep 09 09:09:38 PM UTC 24 995052610 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_smoke.3222931853 Sep 09 09:09:29 PM UTC 24 Sep 09 09:09:39 PM UTC 24 502778557 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_smoke.2001418955 Sep 09 09:09:14 PM UTC 24 Sep 09 09:09:39 PM UTC 24 1446968028 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_alert_test.247194723 Sep 09 09:09:37 PM UTC 24 Sep 09 09:09:39 PM UTC 24 50990924 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_lc_disable.3925925820 Sep 09 09:09:35 PM UTC 24 Sep 09 09:09:40 PM UTC 24 259451845 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_direct_to_disabled.1465886916 Sep 09 09:09:35 PM UTC 24 Sep 09 09:09:40 PM UTC 24 267545874 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_otbn.769311209 Sep 09 09:09:35 PM UTC 24 Sep 09 09:09:40 PM UTC 24 53144160 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_sync_async_fault_cross.2974092936 Sep 09 09:09:28 PM UTC 24 Sep 09 09:09:40 PM UTC 24 1304052311 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all.3391373879 Sep 09 09:09:00 PM UTC 24 Sep 09 09:09:41 PM UTC 24 1026699663 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_random.1428603204 Sep 09 09:09:35 PM UTC 24 Sep 09 09:09:41 PM UTC 24 379103792 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_protect.3096882335 Sep 09 09:09:37 PM UTC 24 Sep 09 09:09:41 PM UTC 24 31777366 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all_with_rand_reset.3679704114 Sep 09 09:09:32 PM UTC 24 Sep 09 09:09:41 PM UTC 24 941389433 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_aes.3905505847 Sep 09 09:09:35 PM UTC 24 Sep 09 09:09:41 PM UTC 24 491814326 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_hwsw_invalid_input.267014733 Sep 09 09:09:36 PM UTC 24 Sep 09 09:09:41 PM UTC 24 258778857 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sync_async_fault_cross.3723983064 Sep 09 09:09:37 PM UTC 24 Sep 09 09:09:41 PM UTC 24 171702498 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_cfg_regwen.3000291198 Sep 09 09:09:35 PM UTC 24 Sep 09 09:09:42 PM UTC 24 91356010 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sw_invalid_input.2525869815 Sep 09 09:09:36 PM UTC 24 Sep 09 09:09:42 PM UTC 24 416729447 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sideload.1196394599 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:42 PM UTC 24 1179299124 ps
T234 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_custom_cm.4013247708 Sep 09 09:09:37 PM UTC 24 Sep 09 09:09:43 PM UTC 24 214656558 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_kmac_rsp_err.3206117866 Sep 09 09:09:36 PM UTC 24 Sep 09 09:09:43 PM UTC 24 132185030 ps
T238 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_stress_all_with_rand_reset.1992671859 Sep 09 09:09:28 PM UTC 24 Sep 09 09:09:45 PM UTC 24 673881211 ps
T227 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/35.keymgr_stress_all.2451652589 Sep 09 09:08:35 PM UTC 24 Sep 09 09:09:46 PM UTC 24 3574596125 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_stress_all.2287453924 Sep 09 09:09:18 PM UTC 24 Sep 09 09:09:47 PM UTC 24 1184355489 ps
T245 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/44.keymgr_cfg_regwen.369156279 Sep 09 09:09:10 PM UTC 24 Sep 09 09:09:47 PM UTC 24 784439556 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_sync_async_fault_cross.2322836246 Sep 09 09:09:22 PM UTC 24 Sep 09 09:09:49 PM UTC 24 13045878773 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/47.keymgr_stress_all.661780523 Sep 09 09:09:28 PM UTC 24 Sep 09 09:09:54 PM UTC 24 565969628 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all_with_rand_reset.1724199115 Sep 09 09:09:37 PM UTC 24 Sep 09 09:09:55 PM UTC 24 290987200 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all.1105992350 Sep 09 09:09:32 PM UTC 24 Sep 09 09:09:57 PM UTC 24 980561019 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_aes.4083111172 Sep 09 09:09:29 PM UTC 24 Sep 09 09:10:03 PM UTC 24 2716901937 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all.4094243559 Sep 09 09:09:37 PM UTC 24 Sep 09 09:10:05 PM UTC 24 1332593757 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_aes.2313818100 Sep 09 09:09:14 PM UTC 24 Sep 09 09:10:07 PM UTC 24 1774715943 ps
T228 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/46.keymgr_stress_all.2024649354 Sep 09 09:09:23 PM UTC 24 Sep 09 09:10:09 PM UTC 24 1435462136 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/48.keymgr_sideload.1448552371 Sep 09 09:09:29 PM UTC 24 Sep 09 09:10:14 PM UTC 24 10650664098 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/default/49.keymgr_sideload.3743519515 Sep 09 09:09:33 PM UTC 24 Sep 09 09:10:20 PM UTC 24 1459710311 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_intr_test.1042872759 Sep 09 10:22:41 PM UTC 24 Sep 09 10:22:43 PM UTC 24 61187811 ps
T163 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_rw.1803039772 Sep 09 10:22:41 PM UTC 24 Sep 09 10:22:43 PM UTC 24 68795372 ps
T164 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_hw_reset.1803028020 Sep 09 10:22:41 PM UTC 24 Sep 09 10:22:43 PM UTC 24 21383605 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_errors.1892813553 Sep 09 10:22:39 PM UTC 24 Sep 09 10:22:43 PM UTC 24 69614493 ps
T72 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors.2953682648 Sep 09 10:22:39 PM UTC 24 Sep 09 10:22:44 PM UTC 24 347654223 ps
T112 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_same_csr_outstanding.1386162998 Sep 09 10:22:43 PM UTC 24 Sep 09 10:22:46 PM UTC 24 185476284 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_intr_test.1160141265 Sep 09 10:22:44 PM UTC 24 Sep 09 10:22:47 PM UTC 24 46765415 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_intg_err.1291751864 Sep 09 10:22:41 PM UTC 24 Sep 09 10:22:47 PM UTC 24 105244584 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_mem_rw_with_rand_reset.2237971079 Sep 09 10:22:44 PM UTC 24 Sep 09 10:22:48 PM UTC 24 136973058 ps
T113 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_rw.960398688 Sep 09 10:22:46 PM UTC 24 Sep 09 10:22:48 PM UTC 24 28366870 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_hw_reset.4055218325 Sep 09 10:22:46 PM UTC 24 Sep 09 10:22:48 PM UTC 24 32062952 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_errors.3860650995 Sep 09 10:22:44 PM UTC 24 Sep 09 10:22:48 PM UTC 24 44376982 ps
T77 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors.2727917427 Sep 09 10:22:44 PM UTC 24 Sep 09 10:22:48 PM UTC 24 489336105 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_intg_err.3743880048 Sep 09 10:22:44 PM UTC 24 Sep 09 10:22:51 PM UTC 24 305207232 ps
T73 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors_with_csr_rw.315752390 Sep 09 10:22:39 PM UTC 24 Sep 09 10:22:51 PM UTC 24 1226501738 ps
T114 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_same_csr_outstanding.3520883227 Sep 09 10:22:48 PM UTC 24 Sep 09 10:22:52 PM UTC 24 93093912 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_mem_rw_with_rand_reset.2915863407 Sep 09 10:22:49 PM UTC 24 Sep 09 10:22:52 PM UTC 24 53640224 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors_with_csr_rw.180666592 Sep 09 10:22:44 PM UTC 24 Sep 09 10:22:52 PM UTC 24 214479353 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_errors.3637062119 Sep 09 10:22:49 PM UTC 24 Sep 09 10:22:53 PM UTC 24 25276024 ps
T82 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors.1355825593 Sep 09 10:22:49 PM UTC 24 Sep 09 10:22:53 PM UTC 24 96837767 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_intr_test.2330045889 Sep 09 10:22:51 PM UTC 24 Sep 09 10:22:53 PM UTC 24 14750456 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_hw_reset.3799737963 Sep 09 10:22:52 PM UTC 24 Sep 09 10:22:55 PM UTC 24 70955674 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_rw.504773327 Sep 09 10:22:52 PM UTC 24 Sep 09 10:22:55 PM UTC 24 44599687 ps
T165 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_intg_err.3169078186 Sep 09 10:22:49 PM UTC 24 Sep 09 10:22:56 PM UTC 24 354384485 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_aliasing.1651438261 Sep 09 10:22:43 PM UTC 24 Sep 09 10:22:56 PM UTC 24 4889756083 ps
T115 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_same_csr_outstanding.3367977526 Sep 09 10:22:54 PM UTC 24 Sep 09 10:22:56 PM UTC 24 22970930 ps
T116 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_aliasing.403851441 Sep 09 10:22:48 PM UTC 24 Sep 09 10:22:57 PM UTC 24 128156835 ps
T83 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors_with_csr_rw.86366274 Sep 09 10:22:49 PM UTC 24 Sep 09 10:22:58 PM UTC 24 727332756 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_mem_rw_with_rand_reset.140889379 Sep 09 10:22:54 PM UTC 24 Sep 09 10:22:58 PM UTC 24 39529974 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_bit_bash.1267157903 Sep 09 10:22:47 PM UTC 24 Sep 09 10:22:58 PM UTC 24 2549597494 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_intr_test.1034151202 Sep 09 10:22:57 PM UTC 24 Sep 09 10:22:59 PM UTC 24 12653822 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_errors.2992086765 Sep 09 10:22:56 PM UTC 24 Sep 09 10:22:59 PM UTC 24 42649507 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_hw_reset.2832934409 Sep 09 10:22:57 PM UTC 24 Sep 09 10:23:00 PM UTC 24 123619864 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_errors.3089139118 Sep 09 10:23:12 PM UTC 24 Sep 09 10:23:16 PM UTC 24 614008583 ps
T81 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors.2437535522 Sep 09 10:22:55 PM UTC 24 Sep 09 10:23:00 PM UTC 24 719504818 ps
T117 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_rw.4292741213 Sep 09 10:22:57 PM UTC 24 Sep 09 10:23:00 PM UTC 24 56319822 ps
T78 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors_with_csr_rw.2490781676 Sep 09 10:22:56 PM UTC 24 Sep 09 10:23:01 PM UTC 24 101945586 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_bit_bash.2526447980 Sep 09 10:22:42 PM UTC 24 Sep 09 10:23:02 PM UTC 24 9557710434 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_mem_rw_with_rand_reset.387792564 Sep 09 10:22:59 PM UTC 24 Sep 09 10:23:02 PM UTC 24 18483973 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_same_csr_outstanding.3669144427 Sep 09 10:22:58 PM UTC 24 Sep 09 10:23:03 PM UTC 24 96734774 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_intr_test.4235127086 Sep 09 10:23:02 PM UTC 24 Sep 09 10:23:04 PM UTC 24 14987299 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_aliasing.3781265913 Sep 09 10:22:54 PM UTC 24 Sep 09 10:23:04 PM UTC 24 1006455508 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_errors.412002127 Sep 09 10:23:01 PM UTC 24 Sep 09 10:23:05 PM UTC 24 71665905 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_rw.2269299376 Sep 09 10:23:03 PM UTC 24 Sep 09 10:23:06 PM UTC 24 32521764 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_intg_err.3792439772 Sep 09 10:23:01 PM UTC 24 Sep 09 10:23:06 PM UTC 24 141489704 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_hw_reset.123056897 Sep 09 10:23:03 PM UTC 24 Sep 09 10:23:07 PM UTC 24 36318273 ps
T79 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors.3362428207 Sep 09 10:23:01 PM UTC 24 Sep 09 10:23:07 PM UTC 24 155395352 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_bit_bash.1253710804 Sep 09 10:22:58 PM UTC 24 Sep 09 10:23:08 PM UTC 24 556813010 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors_with_csr_rw.3552862190 Sep 09 10:23:01 PM UTC 24 Sep 09 10:23:09 PM UTC 24 880216415 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_intg_err.3405682960 Sep 09 10:22:57 PM UTC 24 Sep 09 10:23:09 PM UTC 24 212909638 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_mem_rw_with_rand_reset.2233741187 Sep 09 10:23:06 PM UTC 24 Sep 09 10:23:09 PM UTC 24 120733024 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_errors.3969940434 Sep 09 10:23:08 PM UTC 24 Sep 09 10:23:10 PM UTC 24 47541108 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_intr_test.3907584402 Sep 09 10:23:09 PM UTC 24 Sep 09 10:23:11 PM UTC 24 45929655 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors.3203341506 Sep 09 10:23:06 PM UTC 24 Sep 09 10:23:11 PM UTC 24 101784411 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_same_csr_outstanding.1815469183 Sep 09 10:23:05 PM UTC 24 Sep 09 10:23:12 PM UTC 24 431256177 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_rw.1618041385 Sep 09 10:23:09 PM UTC 24 Sep 09 10:23:12 PM UTC 24 33441987 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_bit_bash.903988134 Sep 09 10:22:54 PM UTC 24 Sep 09 10:23:13 PM UTC 24 854801332 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_aliasing.3414890301 Sep 09 10:22:58 PM UTC 24 Sep 09 10:23:13 PM UTC 24 641932664 ps
T168 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_intg_err.2229967199 Sep 09 10:23:08 PM UTC 24 Sep 09 10:23:13 PM UTC 24 104342450 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors_with_csr_rw.2192707452 Sep 09 10:23:08 PM UTC 24 Sep 09 10:23:14 PM UTC 24 321640494 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_mem_rw_with_rand_reset.1485498438 Sep 09 10:23:10 PM UTC 24 Sep 09 10:23:14 PM UTC 24 55225027 ps
T80 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors.2805746619 Sep 09 10:23:10 PM UTC 24 Sep 09 10:23:15 PM UTC 24 183694133 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_intr_test.728320527 Sep 09 10:23:13 PM UTC 24 Sep 09 10:23:15 PM UTC 24 37369886 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_rw.3414384786 Sep 09 10:23:13 PM UTC 24 Sep 09 10:23:15 PM UTC 24 20862374 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_same_csr_outstanding.2417364974 Sep 09 10:23:10 PM UTC 24 Sep 09 10:23:15 PM UTC 24 309163594 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_bit_bash.707933762 Sep 09 10:23:04 PM UTC 24 Sep 09 10:23:15 PM UTC 24 449730784 ps
T160 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_intg_err.2321971426 Sep 09 10:23:12 PM UTC 24 Sep 09 10:23:16 PM UTC 24 64122416 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_same_csr_outstanding.2194046254 Sep 09 10:23:13 PM UTC 24 Sep 09 10:23:16 PM UTC 24 52138569 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_mem_rw_with_rand_reset.2310407249 Sep 09 10:23:14 PM UTC 24 Sep 09 10:23:17 PM UTC 24 30146618 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors.2699661257 Sep 09 10:23:14 PM UTC 24 Sep 09 10:23:17 PM UTC 24 345011494 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_intr_test.1381363806 Sep 09 10:23:15 PM UTC 24 Sep 09 10:23:18 PM UTC 24 29314754 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_rw.2955066817 Sep 09 10:23:16 PM UTC 24 Sep 09 10:23:19 PM UTC 24 72622198 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_intg_err.1117151998 Sep 09 10:23:15 PM UTC 24 Sep 09 10:23:21 PM UTC 24 214490641 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_errors.450034538 Sep 09 10:23:14 PM UTC 24 Sep 09 10:23:19 PM UTC 24 42276668 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_intr_test.619507087 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:19 PM UTC 24 66115460 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_mem_rw_with_rand_reset.4199059692 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:20 PM UTC 24 161361509 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_same_csr_outstanding.1343395687 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:20 PM UTC 24 164524905 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors_with_csr_rw.2725654528 Sep 09 10:23:14 PM UTC 24 Sep 09 10:23:21 PM UTC 24 290432426 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_mem_rw_with_rand_reset.4108659176 Sep 09 10:23:19 PM UTC 24 Sep 09 10:23:21 PM UTC 24 93104454 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_aliasing.1933325415 Sep 09 10:23:05 PM UTC 24 Sep 09 10:23:21 PM UTC 24 382449174 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_rw.2487178031 Sep 09 10:23:19 PM UTC 24 Sep 09 10:23:21 PM UTC 24 47064588 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_same_csr_outstanding.1582080638 Sep 09 10:23:19 PM UTC 24 Sep 09 10:23:22 PM UTC 24 220964220 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors.4083067546 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:22 PM UTC 24 73626471 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors.3031674105 Sep 09 10:23:19 PM UTC 24 Sep 09 10:23:23 PM UTC 24 325883544 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_errors.3779094945 Sep 09 10:23:20 PM UTC 24 Sep 09 10:23:23 PM UTC 24 439335955 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_intr_test.2271211177 Sep 09 10:23:21 PM UTC 24 Sep 09 10:23:23 PM UTC 24 142577468 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_rw.2788831275 Sep 09 10:23:21 PM UTC 24 Sep 09 10:23:23 PM UTC 24 60723693 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_intg_err.1116664222 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:24 PM UTC 24 98804550 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors_with_csr_rw.3345353675 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:24 PM UTC 24 471499503 ps
T173 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_intg_err.366191543 Sep 09 10:23:20 PM UTC 24 Sep 09 10:23:24 PM UTC 24 106599021 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_errors.2513287797 Sep 09 10:23:17 PM UTC 24 Sep 09 10:23:24 PM UTC 24 408932203 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_errors.1940342730 Sep 09 10:23:23 PM UTC 24 Sep 09 10:23:26 PM UTC 24 102876597 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_same_csr_outstanding.1105281814 Sep 09 10:23:23 PM UTC 24 Sep 09 10:23:26 PM UTC 24 203918525 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_mem_rw_with_rand_reset.2403715465 Sep 09 10:23:23 PM UTC 24 Sep 09 10:23:26 PM UTC 24 86736361 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_intr_test.84031097 Sep 09 10:23:24 PM UTC 24 Sep 09 10:23:26 PM UTC 24 13534847 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors_with_csr_rw.1080571838 Sep 09 10:23:20 PM UTC 24 Sep 09 10:23:26 PM UTC 24 329663627 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_rw.1090077250 Sep 09 10:23:24 PM UTC 24 Sep 09 10:23:27 PM UTC 24 25919790 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_intg_err.946283819 Sep 09 10:23:23 PM UTC 24 Sep 09 10:23:27 PM UTC 24 94981619 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors.4033417621 Sep 09 10:23:23 PM UTC 24 Sep 09 10:23:27 PM UTC 24 342829636 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_mem_rw_with_rand_reset.47432123 Sep 09 10:23:24 PM UTC 24 Sep 09 10:23:27 PM UTC 24 57349482 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors.2766106303 Sep 09 10:23:24 PM UTC 24 Sep 09 10:23:28 PM UTC 24 57010518 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_same_csr_outstanding.134331562 Sep 09 10:23:24 PM UTC 24 Sep 09 10:23:28 PM UTC 24 67750183 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_intr_test.3754050084 Sep 09 10:23:26 PM UTC 24 Sep 09 10:23:28 PM UTC 24 15544391 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors_with_csr_rw.2790308651 Sep 09 10:23:23 PM UTC 24 Sep 09 10:23:28 PM UTC 24 272535906 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_rw.228881651 Sep 09 10:23:26 PM UTC 24 Sep 09 10:23:28 PM UTC 24 28517598 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors_with_csr_rw.1765900475 Sep 09 10:23:10 PM UTC 24 Sep 09 10:23:28 PM UTC 24 1069389381 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors_with_csr_rw.1365242596 Sep 09 10:23:24 PM UTC 24 Sep 09 10:23:30 PM UTC 24 279563501 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_mem_rw_with_rand_reset.1604207247 Sep 09 10:23:27 PM UTC 24 Sep 09 10:23:30 PM UTC 24 38129333 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_same_csr_outstanding.1249121615 Sep 09 10:23:27 PM UTC 24 Sep 09 10:23:30 PM UTC 24 44789877 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_shadow_reg_errors.881901792 Sep 09 10:23:27 PM UTC 24 Sep 09 10:23:31 PM UTC 24 74294750 ps
T161 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/16.keymgr_tl_intg_err.3011612182 Sep 09 10:23:38 PM UTC 24 Sep 09 10:23:44 PM UTC 24 356774793 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_intr_test.1238798125 Sep 09 10:23:29 PM UTC 24 Sep 09 10:23:31 PM UTC 24 13416112 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_tl_errors.2654310063 Sep 09 10:23:28 PM UTC 24 Sep 09 10:23:31 PM UTC 24 63036558 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_rw.766280079 Sep 09 10:23:29 PM UTC 24 Sep 09 10:23:32 PM UTC 24 42343768 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_mem_rw_with_rand_reset.2125389064 Sep 09 10:23:29 PM UTC 24 Sep 09 10:23:32 PM UTC 24 83922484 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_tl_errors.2083869066 Sep 09 10:23:29 PM UTC 24 Sep 09 10:23:32 PM UTC 24 383546574 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_08/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_same_csr_outstanding.1670039876 Sep 09 10:23:29 PM UTC 24 Sep 09 10:23:32 PM UTC 24 146265850 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%