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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.43 98.99 98.07 98.43 97.67 98.92 98.63 91.27


Total test records in report: 1076
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T384 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_kmac_rsp_err.823497322 Sep 24 07:58:46 PM UTC 24 Sep 24 07:58:51 PM UTC 24 51768493 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_sideload_protect.3270933305 Sep 24 07:58:48 PM UTC 24 Sep 24 07:58:52 PM UTC 24 77661080 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_alert_test.4075531729 Sep 24 07:58:51 PM UTC 24 Sep 24 07:58:53 PM UTC 24 15940528 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sideload.617999668 Sep 24 07:58:51 PM UTC 24 Sep 24 07:58:55 PM UTC 24 171512088 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_sync_async_fault_cross.687200362 Sep 24 07:58:50 PM UTC 24 Sep 24 07:58:56 PM UTC 24 317788476 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_smoke.1274282829 Sep 24 07:58:51 PM UTC 24 Sep 24 07:58:56 PM UTC 24 92771756 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_custom_cm.4236987934 Sep 24 07:58:48 PM UTC 24 Sep 24 07:58:56 PM UTC 24 98071338 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_cfg_regwen.2019039190 Sep 24 07:58:44 PM UTC 24 Sep 24 07:58:56 PM UTC 24 297207738 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/38.keymgr_random.3048764636 Sep 24 07:58:04 PM UTC 24 Sep 24 07:58:56 PM UTC 24 1917456288 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/42.keymgr_direct_to_disabled.621048865 Sep 24 07:58:38 PM UTC 24 Sep 24 07:58:56 PM UTC 24 2268987427 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_direct_to_disabled.717896647 Sep 24 07:58:52 PM UTC 24 Sep 24 07:58:56 PM UTC 24 135778357 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_kmac.316516302 Sep 24 07:58:51 PM UTC 24 Sep 24 07:58:57 PM UTC 24 260937761 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_sw_invalid_input.443287225 Sep 24 07:58:46 PM UTC 24 Sep 24 07:58:58 PM UTC 24 265877989 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all_with_rand_reset.3396245849 Sep 24 07:58:33 PM UTC 24 Sep 24 07:59:00 PM UTC 24 630547392 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_hwsw_invalid_input.4013601007 Sep 24 07:58:54 PM UTC 24 Sep 24 07:59:00 PM UTC 24 992885212 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_lc_disable.520759055 Sep 24 07:58:52 PM UTC 24 Sep 24 07:59:01 PM UTC 24 111496264 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_alert_test.1159289123 Sep 24 07:58:58 PM UTC 24 Sep 24 07:59:01 PM UTC 24 14169665 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_protect.1610909105 Sep 24 07:58:57 PM UTC 24 Sep 24 07:59:01 PM UTC 24 35510668 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sync_async_fault_cross.2176716159 Sep 24 07:58:57 PM UTC 24 Sep 24 07:59:01 PM UTC 24 93070321 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/39.keymgr_sideload_kmac.2374929275 Sep 24 07:58:11 PM UTC 24 Sep 24 07:59:02 PM UTC 24 24891458975 ps
T237 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all.2192273620 Sep 24 07:58:32 PM UTC 24 Sep 24 07:59:02 PM UTC 24 1325118186 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_custom_cm.549235749 Sep 24 07:58:57 PM UTC 24 Sep 24 07:59:02 PM UTC 24 57344838 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_kmac_rsp_err.2354063488 Sep 24 07:58:57 PM UTC 24 Sep 24 07:59:03 PM UTC 24 134233241 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_aes.422041422 Sep 24 07:58:52 PM UTC 24 Sep 24 07:59:03 PM UTC 24 674927011 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sw_invalid_input.2177698890 Sep 24 07:58:53 PM UTC 24 Sep 24 07:59:03 PM UTC 24 254930023 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_kmac.2144079045 Sep 24 07:58:59 PM UTC 24 Sep 24 07:59:03 PM UTC 24 25457796 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_aes.1137373154 Sep 24 07:59:00 PM UTC 24 Sep 24 07:59:05 PM UTC 24 47480917 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/34.keymgr_stress_all.3357571241 Sep 24 07:57:38 PM UTC 24 Sep 24 07:59:05 PM UTC 24 14031817083 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_smoke.1783471836 Sep 24 07:58:58 PM UTC 24 Sep 24 07:59:05 PM UTC 24 458238806 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_otbn.2078543208 Sep 24 07:59:01 PM UTC 24 Sep 24 07:59:05 PM UTC 24 71332869 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_hwsw_invalid_input.2673619569 Sep 24 07:59:03 PM UTC 24 Sep 24 07:59:06 PM UTC 24 57901386 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_kmac_rsp_err.3133275751 Sep 24 07:59:03 PM UTC 24 Sep 24 07:59:07 PM UTC 24 231863068 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sideload.2994082038 Sep 24 07:58:58 PM UTC 24 Sep 24 07:59:07 PM UTC 24 135789583 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_lc_disable.1177951557 Sep 24 07:59:02 PM UTC 24 Sep 24 07:59:07 PM UTC 24 182102651 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_cfg_regwen.2522325861 Sep 24 07:59:02 PM UTC 24 Sep 24 07:59:07 PM UTC 24 37724161 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_direct_to_disabled.2861842333 Sep 24 07:59:02 PM UTC 24 Sep 24 07:59:08 PM UTC 24 735836471 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_alert_test.2996107327 Sep 24 07:59:06 PM UTC 24 Sep 24 07:59:08 PM UTC 24 13958199 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/42.keymgr_stress_all.1066299885 Sep 24 07:58:40 PM UTC 24 Sep 24 07:59:08 PM UTC 24 3402523085 ps
T272 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_stress_all_with_rand_reset.2812205040 Sep 24 07:58:50 PM UTC 24 Sep 24 07:59:09 PM UTC 24 1527609961 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sync_async_fault_cross.88829549 Sep 24 07:59:04 PM UTC 24 Sep 24 07:59:09 PM UTC 24 104420135 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_random.3254022373 Sep 24 07:59:02 PM UTC 24 Sep 24 07:59:09 PM UTC 24 91629132 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_protect.658155744 Sep 24 07:59:04 PM UTC 24 Sep 24 07:59:09 PM UTC 24 118371549 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_custom_cm.1005213151 Sep 24 07:59:03 PM UTC 24 Sep 24 07:59:09 PM UTC 24 147071287 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_cfg_regwen.1197096609 Sep 24 07:59:08 PM UTC 24 Sep 24 07:59:14 PM UTC 24 171925426 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_smoke.623947400 Sep 24 07:59:06 PM UTC 24 Sep 24 07:59:10 PM UTC 24 73677410 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_sw_invalid_input.1570928931 Sep 24 07:59:03 PM UTC 24 Sep 24 07:59:10 PM UTC 24 190780769 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_kmac.2242704719 Sep 24 07:59:07 PM UTC 24 Sep 24 07:59:10 PM UTC 24 34553920 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_alert_test.400532786 Sep 24 07:59:12 PM UTC 24 Sep 24 07:59:14 PM UTC 24 79444991 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/40.keymgr_stress_all.42593971 Sep 24 07:58:26 PM UTC 24 Sep 24 07:59:11 PM UTC 24 1112598737 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_sideload.928199223 Sep 24 07:59:07 PM UTC 24 Sep 24 07:59:12 PM UTC 24 460718902 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_direct_to_disabled.2514073384 Sep 24 07:59:09 PM UTC 24 Sep 24 07:59:12 PM UTC 24 27907807 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/43.keymgr_stress_all.3734219243 Sep 24 07:58:50 PM UTC 24 Sep 24 07:59:13 PM UTC 24 519056400 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_custom_cm.2214622864 Sep 24 07:59:10 PM UTC 24 Sep 24 07:59:13 PM UTC 24 49036854 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_otbn.2211941319 Sep 24 07:58:52 PM UTC 24 Sep 24 07:59:14 PM UTC 24 2246187676 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_lc_disable.1084068080 Sep 24 07:59:09 PM UTC 24 Sep 24 07:59:14 PM UTC 24 65226254 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_protect.2285379191 Sep 24 07:59:11 PM UTC 24 Sep 24 07:59:14 PM UTC 24 22445129 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_random.3196520036 Sep 24 07:59:08 PM UTC 24 Sep 24 07:59:15 PM UTC 24 494566389 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_kmac_rsp_err.1564291587 Sep 24 07:59:10 PM UTC 24 Sep 24 07:59:16 PM UTC 24 283620049 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_sw_invalid_input.1573828098 Sep 24 07:59:09 PM UTC 24 Sep 24 07:59:16 PM UTC 24 173623411 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sideload.226988343 Sep 24 07:59:12 PM UTC 24 Sep 24 07:59:17 PM UTC 24 56581388 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_smoke.647478359 Sep 24 07:59:12 PM UTC 24 Sep 24 07:59:18 PM UTC 24 148391706 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_random.1291468080 Sep 24 07:58:52 PM UTC 24 Sep 24 07:59:18 PM UTC 24 7417860766 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_cfg_regwen.1853792671 Sep 24 07:59:14 PM UTC 24 Sep 24 07:59:18 PM UTC 24 126964856 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_direct_to_disabled.1548974865 Sep 24 07:59:14 PM UTC 24 Sep 24 07:59:19 PM UTC 24 241240767 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_aes.3619709635 Sep 24 07:59:13 PM UTC 24 Sep 24 07:59:19 PM UTC 24 152858729 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_otbn.2145869863 Sep 24 07:59:13 PM UTC 24 Sep 24 07:59:19 PM UTC 24 905085200 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_hwsw_invalid_input.3194926659 Sep 24 07:59:09 PM UTC 24 Sep 24 07:59:19 PM UTC 24 241660391 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_alert_test.1716792197 Sep 24 07:59:17 PM UTC 24 Sep 24 07:59:19 PM UTC 24 19450778 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_custom_cm.4104955700 Sep 24 07:59:16 PM UTC 24 Sep 24 07:59:20 PM UTC 24 81118964 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_kmac_rsp_err.1590670949 Sep 24 07:59:16 PM UTC 24 Sep 24 07:59:20 PM UTC 24 76030942 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sync_async_fault_cross.167493726 Sep 24 07:59:17 PM UTC 24 Sep 24 07:59:20 PM UTC 24 85864205 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_random.638163161 Sep 24 07:59:14 PM UTC 24 Sep 24 07:59:20 PM UTC 24 312410135 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_protect.1466246569 Sep 24 07:59:17 PM UTC 24 Sep 24 07:59:21 PM UTC 24 47715707 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_lc_disable.3060430175 Sep 24 07:59:15 PM UTC 24 Sep 24 07:59:22 PM UTC 24 96470851 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_hwsw_invalid_input.3251298860 Sep 24 07:59:16 PM UTC 24 Sep 24 07:59:23 PM UTC 24 667872241 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_cfg_regwen.4138559479 Sep 24 07:58:52 PM UTC 24 Sep 24 07:59:23 PM UTC 24 4220813877 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_kmac.27386160 Sep 24 07:59:13 PM UTC 24 Sep 24 07:59:24 PM UTC 24 830112700 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_sw_invalid_input.2499800092 Sep 24 07:59:16 PM UTC 24 Sep 24 07:59:24 PM UTC 24 254369283 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_aes.1338719586 Sep 24 07:59:19 PM UTC 24 Sep 24 07:59:25 PM UTC 24 226080864 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sideload.3892946081 Sep 24 07:59:19 PM UTC 24 Sep 24 07:59:25 PM UTC 24 75225924 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sync_async_fault_cross.1015793373 Sep 24 07:59:23 PM UTC 24 Sep 24 07:59:26 PM UTC 24 38831355 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_stress_all.1467057761 Sep 24 07:59:11 PM UTC 24 Sep 24 07:59:26 PM UTC 24 1138723652 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_smoke.1203248268 Sep 24 07:59:18 PM UTC 24 Sep 24 07:59:26 PM UTC 24 155100409 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_kmac.2783354092 Sep 24 07:59:19 PM UTC 24 Sep 24 07:59:27 PM UTC 24 266013332 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/45.keymgr_stress_all.1714430962 Sep 24 07:59:04 PM UTC 24 Sep 24 07:59:27 PM UTC 24 634984228 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_alert_test.3871420666 Sep 24 07:59:25 PM UTC 24 Sep 24 07:59:27 PM UTC 24 10546001 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_random.138911131 Sep 24 07:59:22 PM UTC 24 Sep 24 07:59:27 PM UTC 24 150687511 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_otbn.2605070211 Sep 24 07:59:22 PM UTC 24 Sep 24 07:59:28 PM UTC 24 691916765 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_aes.1987377657 Sep 24 07:59:08 PM UTC 24 Sep 24 07:59:29 PM UTC 24 978782485 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_smoke.2927372483 Sep 24 07:59:25 PM UTC 24 Sep 24 07:59:29 PM UTC 24 48631350 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_kmac_rsp_err.4226025652 Sep 24 07:59:23 PM UTC 24 Sep 24 07:59:29 PM UTC 24 345798198 ps
T236 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_lc_disable.2847489998 Sep 24 07:59:22 PM UTC 24 Sep 24 07:59:30 PM UTC 24 279812435 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sideload.485027241 Sep 24 07:59:26 PM UTC 24 Sep 24 07:59:30 PM UTC 24 64593386 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_kmac.1361138096 Sep 24 07:59:26 PM UTC 24 Sep 24 07:59:30 PM UTC 24 122579788 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_protect.1671367140 Sep 24 07:59:23 PM UTC 24 Sep 24 07:59:31 PM UTC 24 176253976 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_aes.4252137454 Sep 24 07:59:27 PM UTC 24 Sep 24 07:59:31 PM UTC 24 36663842 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_custom_cm.1635339283 Sep 24 07:59:23 PM UTC 24 Sep 24 07:59:32 PM UTC 24 272572901 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_lc_disable.3494208534 Sep 24 07:59:29 PM UTC 24 Sep 24 07:59:32 PM UTC 24 127179513 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_otbn.2599593449 Sep 24 07:59:27 PM UTC 24 Sep 24 07:59:33 PM UTC 24 211209648 ps
T256 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_cfg_regwen.3699268523 Sep 24 07:59:22 PM UTC 24 Sep 24 07:59:33 PM UTC 24 120585357 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_alert_test.1759327033 Sep 24 07:59:31 PM UTC 24 Sep 24 07:59:33 PM UTC 24 10559668 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sw_invalid_input.2929026548 Sep 24 07:59:29 PM UTC 24 Sep 24 07:59:33 PM UTC 24 185183384 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sync_async_fault_cross.3931410441 Sep 24 07:59:30 PM UTC 24 Sep 24 07:59:34 PM UTC 24 125840214 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_direct_to_disabled.2653917199 Sep 24 07:59:29 PM UTC 24 Sep 24 07:59:34 PM UTC 24 77547120 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_protect.2499355111 Sep 24 07:59:30 PM UTC 24 Sep 24 07:59:34 PM UTC 24 60315759 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_random.930604761 Sep 24 07:59:28 PM UTC 24 Sep 24 07:59:34 PM UTC 24 721447921 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_hwsw_invalid_input.3899456810 Sep 24 07:59:23 PM UTC 24 Sep 24 07:59:35 PM UTC 24 493165909 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_sw_invalid_input.2763845473 Sep 24 07:59:23 PM UTC 24 Sep 24 07:59:36 PM UTC 24 1280077538 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all_with_rand_reset.2547817318 Sep 24 07:59:24 PM UTC 24 Sep 24 07:59:36 PM UTC 24 170758645 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_custom_cm.2317032910 Sep 24 07:59:30 PM UTC 24 Sep 24 07:59:39 PM UTC 24 119930229 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_direct_to_disabled.3544818208 Sep 24 07:59:22 PM UTC 24 Sep 24 07:59:40 PM UTC 24 2515284680 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all.1395370312 Sep 24 07:59:24 PM UTC 24 Sep 24 07:59:47 PM UTC 24 733970831 ps
T235 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/38.keymgr_stress_all.757226628 Sep 24 07:58:09 PM UTC 24 Sep 24 07:59:50 PM UTC 24 12549777567 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all_with_rand_reset.861036113 Sep 24 07:59:31 PM UTC 24 Sep 24 07:59:51 PM UTC 24 1362070706 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_otbn.1325644875 Sep 24 07:59:08 PM UTC 24 Sep 24 07:59:57 PM UTC 24 3356093925 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all.261407504 Sep 24 07:59:31 PM UTC 24 Sep 24 08:00:04 PM UTC 24 3455862825 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/47.keymgr_stress_all.4039675486 Sep 24 07:59:17 PM UTC 24 Sep 24 08:00:07 PM UTC 24 2019361240 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/37.keymgr_stress_all.210991611 Sep 24 07:58:00 PM UTC 24 Sep 24 08:00:18 PM UTC 24 33462905841 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/49.keymgr_cfg_regwen.3533374481 Sep 24 07:59:29 PM UTC 24 Sep 24 08:00:18 PM UTC 24 3333694785 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all.3073551959 Sep 24 07:58:57 PM UTC 24 Sep 24 08:01:36 PM UTC 24 5933455741 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/default/21.keymgr_stress_all.2390481156 Sep 24 07:55:38 PM UTC 24 Sep 24 08:03:34 PM UTC 24 76724132022 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_intr_test.824744623 Sep 24 07:59:33 PM UTC 24 Sep 24 07:59:35 PM UTC 24 20820455 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_errors.964043723 Sep 24 07:59:33 PM UTC 24 Sep 24 07:59:36 PM UTC 24 19391652 ps
T144 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_hw_reset.3572517091 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:38 PM UTC 24 129140452 ps
T73 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors_with_csr_rw.732608321 Sep 24 07:59:33 PM UTC 24 Sep 24 07:59:38 PM UTC 24 530535794 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_rw.1133546523 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:38 PM UTC 24 21596520 ps
T108 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors.2670302387 Sep 24 07:59:32 PM UTC 24 Sep 24 07:59:38 PM UTC 24 512960868 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_intr_test.1105030018 Sep 24 07:59:36 PM UTC 24 Sep 24 07:59:38 PM UTC 24 51871618 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_mem_rw_with_rand_reset.3609577576 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:39 PM UTC 24 93167296 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_hw_reset.3943936916 Sep 24 07:59:36 PM UTC 24 Sep 24 07:59:39 PM UTC 24 44342696 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_same_csr_outstanding.2721487757 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:39 PM UTC 24 267790316 ps
T75 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_rw.2242709781 Sep 24 07:59:36 PM UTC 24 Sep 24 07:59:39 PM UTC 24 95072308 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_intg_err.117021223 Sep 24 07:59:33 PM UTC 24 Sep 24 07:59:40 PM UTC 24 135403182 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_errors.69471968 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:40 PM UTC 24 172112593 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_mem_rw_with_rand_reset.1183046054 Sep 24 07:59:39 PM UTC 24 Sep 24 07:59:41 PM UTC 24 41112125 ps
T109 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors.3213620415 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:42 PM UTC 24 316249237 ps
T76 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_same_csr_outstanding.1191719244 Sep 24 07:59:39 PM UTC 24 Sep 24 07:59:42 PM UTC 24 76381329 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_errors.3792655002 Sep 24 07:59:39 PM UTC 24 Sep 24 07:59:43 PM UTC 24 810125460 ps
T107 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors.3259631884 Sep 24 07:59:39 PM UTC 24 Sep 24 07:59:44 PM UTC 24 127246532 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_intg_err.1413319643 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:44 PM UTC 24 135110971 ps
T77 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors_with_csr_rw.899140854 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:46 PM UTC 24 180893731 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_aliasing.1531298544 Sep 24 07:59:35 PM UTC 24 Sep 24 07:59:46 PM UTC 24 722139081 ps
T78 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_aliasing.1977042635 Sep 24 07:59:38 PM UTC 24 Sep 24 07:59:48 PM UTC 24 503114110 ps
T79 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors_with_csr_rw.260086279 Sep 24 07:59:39 PM UTC 24 Sep 24 07:59:49 PM UTC 24 316570418 ps
T80 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_rw.2875746761 Sep 24 07:59:47 PM UTC 24 Sep 24 07:59:50 PM UTC 24 78887131 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_intr_test.979627192 Sep 24 07:59:47 PM UTC 24 Sep 24 07:59:50 PM UTC 24 22720042 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_intr_test.2215009374 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:50 PM UTC 24 18363346 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_hw_reset.3793041967 Sep 24 07:59:47 PM UTC 24 Sep 24 07:59:50 PM UTC 24 111371587 ps
T81 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_rw.2496448570 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:50 PM UTC 24 12528578 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_hw_reset.3540425058 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:51 PM UTC 24 64831863 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_mem_rw_with_rand_reset.1942809537 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:52 PM UTC 24 259062146 ps
T110 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors.4231761636 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:52 PM UTC 24 507158031 ps
T82 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_same_csr_outstanding.4270467384 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:52 PM UTC 24 106392280 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_bit_bash.606307351 Sep 24 07:59:37 PM UTC 24 Sep 24 07:59:53 PM UTC 24 1328969199 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_mem_rw_with_rand_reset.3466952739 Sep 24 07:59:49 PM UTC 24 Sep 24 07:59:53 PM UTC 24 29504629 ps
T162 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_intg_err.1391439648 Sep 24 07:59:47 PM UTC 24 Sep 24 07:59:53 PM UTC 24 109625402 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_same_csr_outstanding.3336917561 Sep 24 07:59:49 PM UTC 24 Sep 24 07:59:53 PM UTC 24 93677666 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_errors.3242788930 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:53 PM UTC 24 48779447 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_intr_test.2291949907 Sep 24 07:59:52 PM UTC 24 Sep 24 07:59:54 PM UTC 24 12109356 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_rw.1453126233 Sep 24 07:59:52 PM UTC 24 Sep 24 07:59:54 PM UTC 24 24849288 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_hw_reset.1431534884 Sep 24 07:59:52 PM UTC 24 Sep 24 07:59:54 PM UTC 24 39853749 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors.4158214825 Sep 24 07:59:49 PM UTC 24 Sep 24 07:59:55 PM UTC 24 175357366 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_errors.1493588857 Sep 24 07:59:50 PM UTC 24 Sep 24 07:59:56 PM UTC 24 2017158096 ps
T160 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_intg_err.18674808 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:56 PM UTC 24 818778630 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_mem_rw_with_rand_reset.3954101268 Sep 24 07:59:53 PM UTC 24 Sep 24 07:59:57 PM UTC 24 107481915 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_intr_test.2851406137 Sep 24 07:59:54 PM UTC 24 Sep 24 07:59:57 PM UTC 24 18364342 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_intg_err.1581865514 Sep 24 07:59:50 PM UTC 24 Sep 24 07:59:57 PM UTC 24 210812874 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_same_csr_outstanding.2281689605 Sep 24 07:59:53 PM UTC 24 Sep 24 07:59:57 PM UTC 24 245563856 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_aliasing.4165069424 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:57 PM UTC 24 510302577 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_rw.1063863999 Sep 24 07:59:55 PM UTC 24 Sep 24 07:59:58 PM UTC 24 24900550 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors.3233194124 Sep 24 07:59:53 PM UTC 24 Sep 24 07:59:58 PM UTC 24 277467849 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_bit_bash.453656184 Sep 24 07:59:35 PM UTC 24 Sep 24 08:00:03 PM UTC 24 6139176964 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_mem_rw_with_rand_reset.2500292529 Sep 24 07:59:56 PM UTC 24 Sep 24 07:59:59 PM UTC 24 40311584 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_errors.2299555176 Sep 24 07:59:54 PM UTC 24 Sep 24 07:59:59 PM UTC 24 104104161 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors_with_csr_rw.1798139825 Sep 24 07:59:48 PM UTC 24 Sep 24 07:59:59 PM UTC 24 161919776 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_intr_test.2822726261 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:00 PM UTC 24 22546079 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_rw.3389118662 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:01 PM UTC 24 41851194 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors_with_csr_rw.1444097607 Sep 24 07:59:50 PM UTC 24 Sep 24 08:00:01 PM UTC 24 218925488 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_intg_err.2888293018 Sep 24 07:59:57 PM UTC 24 Sep 24 08:00:01 PM UTC 24 216492841 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_intr_test.3270391086 Sep 24 08:00:00 PM UTC 24 Sep 24 08:00:02 PM UTC 24 10120056 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_errors.1272999900 Sep 24 07:59:57 PM UTC 24 Sep 24 08:00:02 PM UTC 24 109999949 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors.740322827 Sep 24 07:59:56 PM UTC 24 Sep 24 08:00:02 PM UTC 24 497372508 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_rw.1418983099 Sep 24 08:00:00 PM UTC 24 Sep 24 08:00:02 PM UTC 24 45418986 ps
T111 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors_with_csr_rw.517038874 Sep 24 07:59:54 PM UTC 24 Sep 24 08:00:02 PM UTC 24 637167100 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_same_csr_outstanding.1591912099 Sep 24 07:59:55 PM UTC 24 Sep 24 08:00:02 PM UTC 24 200594947 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_same_csr_outstanding.364188969 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:02 PM UTC 24 354977947 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_intg_err.1548384100 Sep 24 07:59:54 PM UTC 24 Sep 24 08:00:02 PM UTC 24 407525016 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors.38295432 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:02 PM UTC 24 52404499 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_bit_bash.1616223777 Sep 24 07:59:48 PM UTC 24 Sep 24 08:00:03 PM UTC 24 2690879122 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_mem_rw_with_rand_reset.1277001626 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:03 PM UTC 24 43429285 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_same_csr_outstanding.1378784755 Sep 24 08:00:00 PM UTC 24 Sep 24 08:00:04 PM UTC 24 63053993 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_errors.2283032320 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:05 PM UTC 24 427797595 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_aliasing.2811394922 Sep 24 07:59:48 PM UTC 24 Sep 24 08:00:05 PM UTC 24 1547081457 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_bit_bash.2208330786 Sep 24 07:59:52 PM UTC 24 Sep 24 08:00:05 PM UTC 24 858809981 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors_with_csr_rw.2361508589 Sep 24 07:59:57 PM UTC 24 Sep 24 08:00:06 PM UTC 24 227384648 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_bit_bash.602786998 Sep 24 07:59:47 PM UTC 24 Sep 24 08:00:07 PM UTC 24 263939845 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors_with_csr_rw.3404657487 Sep 24 07:59:58 PM UTC 24 Sep 24 08:00:09 PM UTC 24 302933464 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_aliasing.2843015332 Sep 24 07:59:52 PM UTC 24 Sep 24 08:00:09 PM UTC 24 3064720232 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_intg_err.3934851203 Sep 24 07:59:59 PM UTC 24 Sep 24 08:00:10 PM UTC 24 223212124 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_mem_rw_with_rand_reset.875320015 Sep 24 08:00:01 PM UTC 24 Sep 24 08:00:10 PM UTC 24 59172847 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors.1041190829 Sep 24 08:00:02 PM UTC 24 Sep 24 08:00:10 PM UTC 24 67522616 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_intr_test.3520134405 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:10 PM UTC 24 39575382 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_rw.829818807 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:11 PM UTC 24 32577314 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_intr_test.3857955963 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:11 PM UTC 24 76974635 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_rw.3871916495 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:11 PM UTC 24 26906514 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_intr_test.1517171774 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:11 PM UTC 24 14485814 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_rw.1238934507 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:12 PM UTC 24 25656224 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_mem_rw_with_rand_reset.1306878962 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:12 PM UTC 24 202976701 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors_with_csr_rw.3287560241 Sep 24 08:00:02 PM UTC 24 Sep 24 08:00:12 PM UTC 24 352507922 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_mem_rw_with_rand_reset.1151708248 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:12 PM UTC 24 47706709 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_same_csr_outstanding.788063156 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:12 PM UTC 24 337057112 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors.3360399334 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:12 PM UTC 24 547809574 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_errors.964522106 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:13 PM UTC 24 317272779 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_errors.2449382497 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:13 PM UTC 24 46632106 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_errors.2111330991 Sep 24 08:00:02 PM UTC 24 Sep 24 08:00:13 PM UTC 24 1418535459 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_mem_rw_with_rand_reset.1495085583 Sep 24 08:00:11 PM UTC 24 Sep 24 08:00:14 PM UTC 24 109072213 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_same_csr_outstanding.410158518 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:14 PM UTC 24 89396234 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_same_csr_outstanding.1807293557 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:14 PM UTC 24 158767353 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_intr_test.1860692304 Sep 24 08:00:12 PM UTC 24 Sep 24 08:00:14 PM UTC 24 15573926 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors.3820568448 Sep 24 08:00:11 PM UTC 24 Sep 24 08:00:15 PM UTC 24 513910705 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors.639375332 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:15 PM UTC 24 142764381 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_tl_errors.937762480 Sep 24 08:00:11 PM UTC 24 Sep 24 08:00:15 PM UTC 24 49013654 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_rw.1477069542 Sep 24 08:00:12 PM UTC 24 Sep 24 08:00:15 PM UTC 24 68610366 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_intg_err.3844756018 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:16 PM UTC 24 1643203818 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_intg_err.2633587956 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:16 PM UTC 24 951176438 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_intr_test.173674988 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:16 PM UTC 24 10562159 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_intg_err.2308042359 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:16 PM UTC 24 270357033 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_mem_rw_with_rand_reset.3407357615 Sep 24 08:00:12 PM UTC 24 Sep 24 08:00:16 PM UTC 24 61598647 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors_with_csr_rw.4275248890 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:16 PM UTC 24 321997712 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_same_csr_outstanding.3554090747 Sep 24 08:00:12 PM UTC 24 Sep 24 08:00:17 PM UTC 24 521846046 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_rw.3518198597 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:17 PM UTC 24 25360788 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_shadow_reg_errors.1524004124 Sep 24 08:00:12 PM UTC 24 Sep 24 08:00:17 PM UTC 24 1268778601 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_mem_rw_with_rand_reset.28765361 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:17 PM UTC 24 64663599 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_intr_test.1519277341 Sep 24 08:00:16 PM UTC 24 Sep 24 08:00:18 PM UTC 24 41414300 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors_with_csr_rw.4112583080 Sep 24 08:00:11 PM UTC 24 Sep 24 08:00:18 PM UTC 24 236121934 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_same_csr_outstanding.2537993136 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:18 PM UTC 24 484094012 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_shadow_reg_errors.1234073094 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:18 PM UTC 24 72633318 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_csr_rw.342637135 Sep 24 08:00:16 PM UTC 24 Sep 24 08:00:19 PM UTC 24 16835102 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors_with_csr_rw.3360177199 Sep 24 08:00:09 PM UTC 24 Sep 24 08:00:19 PM UTC 24 572455012 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_tl_errors.311334829 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:19 PM UTC 24 129534500 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_csr_mem_rw_with_rand_reset.2867046003 Sep 24 08:00:16 PM UTC 24 Sep 24 08:00:19 PM UTC 24 31988024 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_intr_test.1711015847 Sep 24 08:00:18 PM UTC 24 Sep 24 08:00:20 PM UTC 24 10240311 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_csr_rw.2975446708 Sep 24 08:00:18 PM UTC 24 Sep 24 08:00:20 PM UTC 24 62339796 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_same_csr_outstanding.2467935152 Sep 24 08:00:16 PM UTC 24 Sep 24 08:00:20 PM UTC 24 288489943 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_shadow_reg_errors.2782802689 Sep 24 08:00:16 PM UTC 24 Sep 24 08:00:21 PM UTC 24 176144479 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_tl_errors.2793664858 Sep 24 08:00:18 PM UTC 24 Sep 24 08:00:21 PM UTC 24 24197247 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_same_csr_outstanding.3227818843 Sep 24 08:00:18 PM UTC 24 Sep 24 08:00:21 PM UTC 24 81028203 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_shadow_reg_errors_with_csr_rw.1004840858 Sep 24 08:00:14 PM UTC 24 Sep 24 08:00:21 PM UTC 24 815287852 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_csr_mem_rw_with_rand_reset.2340314881 Sep 24 08:00:18 PM UTC 24 Sep 24 08:00:21 PM UTC 24 25369277 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_23/keymgr-sim-vcs/coverage/cover_reg_top/15.keymgr_shadow_reg_errors.1100251646 Sep 24 08:00:18 PM UTC 24 Sep 24 08:00:22 PM UTC 24 126336542 ps
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