T803 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/43.keymgr_random.125721137 |
|
|
Oct 03 02:02:24 AM UTC 24 |
Oct 03 02:02:31 AM UTC 24 |
352462386 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sideload.3536550326 |
|
|
Oct 03 02:02:28 AM UTC 24 |
Oct 03 02:02:32 AM UTC 24 |
146822380 ps |
T332 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/43.keymgr_hwsw_invalid_input.1228688131 |
|
|
Oct 03 02:02:25 AM UTC 24 |
Oct 03 02:02:32 AM UTC 24 |
212932649 ps |
T805 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/43.keymgr_kmac_rsp_err.1434703476 |
|
|
Oct 03 02:02:25 AM UTC 24 |
Oct 03 02:02:32 AM UTC 24 |
146361113 ps |
T176 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/42.keymgr_sync_async_fault_cross.849519942 |
|
|
Oct 03 02:02:22 AM UTC 24 |
Oct 03 02:02:33 AM UTC 24 |
323247393 ps |
T806 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/40.keymgr_sideload_kmac.3658022779 |
|
|
Oct 03 02:02:05 AM UTC 24 |
Oct 03 02:02:33 AM UTC 24 |
2738038784 ps |
T807 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_protect.3565214353 |
|
|
Oct 03 02:02:42 AM UTC 24 |
Oct 03 02:02:46 AM UTC 24 |
106984549 ps |
T808 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_smoke.952842389 |
|
|
Oct 03 02:02:42 AM UTC 24 |
Oct 03 02:02:47 AM UTC 24 |
85464811 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all.478796715 |
|
|
Oct 03 02:02:16 AM UTC 24 |
Oct 03 02:02:33 AM UTC 24 |
2487418993 ps |
T809 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_direct_to_disabled.2004438740 |
|
|
Oct 03 02:02:30 AM UTC 24 |
Oct 03 02:02:34 AM UTC 24 |
63461361 ps |
T810 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_alert_test.1920044870 |
|
|
Oct 03 02:02:32 AM UTC 24 |
Oct 03 02:02:34 AM UTC 24 |
16459577 ps |
T811 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_custom_cm.1104217913 |
|
|
Oct 03 02:02:30 AM UTC 24 |
Oct 03 02:02:34 AM UTC 24 |
105795208 ps |
T812 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sw_invalid_input.3642091369 |
|
|
Oct 03 02:02:30 AM UTC 24 |
Oct 03 02:02:35 AM UTC 24 |
105675310 ps |
T813 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_aes.2265041384 |
|
|
Oct 03 02:02:29 AM UTC 24 |
Oct 03 02:02:35 AM UTC 24 |
98525299 ps |
T192 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/41.keymgr_stress_all_with_rand_reset.910444816 |
|
|
Oct 03 02:02:16 AM UTC 24 |
Oct 03 02:02:35 AM UTC 24 |
1782309204 ps |
T814 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_otbn.3342430077 |
|
|
Oct 03 02:02:29 AM UTC 24 |
Oct 03 02:02:35 AM UTC 24 |
194973270 ps |
T815 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/42.keymgr_sideload_otbn.19774545 |
|
|
Oct 03 02:02:19 AM UTC 24 |
Oct 03 02:02:35 AM UTC 24 |
838843232 ps |
T816 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_kmac_rsp_err.2255250939 |
|
|
Oct 03 02:02:30 AM UTC 24 |
Oct 03 02:02:35 AM UTC 24 |
479250290 ps |
T817 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_protect.1560562377 |
|
|
Oct 03 02:02:31 AM UTC 24 |
Oct 03 02:02:36 AM UTC 24 |
199513735 ps |
T818 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sideload_kmac.605085235 |
|
|
Oct 03 02:02:28 AM UTC 24 |
Oct 03 02:02:36 AM UTC 24 |
221948873 ps |
T819 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_stress_all.917643006 |
|
|
Oct 03 02:02:37 AM UTC 24 |
Oct 03 02:02:47 AM UTC 24 |
1006914434 ps |
T820 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_sync_async_fault_cross.800526031 |
|
|
Oct 03 02:02:32 AM UTC 24 |
Oct 03 02:02:36 AM UTC 24 |
291166484 ps |
T821 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_hwsw_invalid_input.1062762950 |
|
|
Oct 03 02:02:30 AM UTC 24 |
Oct 03 02:02:37 AM UTC 24 |
129116511 ps |
T822 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_smoke.3464346497 |
|
|
Oct 03 02:02:33 AM UTC 24 |
Oct 03 02:02:37 AM UTC 24 |
254449119 ps |
T823 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_random.1116693787 |
|
|
Oct 03 02:02:29 AM UTC 24 |
Oct 03 02:02:37 AM UTC 24 |
110494480 ps |
T824 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_kmac.3475540122 |
|
|
Oct 03 02:02:33 AM UTC 24 |
Oct 03 02:02:38 AM UTC 24 |
166409420 ps |
T825 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_random.3456306156 |
|
|
Oct 03 02:02:34 AM UTC 24 |
Oct 03 02:02:39 AM UTC 24 |
265180470 ps |
T826 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_cfg_regwen.3368155206 |
|
|
Oct 03 02:02:34 AM UTC 24 |
Oct 03 02:02:39 AM UTC 24 |
34349077 ps |
T827 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_lc_disable.1383489723 |
|
|
Oct 03 02:02:30 AM UTC 24 |
Oct 03 02:02:39 AM UTC 24 |
179635431 ps |
T828 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_smoke.2611319658 |
|
|
Oct 03 02:02:28 AM UTC 24 |
Oct 03 02:02:39 AM UTC 24 |
457083731 ps |
T235 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/37.keymgr_stress_all.1536929006 |
|
|
Oct 03 02:01:50 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
12529046473 ps |
T352 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_kmac_rsp_err.1420770245 |
|
|
Oct 03 02:02:36 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
476174554 ps |
T829 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_otbn.1060567874 |
|
|
Oct 03 02:02:34 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
410541445 ps |
T830 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_alert_test.2276840299 |
|
|
Oct 03 02:02:38 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
12986490 ps |
T831 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/43.keymgr_stress_all.932428836 |
|
|
Oct 03 02:02:26 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
1564243238 ps |
T832 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_direct_to_disabled.1033599819 |
|
|
Oct 03 02:02:35 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
309990878 ps |
T833 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_sideload.258252805 |
|
|
Oct 03 02:02:33 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
929147336 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_cfg_regwen.3303468135 |
|
|
Oct 03 02:02:29 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
184600809 ps |
T834 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_lc_disable.1911701656 |
|
|
Oct 03 02:02:35 AM UTC 24 |
Oct 03 02:02:40 AM UTC 24 |
79152467 ps |
T835 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_sw_invalid_input.2931654996 |
|
|
Oct 03 02:02:35 AM UTC 24 |
Oct 03 02:02:41 AM UTC 24 |
47863434 ps |
T836 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_protect.2179172723 |
|
|
Oct 03 02:02:37 AM UTC 24 |
Oct 03 02:02:41 AM UTC 24 |
210567252 ps |
T182 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_custom_cm.1184186551 |
|
|
Oct 03 02:02:37 AM UTC 24 |
Oct 03 02:02:42 AM UTC 24 |
224358763 ps |
T837 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_hwsw_invalid_input.875165651 |
|
|
Oct 03 02:02:35 AM UTC 24 |
Oct 03 02:02:42 AM UTC 24 |
593921114 ps |
T838 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/45.keymgr_sideload_aes.3903934293 |
|
|
Oct 03 02:02:34 AM UTC 24 |
Oct 03 02:02:43 AM UTC 24 |
529248474 ps |
T839 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_stress_all.1085840746 |
|
|
Oct 03 02:02:42 AM UTC 24 |
Oct 03 02:02:46 AM UTC 24 |
504864767 ps |
T840 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_sideload.844449663 |
|
|
Oct 03 02:02:38 AM UTC 24 |
Oct 03 02:02:44 AM UTC 24 |
256899447 ps |
T841 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_hwsw_invalid_input.1777061032 |
|
|
Oct 03 02:02:41 AM UTC 24 |
Oct 03 02:02:45 AM UTC 24 |
105239663 ps |
T842 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_sw_invalid_input.3691551116 |
|
|
Oct 03 02:02:41 AM UTC 24 |
Oct 03 02:02:47 AM UTC 24 |
362711344 ps |
T843 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_otbn.1871742926 |
|
|
Oct 03 02:02:39 AM UTC 24 |
Oct 03 02:02:44 AM UTC 24 |
114259332 ps |
T844 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/43.keymgr_sw_invalid_input.4134087747 |
|
|
Oct 03 02:02:25 AM UTC 24 |
Oct 03 02:02:44 AM UTC 24 |
516871388 ps |
T845 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_custom_cm.4273929589 |
|
|
Oct 03 02:02:41 AM UTC 24 |
Oct 03 02:02:44 AM UTC 24 |
74446272 ps |
T846 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_alert_test.4226256018 |
|
|
Oct 03 02:02:42 AM UTC 24 |
Oct 03 02:02:44 AM UTC 24 |
40588524 ps |
T847 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_kmac.4131375622 |
|
|
Oct 03 02:02:38 AM UTC 24 |
Oct 03 02:02:45 AM UTC 24 |
270603085 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_direct_to_disabled.958260832 |
|
|
Oct 03 02:02:41 AM UTC 24 |
Oct 03 02:02:45 AM UTC 24 |
51129851 ps |
T848 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/40.keymgr_custom_cm.2456783540 |
|
|
Oct 03 02:02:08 AM UTC 24 |
Oct 03 02:02:45 AM UTC 24 |
5088500749 ps |
T849 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_kmac_rsp_err.2032206441 |
|
|
Oct 03 02:02:41 AM UTC 24 |
Oct 03 02:02:45 AM UTC 24 |
77068207 ps |
T850 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sideload.3652830181 |
|
|
Oct 03 02:02:42 AM UTC 24 |
Oct 03 02:02:47 AM UTC 24 |
55476453 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_aes.2972212570 |
|
|
Oct 03 02:02:43 AM UTC 24 |
Oct 03 02:02:48 AM UTC 24 |
92347487 ps |
T852 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_lc_disable.2092284443 |
|
|
Oct 03 02:02:41 AM UTC 24 |
Oct 03 02:02:48 AM UTC 24 |
221469983 ps |
T853 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_kmac.3171100827 |
|
|
Oct 03 02:02:43 AM UTC 24 |
Oct 03 02:02:48 AM UTC 24 |
295114009 ps |
T336 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_cfg_regwen.1955635139 |
|
|
Oct 03 02:02:45 AM UTC 24 |
Oct 03 02:02:49 AM UTC 24 |
48724163 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sync_async_fault_cross.3028920086 |
|
|
Oct 03 02:02:46 AM UTC 24 |
Oct 03 02:02:49 AM UTC 24 |
467522144 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_direct_to_disabled.1987561401 |
|
|
Oct 03 02:02:45 AM UTC 24 |
Oct 03 02:02:49 AM UTC 24 |
608109751 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_alert_test.1761951195 |
|
|
Oct 03 02:02:47 AM UTC 24 |
Oct 03 02:02:50 AM UTC 24 |
39453144 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_protect.2408368623 |
|
|
Oct 03 02:02:46 AM UTC 24 |
Oct 03 02:02:50 AM UTC 24 |
325460150 ps |
T858 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_kmac_rsp_err.1776549869 |
|
|
Oct 03 02:02:46 AM UTC 24 |
Oct 03 02:02:50 AM UTC 24 |
35020421 ps |
T859 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_hwsw_invalid_input.1390826435 |
|
|
Oct 03 02:02:45 AM UTC 24 |
Oct 03 02:02:50 AM UTC 24 |
75516482 ps |
T860 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_lc_disable.2872947963 |
|
|
Oct 03 02:02:45 AM UTC 24 |
Oct 03 02:02:50 AM UTC 24 |
545899693 ps |
T183 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_custom_cm.3580641320 |
|
|
Oct 03 02:02:46 AM UTC 24 |
Oct 03 02:02:51 AM UTC 24 |
99429504 ps |
T861 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sw_invalid_input.1118761664 |
|
|
Oct 03 02:02:45 AM UTC 24 |
Oct 03 02:02:51 AM UTC 24 |
864092164 ps |
T862 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all_with_rand_reset.3800272148 |
|
|
Oct 03 02:02:32 AM UTC 24 |
Oct 03 02:02:51 AM UTC 24 |
676882602 ps |
T863 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_random.1664881416 |
|
|
Oct 03 02:02:45 AM UTC 24 |
Oct 03 02:02:52 AM UTC 24 |
368475384 ps |
T864 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_kmac.3702647973 |
|
|
Oct 03 02:02:48 AM UTC 24 |
Oct 03 02:02:52 AM UTC 24 |
110049147 ps |
T865 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_smoke.21790699 |
|
|
Oct 03 02:02:47 AM UTC 24 |
Oct 03 02:02:52 AM UTC 24 |
567100732 ps |
T866 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_random.3269635382 |
|
|
Oct 03 02:02:49 AM UTC 24 |
Oct 03 02:02:53 AM UTC 24 |
34509055 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_sideload_otbn.2788322352 |
|
|
Oct 03 02:02:44 AM UTC 24 |
Oct 03 02:02:53 AM UTC 24 |
840985430 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_lc_disable.3423156371 |
|
|
Oct 03 02:02:49 AM UTC 24 |
Oct 03 02:02:53 AM UTC 24 |
33800104 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_alert_test.2225511246 |
|
|
Oct 03 02:02:52 AM UTC 24 |
Oct 03 02:02:54 AM UTC 24 |
14438540 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_cfg_regwen.2228937279 |
|
|
Oct 03 02:02:49 AM UTC 24 |
Oct 03 02:02:54 AM UTC 24 |
80537600 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sync_async_fault_cross.670211389 |
|
|
Oct 03 02:02:51 AM UTC 24 |
Oct 03 02:02:55 AM UTC 24 |
63476630 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_hwsw_invalid_input.4284138774 |
|
|
Oct 03 02:02:50 AM UTC 24 |
Oct 03 02:02:55 AM UTC 24 |
407257810 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_custom_cm.206047821 |
|
|
Oct 03 02:02:50 AM UTC 24 |
Oct 03 02:02:55 AM UTC 24 |
589931798 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all.857934945 |
|
|
Oct 03 02:02:52 AM UTC 24 |
Oct 03 02:02:56 AM UTC 24 |
529561309 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_direct_to_disabled.3418994644 |
|
|
Oct 03 02:02:49 AM UTC 24 |
Oct 03 02:02:56 AM UTC 24 |
707749149 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_aes.3635146366 |
|
|
Oct 03 02:02:49 AM UTC 24 |
Oct 03 02:02:56 AM UTC 24 |
796872419 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sideload.1179744637 |
|
|
Oct 03 02:02:53 AM UTC 24 |
Oct 03 02:02:56 AM UTC 24 |
117511408 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_otbn.1517438338 |
|
|
Oct 03 02:02:49 AM UTC 24 |
Oct 03 02:02:57 AM UTC 24 |
224887003 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sideload_protect.3165212526 |
|
|
Oct 03 02:02:51 AM UTC 24 |
Oct 03 02:02:57 AM UTC 24 |
514727250 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_stress_all_with_rand_reset.3967235126 |
|
|
Oct 03 02:02:46 AM UTC 24 |
Oct 03 02:02:57 AM UTC 24 |
102312501 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sw_invalid_input.75427322 |
|
|
Oct 03 02:02:50 AM UTC 24 |
Oct 03 02:02:57 AM UTC 24 |
201911452 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_direct_to_disabled.37552813 |
|
|
Oct 03 02:02:54 AM UTC 24 |
Oct 03 02:02:57 AM UTC 24 |
513926217 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_smoke.3156887685 |
|
|
Oct 03 02:02:38 AM UTC 24 |
Oct 03 02:02:57 AM UTC 24 |
1216432489 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_smoke.409244046 |
|
|
Oct 03 02:02:53 AM UTC 24 |
Oct 03 02:02:58 AM UTC 24 |
113243964 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_kmac.610695111 |
|
|
Oct 03 02:02:53 AM UTC 24 |
Oct 03 02:02:58 AM UTC 24 |
388463468 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_aes.543682316 |
|
|
Oct 03 02:02:53 AM UTC 24 |
Oct 03 02:02:58 AM UTC 24 |
179521949 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_kmac_rsp_err.854349814 |
|
|
Oct 03 02:02:50 AM UTC 24 |
Oct 03 02:02:59 AM UTC 24 |
1417848751 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_otbn.1320054658 |
|
|
Oct 03 02:02:53 AM UTC 24 |
Oct 03 02:02:59 AM UTC 24 |
103043152 ps |
T381 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_kmac_rsp_err.2798830520 |
|
|
Oct 03 02:02:56 AM UTC 24 |
Oct 03 02:02:59 AM UTC 24 |
68919337 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_cfg_regwen.534339669 |
|
|
Oct 03 02:02:54 AM UTC 24 |
Oct 03 02:03:00 AM UTC 24 |
62885355 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_lc_disable.608981664 |
|
|
Oct 03 02:02:54 AM UTC 24 |
Oct 03 02:03:00 AM UTC 24 |
101599093 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_stress_all_with_rand_reset.1323968748 |
|
|
Oct 03 02:02:52 AM UTC 24 |
Oct 03 02:03:00 AM UTC 24 |
176006536 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_alert_test.3224703780 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:00 AM UTC 24 |
47284808 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_hwsw_invalid_input.2558482154 |
|
|
Oct 03 02:02:55 AM UTC 24 |
Oct 03 02:03:01 AM UTC 24 |
332217783 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_sideload_aes.2866669336 |
|
|
Oct 03 02:02:38 AM UTC 24 |
Oct 03 02:03:01 AM UTC 24 |
605969616 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sync_async_fault_cross.366475809 |
|
|
Oct 03 02:02:57 AM UTC 24 |
Oct 03 02:03:02 AM UTC 24 |
142690187 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sideload_protect.935030550 |
|
|
Oct 03 02:02:57 AM UTC 24 |
Oct 03 02:03:02 AM UTC 24 |
390048371 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_custom_cm.2261743676 |
|
|
Oct 03 02:02:56 AM UTC 24 |
Oct 03 02:03:04 AM UTC 24 |
129669407 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/36.keymgr_stress_all.3122645472 |
|
|
Oct 03 02:01:45 AM UTC 24 |
Oct 03 02:03:05 AM UTC 24 |
9779068797 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/44.keymgr_stress_all.2590021343 |
|
|
Oct 03 02:02:32 AM UTC 24 |
Oct 03 02:03:10 AM UTC 24 |
3517009648 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_sw_invalid_input.668335170 |
|
|
Oct 03 02:02:54 AM UTC 24 |
Oct 03 02:03:15 AM UTC 24 |
1024335979 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_cfg_regwen.482603299 |
|
|
Oct 03 02:02:40 AM UTC 24 |
Oct 03 02:03:17 AM UTC 24 |
712953571 ps |
T238 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/47.keymgr_stress_all.3551131188 |
|
|
Oct 03 02:02:46 AM UTC 24 |
Oct 03 02:03:22 AM UTC 24 |
2542312403 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/39.keymgr_random.4032167807 |
|
|
Oct 03 02:01:59 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
27276297576 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/24.keymgr_stress_all.3874057441 |
|
|
Oct 03 02:00:34 AM UTC 24 |
Oct 03 02:03:38 AM UTC 24 |
45393794780 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/48.keymgr_sideload.568579804 |
|
|
Oct 03 02:02:48 AM UTC 24 |
Oct 03 02:03:41 AM UTC 24 |
15339742640 ps |
T337 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_stress_all.1335904413 |
|
|
Oct 03 02:02:57 AM UTC 24 |
Oct 03 02:03:50 AM UTC 24 |
2173867093 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/49.keymgr_random.1801105696 |
|
|
Oct 03 02:02:53 AM UTC 24 |
Oct 03 02:04:04 AM UTC 24 |
7251490446 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/40.keymgr_stress_all.23863784 |
|
|
Oct 03 02:02:09 AM UTC 24 |
Oct 03 02:04:05 AM UTC 24 |
17959759771 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/35.keymgr_stress_all.261095257 |
|
|
Oct 03 02:01:39 AM UTC 24 |
Oct 03 02:04:06 AM UTC 24 |
41086646891 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/46.keymgr_random.3788057935 |
|
|
Oct 03 02:02:40 AM UTC 24 |
Oct 03 02:04:09 AM UTC 24 |
19896376576 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/22.keymgr_stress_all.2979386368 |
|
|
Oct 03 02:00:24 AM UTC 24 |
Oct 03 02:06:44 AM UTC 24 |
60371451903 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/15.keymgr_stress_all.2813085471 |
|
|
Oct 03 01:59:44 AM UTC 24 |
Oct 03 02:07:01 AM UTC 24 |
64476585507 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/default/16.keymgr_stress_all.2262703217 |
|
|
Oct 03 01:59:49 AM UTC 24 |
Oct 03 02:09:50 AM UTC 24 |
40166982931 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_intr_test.1556596323 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:01 AM UTC 24 |
18773438 ps |
T156 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_hw_reset.1535526617 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:01 AM UTC 24 |
67847285 ps |
T78 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_rw.4196005373 |
|
|
Oct 03 02:03:00 AM UTC 24 |
Oct 03 02:03:02 AM UTC 24 |
190692226 ps |
T79 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_same_csr_outstanding.1748991260 |
|
|
Oct 03 02:03:00 AM UTC 24 |
Oct 03 02:03:03 AM UTC 24 |
76562015 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_errors.3455835028 |
|
|
Oct 03 02:03:17 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
43541751 ps |
T157 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_mem_rw_with_rand_reset.3339086229 |
|
|
Oct 03 02:03:00 AM UTC 24 |
Oct 03 02:03:03 AM UTC 24 |
180616222 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_intr_test.3386687159 |
|
|
Oct 03 02:03:01 AM UTC 24 |
Oct 03 02:03:03 AM UTC 24 |
13275256 ps |
T201 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_errors.3461981137 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:04 AM UTC 24 |
81181751 ps |
T118 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors.3081085952 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:04 AM UTC 24 |
236147713 ps |
T158 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_hw_reset.222664533 |
|
|
Oct 03 02:03:01 AM UTC 24 |
Oct 03 02:03:04 AM UTC 24 |
78589718 ps |
T193 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_errors.50412358 |
|
|
Oct 03 02:03:01 AM UTC 24 |
Oct 03 02:03:05 AM UTC 24 |
329681867 ps |
T80 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_rw.1663705333 |
|
|
Oct 03 02:03:02 AM UTC 24 |
Oct 03 02:03:05 AM UTC 24 |
98327045 ps |
T81 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_aliasing.2111017389 |
|
|
Oct 03 02:03:00 AM UTC 24 |
Oct 03 02:03:06 AM UTC 24 |
383180019 ps |
T119 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors.3747687809 |
|
|
Oct 03 02:03:01 AM UTC 24 |
Oct 03 02:03:06 AM UTC 24 |
285371875 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_errors.3534226044 |
|
|
Oct 03 02:03:04 AM UTC 24 |
Oct 03 02:03:07 AM UTC 24 |
37770005 ps |
T394 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_mem_rw_with_rand_reset.3353438469 |
|
|
Oct 03 02:03:04 AM UTC 24 |
Oct 03 02:03:07 AM UTC 24 |
88619524 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_tl_intg_err.227750796 |
|
|
Oct 03 02:03:01 AM UTC 24 |
Oct 03 02:03:07 AM UTC 24 |
191048876 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_intr_test.1726182113 |
|
|
Oct 03 02:03:05 AM UTC 24 |
Oct 03 02:03:07 AM UTC 24 |
8155143 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_hw_reset.1365871974 |
|
|
Oct 03 02:03:05 AM UTC 24 |
Oct 03 02:03:07 AM UTC 24 |
104098570 ps |
T395 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_csr_bit_bash.1101357904 |
|
|
Oct 03 02:03:00 AM UTC 24 |
Oct 03 02:03:07 AM UTC 24 |
138342065 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_rw.972398591 |
|
|
Oct 03 02:03:05 AM UTC 24 |
Oct 03 02:03:08 AM UTC 24 |
11651765 ps |
T120 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors.3406847773 |
|
|
Oct 03 02:03:04 AM UTC 24 |
Oct 03 02:03:08 AM UTC 24 |
165098835 ps |
T82 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_same_csr_outstanding.1753678917 |
|
|
Oct 03 02:03:03 AM UTC 24 |
Oct 03 02:03:09 AM UTC 24 |
388320239 ps |
T83 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_same_csr_outstanding.2358709609 |
|
|
Oct 03 02:03:06 AM UTC 24 |
Oct 03 02:03:09 AM UTC 24 |
141332055 ps |
T163 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_tl_intg_err.3327637487 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:10 AM UTC 24 |
722349147 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_mem_rw_with_rand_reset.1495299034 |
|
|
Oct 03 02:03:06 AM UTC 24 |
Oct 03 02:03:10 AM UTC 24 |
82215571 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_intr_test.3844728300 |
|
|
Oct 03 02:03:08 AM UTC 24 |
Oct 03 02:03:10 AM UTC 24 |
26630393 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_hw_reset.3145870749 |
|
|
Oct 03 02:03:08 AM UTC 24 |
Oct 03 02:03:10 AM UTC 24 |
81839402 ps |
T84 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_rw.1366484211 |
|
|
Oct 03 02:03:08 AM UTC 24 |
Oct 03 02:03:10 AM UTC 24 |
102746140 ps |
T85 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_shadow_reg_errors_with_csr_rw.3927623480 |
|
|
Oct 03 02:03:01 AM UTC 24 |
Oct 03 02:03:11 AM UTC 24 |
850102213 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_errors.791698075 |
|
|
Oct 03 02:03:08 AM UTC 24 |
Oct 03 02:03:11 AM UTC 24 |
30446281 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_mem_rw_with_rand_reset.271890695 |
|
|
Oct 03 02:03:09 AM UTC 24 |
Oct 03 02:03:12 AM UTC 24 |
89329883 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_tl_intg_err.1478453385 |
|
|
Oct 03 02:03:08 AM UTC 24 |
Oct 03 02:03:12 AM UTC 24 |
101747945 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_intr_test.2151321826 |
|
|
Oct 03 02:03:10 AM UTC 24 |
Oct 03 02:03:13 AM UTC 24 |
24431915 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_hw_reset.738849671 |
|
|
Oct 03 02:03:10 AM UTC 24 |
Oct 03 02:03:13 AM UTC 24 |
27555693 ps |
T86 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_same_csr_outstanding.1498511321 |
|
|
Oct 03 02:03:09 AM UTC 24 |
Oct 03 02:03:13 AM UTC 24 |
201565178 ps |
T117 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors.2079467686 |
|
|
Oct 03 02:03:06 AM UTC 24 |
Oct 03 02:03:13 AM UTC 24 |
146353502 ps |
T87 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_shadow_reg_errors_with_csr_rw.497549619 |
|
|
Oct 03 02:03:06 AM UTC 24 |
Oct 03 02:03:14 AM UTC 24 |
86304640 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_aliasing.2710483759 |
|
|
Oct 03 02:03:02 AM UTC 24 |
Oct 03 02:03:14 AM UTC 24 |
3150268550 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_rw.3962194423 |
|
|
Oct 03 02:03:12 AM UTC 24 |
Oct 03 02:03:14 AM UTC 24 |
15177230 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_tl_intg_err.234068263 |
|
|
Oct 03 02:03:05 AM UTC 24 |
Oct 03 02:03:14 AM UTC 24 |
775945990 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_errors.828251650 |
|
|
Oct 03 02:03:10 AM UTC 24 |
Oct 03 02:03:14 AM UTC 24 |
113747870 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_shadow_reg_errors_with_csr_rw.1871120338 |
|
|
Oct 03 02:03:04 AM UTC 24 |
Oct 03 02:03:15 AM UTC 24 |
162734010 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/1.keymgr_csr_bit_bash.1745543114 |
|
|
Oct 03 02:03:02 AM UTC 24 |
Oct 03 02:03:15 AM UTC 24 |
1036785790 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_mem_rw_with_rand_reset.658280899 |
|
|
Oct 03 02:03:12 AM UTC 24 |
Oct 03 02:03:15 AM UTC 24 |
59850948 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_same_csr_outstanding.1371503632 |
|
|
Oct 03 02:03:12 AM UTC 24 |
Oct 03 02:03:15 AM UTC 24 |
250762554 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_errors.3848935796 |
|
|
Oct 03 02:03:13 AM UTC 24 |
Oct 03 02:03:16 AM UTC 24 |
87327886 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors.2601416519 |
|
|
Oct 03 02:03:09 AM UTC 24 |
Oct 03 02:03:16 AM UTC 24 |
1672391164 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_intr_test.711055803 |
|
|
Oct 03 02:03:14 AM UTC 24 |
Oct 03 02:03:17 AM UTC 24 |
12691218 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/0.keymgr_shadow_reg_errors_with_csr_rw.4010876642 |
|
|
Oct 03 02:02:58 AM UTC 24 |
Oct 03 02:03:17 AM UTC 24 |
478941523 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_rw.1551517944 |
|
|
Oct 03 02:03:14 AM UTC 24 |
Oct 03 02:03:17 AM UTC 24 |
39609413 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_aliasing.2397432724 |
|
|
Oct 03 02:03:06 AM UTC 24 |
Oct 03 02:03:17 AM UTC 24 |
1928956270 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_csr_mem_rw_with_rand_reset.1873422025 |
|
|
Oct 03 02:03:14 AM UTC 24 |
Oct 03 02:03:17 AM UTC 24 |
21249498 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors.3499947161 |
|
|
Oct 03 02:03:13 AM UTC 24 |
Oct 03 02:03:18 AM UTC 24 |
83750022 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_intr_test.3396930831 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:18 AM UTC 24 |
84670373 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_rw.3055129228 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:18 AM UTC 24 |
16263573 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_same_csr_outstanding.1937992644 |
|
|
Oct 03 02:03:14 AM UTC 24 |
Oct 03 02:03:18 AM UTC 24 |
156408214 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_rw.3322690663 |
|
|
Oct 03 02:03:19 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
98616987 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_tl_intg_err.3556114121 |
|
|
Oct 03 02:03:10 AM UTC 24 |
Oct 03 02:03:19 AM UTC 24 |
644526741 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors.3498097191 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:19 AM UTC 24 |
114578206 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_csr_mem_rw_with_rand_reset.1093124512 |
|
|
Oct 03 02:03:17 AM UTC 24 |
Oct 03 02:03:20 AM UTC 24 |
20060498 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors.2440940384 |
|
|
Oct 03 02:03:17 AM UTC 24 |
Oct 03 02:03:20 AM UTC 24 |
260221025 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_same_csr_outstanding.445704702 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:20 AM UTC 24 |
418021178 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_errors.3812431282 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:20 AM UTC 24 |
75686846 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_bit_bash.3521945558 |
|
|
Oct 03 02:03:12 AM UTC 24 |
Oct 03 02:03:20 AM UTC 24 |
134163284 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_intr_test.4154258315 |
|
|
Oct 03 02:03:18 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
12502404 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/2.keymgr_csr_bit_bash.2622779921 |
|
|
Oct 03 02:03:05 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
1039355893 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_tl_intg_err.208364028 |
|
|
Oct 03 02:03:17 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
103653694 ps |
T161 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_tl_intg_err.1629025427 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
1935977932 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_csr_mem_rw_with_rand_reset.4183262149 |
|
|
Oct 03 02:03:19 AM UTC 24 |
Oct 03 02:03:21 AM UTC 24 |
98340026 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_errors.761353123 |
|
|
Oct 03 02:03:19 AM UTC 24 |
Oct 03 02:03:22 AM UTC 24 |
594266084 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_intr_test.3784333387 |
|
|
Oct 03 02:03:20 AM UTC 24 |
Oct 03 02:03:22 AM UTC 24 |
49312560 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_csr_aliasing.3485064756 |
|
|
Oct 03 02:03:12 AM UTC 24 |
Oct 03 02:03:22 AM UTC 24 |
241769848 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_rw.2557048880 |
|
|
Oct 03 02:03:20 AM UTC 24 |
Oct 03 02:03:22 AM UTC 24 |
76802388 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_same_csr_outstanding.3859830885 |
|
|
Oct 03 02:03:19 AM UTC 24 |
Oct 03 02:03:23 AM UTC 24 |
85379293 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/6.keymgr_shadow_reg_errors_with_csr_rw.2199068061 |
|
|
Oct 03 02:03:16 AM UTC 24 |
Oct 03 02:03:23 AM UTC 24 |
175704643 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_intr_test.423680266 |
|
|
Oct 03 02:03:22 AM UTC 24 |
Oct 03 02:03:24 AM UTC 24 |
15253162 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_csr_mem_rw_with_rand_reset.3923799501 |
|
|
Oct 03 02:03:21 AM UTC 24 |
Oct 03 02:03:24 AM UTC 24 |
58133020 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/17.keymgr_shadow_reg_errors.3474541389 |
|
|
Oct 03 02:03:35 AM UTC 24 |
Oct 03 02:03:40 AM UTC 24 |
95965038 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_tl_intg_err.2613380962 |
|
|
Oct 03 02:03:14 AM UTC 24 |
Oct 03 02:03:24 AM UTC 24 |
865204591 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/3.keymgr_csr_aliasing.2796353521 |
|
|
Oct 03 02:03:09 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
4068729183 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_same_csr_outstanding.175054768 |
|
|
Oct 03 02:03:21 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
52455381 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_intr_test.508277586 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
33020810 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors.959248656 |
|
|
Oct 03 02:03:21 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
255471405 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_rw.3207425874 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
23934391 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_errors.2056842864 |
|
|
Oct 03 02:03:21 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
124816400 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_csr_mem_rw_with_rand_reset.78053192 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:25 AM UTC 24 |
15696315 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/7.keymgr_shadow_reg_errors_with_csr_rw.1396563685 |
|
|
Oct 03 02:03:17 AM UTC 24 |
Oct 03 02:03:26 AM UTC 24 |
744394078 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_rw.528203623 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:26 AM UTC 24 |
14739849 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_tl_intg_err.2099343428 |
|
|
Oct 03 02:03:20 AM UTC 24 |
Oct 03 02:03:26 AM UTC 24 |
506851995 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_same_csr_outstanding.4071736828 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:26 AM UTC 24 |
249587937 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors.3631689971 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:27 AM UTC 24 |
341545233 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_errors.2874912482 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:27 AM UTC 24 |
41882640 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_csr_mem_rw_with_rand_reset.1976017105 |
|
|
Oct 03 02:03:24 AM UTC 24 |
Oct 03 02:03:27 AM UTC 24 |
20693824 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_same_csr_outstanding.1718428492 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:27 AM UTC 24 |
537107937 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors.1411562322 |
|
|
Oct 03 02:03:24 AM UTC 24 |
Oct 03 02:03:28 AM UTC 24 |
98948219 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_intr_test.3829301328 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:28 AM UTC 24 |
10283716 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/5.keymgr_shadow_reg_errors_with_csr_rw.2048642697 |
|
|
Oct 03 02:03:13 AM UTC 24 |
Oct 03 02:03:28 AM UTC 24 |
844330268 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_shadow_reg_errors_with_csr_rw.2466324316 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
321148841 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_rw.3920577601 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
88784442 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/16.keymgr_same_csr_outstanding.4285921195 |
|
|
Oct 03 02:03:34 AM UTC 24 |
Oct 03 02:03:39 AM UTC 24 |
112713852 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/17.keymgr_tl_errors.2270770963 |
|
|
Oct 03 02:03:36 AM UTC 24 |
Oct 03 02:03:40 AM UTC 24 |
201165508 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_tl_errors.2679574528 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
33279548 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_csr_mem_rw_with_rand_reset.3718823568 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
50917514 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/10.keymgr_tl_intg_err.440861844 |
|
|
Oct 03 02:03:23 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
97029380 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors.3015827446 |
|
|
Oct 03 02:03:19 AM UTC 24 |
Oct 03 02:03:29 AM UTC 24 |
397934391 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_same_csr_outstanding.4220245220 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
33651869 ps |
T159 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_tl_intg_err.1540678977 |
|
|
Oct 03 02:03:22 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
848182804 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_intr_test.2391955603 |
|
|
Oct 03 02:03:27 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
22595047 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_rw.1690880402 |
|
|
Oct 03 02:03:27 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
41765390 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_csr_mem_rw_with_rand_reset.4195684913 |
|
|
Oct 03 02:03:28 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
75435233 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/4.keymgr_shadow_reg_errors_with_csr_rw.1004128506 |
|
|
Oct 03 02:03:10 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
911797605 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/8.keymgr_shadow_reg_errors_with_csr_rw.1195271660 |
|
|
Oct 03 02:03:19 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
473743270 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/9.keymgr_shadow_reg_errors_with_csr_rw.1492076352 |
|
|
Oct 03 02:03:21 AM UTC 24 |
Oct 03 02:03:30 AM UTC 24 |
1007907208 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_intr_test.1107325810 |
|
|
Oct 03 02:03:29 AM UTC 24 |
Oct 03 02:03:31 AM UTC 24 |
32302833 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_shadow_reg_errors.1415011153 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:31 AM UTC 24 |
116385092 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/11.keymgr_shadow_reg_errors_with_csr_rw.2619076079 |
|
|
Oct 03 02:03:24 AM UTC 24 |
Oct 03 02:03:31 AM UTC 24 |
737878239 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_tl_errors.2064646503 |
|
|
Oct 03 02:03:26 AM UTC 24 |
Oct 03 02:03:32 AM UTC 24 |
148754113 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/12.keymgr_same_csr_outstanding.3528027626 |
|
|
Oct 03 02:03:27 AM UTC 24 |
Oct 03 02:03:32 AM UTC 24 |
109830424 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_shadow_reg_errors.4198305640 |
|
|
Oct 03 02:03:28 AM UTC 24 |
Oct 03 02:03:32 AM UTC 24 |
765582494 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_tl_errors.3186578004 |
|
|
Oct 03 02:03:29 AM UTC 24 |
Oct 03 02:03:33 AM UTC 24 |
282597632 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_csr_rw.87479470 |
|
|
Oct 03 02:03:30 AM UTC 24 |
Oct 03 02:03:33 AM UTC 24 |
17917904 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_intr_test.3946002829 |
|
|
Oct 03 02:03:31 AM UTC 24 |
Oct 03 02:03:33 AM UTC 24 |
44354111 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/13.keymgr_csr_mem_rw_with_rand_reset.1618810695 |
|
|
Oct 03 02:03:30 AM UTC 24 |
Oct 03 02:03:33 AM UTC 24 |
233706045 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_csr_rw.3318170746 |
|
|
Oct 03 02:03:31 AM UTC 24 |
Oct 03 02:03:33 AM UTC 24 |
19010064 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_csr_mem_rw_with_rand_reset.2969141359 |
|
|
Oct 03 02:03:31 AM UTC 24 |
Oct 03 02:03:33 AM UTC 24 |
53895550 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_10_02/keymgr-sim-vcs/coverage/cover_reg_top/14.keymgr_same_csr_outstanding.2705983208 |
|
|
Oct 03 02:03:31 AM UTC 24 |
Oct 03 02:03:34 AM UTC 24 |
60273145 ps |