Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : keymgr_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_11/keymgr-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.keymgr_csr_assert 100.00 100.00



Module Instance : tb.dut.keymgr_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
97.72 96.00 96.72 99.96 95.92 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children


Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : keymgr_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 32 32 100.00 32 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 32 32 100.00 32 100.00




Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 22100034 18617 0 0
attest_sw_binding_0_rd_A 22100034 1928 0 0
attest_sw_binding_1_rd_A 22100034 1995 0 0
attest_sw_binding_2_rd_A 22100034 1950 0 0
attest_sw_binding_3_rd_A 22100034 1895 0 0
attest_sw_binding_4_rd_A 22100034 2029 0 0
attest_sw_binding_5_rd_A 22100034 1945 0 0
attest_sw_binding_6_rd_A 22100034 1930 0 0
attest_sw_binding_7_rd_A 22100034 1906 0 0
intr_enable_rd_A 22100034 2547 0 0
key_version_rd_A 22100034 1866 0 0
max_creator_key_ver_regwen_rd_A 22100034 2024 0 0
max_owner_int_key_ver_regwen_rd_A 22100034 1841 0 0
max_owner_key_ver_regwen_rd_A 22100034 1840 0 0
reseed_interval_regwen_rd_A 22100034 1956 0 0
salt_0_rd_A 22100034 1885 0 0
salt_1_rd_A 22100034 1990 0 0
salt_2_rd_A 22100034 1869 0 0
salt_3_rd_A 22100034 2083 0 0
salt_4_rd_A 22100034 2006 0 0
salt_5_rd_A 22100034 1931 0 0
salt_6_rd_A 22100034 2005 0 0
salt_7_rd_A 22100034 1927 0 0
sealing_sw_binding_0_rd_A 22100034 1968 0 0
sealing_sw_binding_1_rd_A 22100034 1882 0 0
sealing_sw_binding_2_rd_A 22100034 2031 0 0
sealing_sw_binding_3_rd_A 22100034 1806 0 0
sealing_sw_binding_4_rd_A 22100034 2009 0 0
sealing_sw_binding_5_rd_A 22100034 1935 0 0
sealing_sw_binding_6_rd_A 22100034 1922 0 0
sealing_sw_binding_7_rd_A 22100034 1957 0 0
sideload_clear_rd_A 22100034 2009 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 18617 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T65 0 36 0 0
T66 0 39 0 0
T67 23348 28 0 0
T69 37614 0 0 0
T79 0 482 0 0
T80 0 82 0 0
T81 0 360 0 0
T82 0 328 0 0
T84 0 260 0 0
T89 0 337 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T96 0 590 0 0

attest_sw_binding_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1928 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 36 0 0
T69 37614 0 0 0
T80 0 55 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 14 0 0
T192 0 63 0 0
T193 0 24 0 0
T194 0 50 0 0
T195 0 36 0 0
T196 0 50 0 0
T197 0 8 0 0
T198 0 234 0 0

attest_sw_binding_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1995 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 23 0 0
T69 37614 0 0 0
T80 0 51 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 5 0 0
T192 0 57 0 0
T193 0 31 0 0
T194 0 51 0 0
T195 0 24 0 0
T196 0 36 0 0
T197 0 2 0 0
T198 0 257 0 0

attest_sw_binding_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1950 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 45 0 0
T69 37614 0 0 0
T80 0 40 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 5 0 0
T192 0 44 0 0
T193 0 25 0 0
T194 0 65 0 0
T195 0 20 0 0
T196 0 35 0 0
T197 0 17 0 0
T198 0 249 0 0

attest_sw_binding_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1895 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 34 0 0
T69 37614 0 0 0
T80 0 36 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 11 0 0
T132 0 3 0 0
T192 0 49 0 0
T193 0 27 0 0
T194 0 46 0 0
T195 0 16 0 0
T196 0 24 0 0
T198 0 259 0 0

attest_sw_binding_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2029 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 36 0 0
T69 37614 0 0 0
T80 0 61 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 2 0 0
T192 0 80 0 0
T193 0 48 0 0
T194 0 37 0 0
T195 0 27 0 0
T196 0 29 0 0
T197 0 15 0 0
T198 0 290 0 0

attest_sw_binding_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1945 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 36 0 0
T69 37614 0 0 0
T80 0 65 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 12 0 0
T192 0 34 0 0
T193 0 46 0 0
T194 0 71 0 0
T195 0 20 0 0
T196 0 11 0 0
T197 0 16 0 0
T199 0 7 0 0

attest_sw_binding_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1930 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 28 0 0
T69 37614 0 0 0
T80 0 44 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 12 0 0
T192 0 64 0 0
T193 0 57 0 0
T194 0 51 0 0
T195 0 33 0 0
T196 0 34 0 0
T197 0 10 0 0
T198 0 246 0 0

attest_sw_binding_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1906 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 16 0 0
T69 37614 0 0 0
T80 0 43 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 3 0 0
T192 0 90 0 0
T193 0 51 0 0
T194 0 52 0 0
T195 0 37 0 0
T196 0 34 0 0
T197 0 17 0 0
T198 0 222 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2547 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 48 0 0
T69 37614 0 0 0
T80 0 76 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T155 0 13 0 0
T192 0 102 0 0
T193 0 40 0 0
T200 0 23 0 0
T201 0 25 0 0
T202 0 28 0 0
T203 0 87 0 0
T204 0 25 0 0

key_version_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1866 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 14 0 0
T69 37614 0 0 0
T80 0 49 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 8 0 0
T192 0 49 0 0
T193 0 22 0 0
T194 0 61 0 0
T195 0 28 0 0
T196 0 30 0 0
T197 0 2 0 0
T198 0 219 0 0

max_creator_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2024 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 23 0 0
T69 37614 0 0 0
T80 0 68 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 1 0 0
T192 0 70 0 0
T193 0 38 0 0
T194 0 89 0 0
T195 0 38 0 0
T196 0 28 0 0
T197 0 2 0 0
T198 0 228 0 0

max_owner_int_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1841 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 23 0 0
T69 37614 0 0 0
T80 0 42 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 8 0 0
T192 0 47 0 0
T193 0 28 0 0
T194 0 58 0 0
T195 0 51 0 0
T196 0 34 0 0
T197 0 3 0 0
T198 0 239 0 0

max_owner_key_ver_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1840 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 28 0 0
T69 37614 0 0 0
T80 0 54 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 1 0 0
T192 0 64 0 0
T193 0 41 0 0
T194 0 46 0 0
T195 0 37 0 0
T196 0 13 0 0
T197 0 14 0 0
T205 0 4 0 0

reseed_interval_regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1956 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 34 0 0
T69 37614 0 0 0
T80 0 45 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 4 0 0
T192 0 94 0 0
T193 0 31 0 0
T194 0 63 0 0
T195 0 18 0 0
T196 0 5 0 0
T198 0 236 0 0
T206 0 5 0 0

salt_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1885 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 20 0 0
T69 37614 0 0 0
T80 0 37 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 10 0 0
T192 0 50 0 0
T193 0 37 0 0
T194 0 55 0 0
T195 0 17 0 0
T196 0 20 0 0
T197 0 9 0 0
T198 0 237 0 0

salt_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1990 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 18 0 0
T69 37614 0 0 0
T80 0 43 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 5 0 0
T192 0 76 0 0
T193 0 45 0 0
T194 0 46 0 0
T195 0 44 0 0
T196 0 29 0 0
T197 0 9 0 0
T198 0 245 0 0

salt_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1869 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 30 0 0
T69 37614 0 0 0
T80 0 43 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 3 0 0
T192 0 49 0 0
T193 0 49 0 0
T194 0 58 0 0
T195 0 35 0 0
T196 0 20 0 0
T197 0 13 0 0
T198 0 233 0 0

salt_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2083 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 28 0 0
T69 37614 0 0 0
T80 0 60 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 10 0 0
T132 0 25 0 0
T192 0 73 0 0
T193 0 42 0 0
T194 0 68 0 0
T195 0 32 0 0
T196 0 39 0 0
T198 0 249 0 0

salt_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2006 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 33 0 0
T69 37614 0 0 0
T80 0 44 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 11 0 0
T192 0 71 0 0
T193 0 45 0 0
T194 0 62 0 0
T195 0 48 0 0
T196 0 31 0 0
T197 0 13 0 0
T198 0 263 0 0

salt_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1931 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 35 0 0
T69 37614 0 0 0
T80 0 43 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 10 0 0
T132 0 5 0 0
T192 0 82 0 0
T193 0 35 0 0
T194 0 29 0 0
T195 0 15 0 0
T196 0 62 0 0
T198 0 238 0 0

salt_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2005 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 25 0 0
T69 37614 0 0 0
T80 0 42 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 7 0 0
T192 0 68 0 0
T193 0 50 0 0
T194 0 62 0 0
T195 0 22 0 0
T196 0 43 0 0
T197 0 9 0 0
T198 0 250 0 0

salt_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1927 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 19 0 0
T69 37614 0 0 0
T80 0 51 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 6 0 0
T192 0 62 0 0
T193 0 46 0 0
T194 0 62 0 0
T195 0 15 0 0
T196 0 40 0 0
T197 0 9 0 0
T198 0 232 0 0

sealing_sw_binding_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1968 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 21 0 0
T69 37614 0 0 0
T80 0 46 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 3 0 0
T192 0 33 0 0
T193 0 29 0 0
T194 0 45 0 0
T195 0 17 0 0
T196 0 45 0 0
T197 0 8 0 0
T198 0 250 0 0

sealing_sw_binding_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1882 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 16 0 0
T69 37614 0 0 0
T80 0 66 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 7 0 0
T192 0 66 0 0
T193 0 31 0 0
T194 0 41 0 0
T195 0 18 0 0
T196 0 26 0 0
T197 0 15 0 0
T198 0 240 0 0

sealing_sw_binding_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2031 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 32 0 0
T69 37614 0 0 0
T80 0 44 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 5 0 0
T192 0 62 0 0
T193 0 17 0 0
T194 0 51 0 0
T195 0 59 0 0
T196 0 21 0 0
T197 0 1 0 0
T198 0 234 0 0

sealing_sw_binding_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1806 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 25 0 0
T69 37614 0 0 0
T80 0 44 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 8 0 0
T192 0 62 0 0
T193 0 24 0 0
T194 0 48 0 0
T195 0 16 0 0
T196 0 17 0 0
T197 0 11 0 0
T198 0 241 0 0

sealing_sw_binding_4_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2009 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 31 0 0
T69 37614 0 0 0
T80 0 62 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 6 0 0
T192 0 60 0 0
T193 0 22 0 0
T194 0 69 0 0
T195 0 11 0 0
T196 0 19 0 0
T197 0 22 0 0
T207 0 7 0 0

sealing_sw_binding_5_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1935 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 16 0 0
T69 37614 0 0 0
T80 0 48 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 10 0 0
T192 0 75 0 0
T193 0 55 0 0
T194 0 76 0 0
T195 0 31 0 0
T196 0 16 0 0
T197 0 11 0 0
T198 0 203 0 0

sealing_sw_binding_6_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1922 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 29 0 0
T69 37614 0 0 0
T80 0 36 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 11 0 0
T192 0 43 0 0
T193 0 27 0 0
T194 0 70 0 0
T195 0 31 0 0
T196 0 59 0 0
T197 0 9 0 0
T198 0 257 0 0

sealing_sw_binding_7_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 1957 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 21 0 0
T69 37614 0 0 0
T80 0 55 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T132 0 9 0 0
T192 0 56 0 0
T193 0 24 0 0
T194 0 48 0 0
T195 0 32 0 0
T196 0 51 0 0
T197 0 23 0 0
T198 0 254 0 0

sideload_clear_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 22100034 2009 0 0
T13 54389 0 0 0
T14 34819 0 0 0
T34 7343 0 0 0
T67 23348 36 0 0
T69 37614 0 0 0
T80 0 49 0 0
T91 4973 0 0 0
T92 5122 0 0 0
T93 3724 0 0 0
T94 3505 0 0 0
T95 72486 0 0 0
T117 0 16 0 0
T192 0 39 0 0
T193 0 44 0 0
T194 0 81 0 0
T195 0 29 0 0
T196 0 27 0 0
T197 0 5 0 0
T198 0 221 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%