Group : tb.dut.kmac_cov_if::cmd_process_cg
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Group : tb.dut.kmac_cov_if::cmd_process_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
42.86 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_cov_0/kmac_cov_if.sv



Summary for Group tb.dut.kmac_cov_if::cmd_process_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 7 4 3 42.86


Variables for Group tb.dut.kmac_cov_if::cmd_process_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
kmac_keccak_state 2 1 1 50.00 100 1 1 0
kmac_msgfifo_empty 2 1 1 50.00 100 1 1 0
kmac_msgfifo_full 2 1 1 50.00 100 1 1 0
kmac_msgfifo_has_data 1 1 0 0.00 100 1 1 0


Summary for Variable kmac_keccak_state

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 1 1 50.00


User Defined Bins for kmac_keccak_state

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
active 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
inactive 206 1 T1 1 T2 1 T3 1



Summary for Variable kmac_msgfifo_empty

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 1 1 50.00


User Defined Bins for kmac_msgfifo_empty

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
not_empty 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
empty 206 1 T1 1 T2 1 T3 1



Summary for Variable kmac_msgfifo_full

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 1 1 50.00


User Defined Bins for kmac_msgfifo_full

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
full 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
not_full 206 1 T1 1 T2 1 T3 1



Summary for Variable kmac_msgfifo_has_data

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for kmac_msgfifo_has_data

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
has_data 0 1 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%