Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	701	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5681	1			T4	16		T9	6		T10	23
len_601_800	13000	1			T4	35		T9	13		T10	78
len_401_600	8455	1			T4	20		T9	6		T10	30
len_201_400	16720	1			T4	10		T9	3		T10	23
len_65_200	73357	1			T4	7		T9	4		T10	10
len_min_for_xof_require_squeeze	998	1			T38	9		T14	1		T158	9
len_keccak_block_sizes[72]	746	1			T38	9		T14	1		T158	9
len_keccak_block_sizes[104]	743	1			T29	1		T38	9		T158	9
len_keccak_block_sizes[136]	739	1			T38	9		T53	1		T158	9
len_keccak_block_sizes[144]	285	1			T160	5		T161	5		T162	2
len_keccak_block_sizes[168]	291	1			T4	1		T13	1		T163	1
len_datapath_width	14385	1			T4	1		T9	3		T29	1
len_2_63	212235	1			T4	5		T5	310		T9	10
len_1	57	1			T14	1		T15	1		T20	3