Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	261575000	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

188752015

1

T1

132

T2

1914

T3

489

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	232459285	1			T1	273		T2	1518		T3	352
values[0x0]	104553476	1			T1	9		T2	587		T3	141
values[0x1]	113314254	1			T1	5		T2	624		T3	132

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	203094255	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

247232760

1

T1

172

T2

2179

T3

528

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1354617	1			T1	2		T2	7		T3	2
valid_sources[0x01]	1333701	1			T2	13		T3	2		T61	1
valid_sources[0x02]	1503463	1			T2	10		T3	3		T61	1
valid_sources[0x03]	2004222	1			T1	1		T2	8		T3	2
valid_sources[0x04]	1341151	1			T2	10		T63	13		T66	72
valid_sources[0x05]	1589031	1			T2	11		T3	1		T61	1
valid_sources[0x06]	1347694	1			T2	12		T3	1		T64	12
valid_sources[0x07]	1350941	1			T1	2		T2	5		T3	2
valid_sources[0x08]	1980112	1			T1	3		T2	14		T3	5
valid_sources[0x09]	1426659	1			T2	12		T3	2		T59	60
valid_sources[0x0a]	1340375	1			T1	3		T2	15		T3	5
valid_sources[0x0b]	3698673	1			T2	7		T3	2		T66	25
valid_sources[0x0c]	1344019	1			T1	1		T2	6		T3	1
valid_sources[0x0d]	1348793	1			T2	11		T3	1		T73	4
valid_sources[0x0e]	1362477	1			T1	2		T2	12		T3	5
valid_sources[0x0f]	1361520	1			T2	7		T61	2		T63	102
valid_sources[0x10]	1337688	1			T2	11		T3	1		T59	120
valid_sources[0x11]	1344441	1			T1	2		T2	8		T3	3
valid_sources[0x12]	1358514	1			T1	4		T2	3		T3	2
valid_sources[0x13]	1350687	1			T2	10		T3	3		T66	9
valid_sources[0x14]	1356729	1			T2	12		T3	2		T61	1
valid_sources[0x15]	2207262	1			T1	2		T2	7		T3	3
valid_sources[0x16]	1350363	1			T1	7		T2	11		T3	4
valid_sources[0x17]	1373216	1			T1	2		T2	15		T3	2
valid_sources[0x18]	2274402	1			T1	7		T2	9		T3	3
valid_sources[0x19]	1547603	1			T2	13		T3	4		T63	218
valid_sources[0x1a]	2847114	1			T1	1		T2	6		T3	3
valid_sources[0x1b]	1346367	1			T2	5		T3	1		T61	1
valid_sources[0x1c]	1340816	1			T1	1		T2	12		T3	2
valid_sources[0x1d]	1341515	1			T2	8		T3	1		T61	1
valid_sources[0x1e]	3725730	1			T2	7		T3	4		T61	1
valid_sources[0x1f]	1347258	1			T2	12		T3	2		T66	12
valid_sources[0x20]	1341157	1			T2	8		T3	4		T58	1
valid_sources[0x21]	1372704	1			T1	1		T2	7		T3	2
valid_sources[0x22]	1403327	1			T1	3		T2	11		T3	8
valid_sources[0x23]	2118156	1			T1	2		T2	8		T3	2
valid_sources[0x24]	1350407	1			T2	13		T3	3		T61	1
valid_sources[0x25]	1475353	1			T2	4		T3	2		T59	120
valid_sources[0x26]	1975446	1			T1	1		T2	5		T3	4
valid_sources[0x27]	3339975	1			T1	1		T2	5		T3	4
valid_sources[0x28]	1338008	1			T2	18		T3	3		T59	60
valid_sources[0x29]	1337883	1			T1	4		T2	18		T3	1
valid_sources[0x2a]	1410865	1			T1	4		T2	11		T3	3
valid_sources[0x2b]	2007034	1			T1	2		T2	9		T61	1
valid_sources[0x2c]	1344949	1			T1	1		T2	5		T3	1
valid_sources[0x2d]	1488170	1			T1	2		T2	14		T3	2
valid_sources[0x2e]	1348205	1			T1	2		T2	14		T3	2
valid_sources[0x2f]	1339713	1			T1	4		T2	15		T3	3
valid_sources[0x30]	3707997	1			T2	6		T3	2		T59	60
valid_sources[0x31]	1349490	1			T1	1		T2	14		T3	2
valid_sources[0x32]	1338851	1			T2	13		T3	4		T61	1
valid_sources[0x33]	1342578	1			T2	5		T3	3		T61	1
valid_sources[0x34]	1342203	1			T1	1		T2	17		T3	2
valid_sources[0x35]	1347133	1			T2	10		T3	5		T74	3
valid_sources[0x36]	4292081	1			T1	2		T2	14		T3	2
valid_sources[0x37]	1344410	1			T1	3		T2	9		T3	4
valid_sources[0x38]	2259753	1			T1	1		T2	16		T3	1
valid_sources[0x39]	1340782	1			T2	8		T63	68		T73	1
valid_sources[0x3a]	1533627	1			T1	3		T2	2		T3	2
valid_sources[0x3b]	1973189	1			T1	2		T2	5		T3	2
valid_sources[0x3c]	1340409	1			T2	17		T3	4		T66	33
valid_sources[0x3d]	1343802	1			T2	11		T3	1		T58	2
valid_sources[0x3e]	1343047	1			T2	8		T3	3		T61	2
valid_sources[0x3f]	1682411	1			T2	8		T3	3		T74	7
valid_sources[0x40]	1479890	1			T1	1		T2	11		T3	2
valid_sources[0x41]	1344628	1			T1	1		T2	13		T3	2
valid_sources[0x42]	2457849	1			T1	2		T2	10		T3	2
valid_sources[0x43]	1489927	1			T2	13		T3	1		T59	60
valid_sources[0x44]	1339601	1			T1	2		T2	23		T3	4
valid_sources[0x45]	1346791	1			T1	2		T2	7		T3	3
valid_sources[0x46]	1337717	1			T2	8		T3	1		T59	120
valid_sources[0x47]	1343341	1			T2	14		T3	2		T59	60
valid_sources[0x48]	1342441	1			T2	10		T3	4		T59	120
valid_sources[0x49]	1333816	1			T2	17		T3	2		T61	1
valid_sources[0x4a]	4688818	1			T2	6		T3	1		T61	1
valid_sources[0x4b]	1335587	1			T1	1		T2	15		T3	2
valid_sources[0x4c]	1994288	1			T1	2		T2	16		T3	1
valid_sources[0x4d]	1344936	1			T1	2		T2	12		T3	3
valid_sources[0x4e]	1338331	1			T2	8		T3	4		T59	60
valid_sources[0x4f]	2232547	1			T1	1		T2	13		T3	4
valid_sources[0x50]	1346978	1			T1	3		T2	17		T3	3
valid_sources[0x51]	1344313	1			T2	6		T3	2		T58	1
valid_sources[0x52]	1676002	1			T1	2		T2	5		T3	3
valid_sources[0x53]	4136020	1			T2	8		T3	5		T63	28
valid_sources[0x54]	1335874	1			T1	2		T2	13		T3	3
valid_sources[0x55]	2224618	1			T2	3		T3	2		T59	60
valid_sources[0x56]	1425969	1			T1	4		T2	11		T3	6
valid_sources[0x57]	1352316	1			T2	9		T3	5		T63	34
valid_sources[0x58]	1505725	1			T2	11		T3	5		T61	1
valid_sources[0x59]	1332950	1			T2	9		T3	5		T66	14
valid_sources[0x5a]	2190948	1			T2	11		T3	2		T59	30
valid_sources[0x5b]	1347269	1			T2	11		T3	3		T59	60
valid_sources[0x5c]	1345639	1			T2	14		T3	2		T61	3
valid_sources[0x5d]	1844552	1			T1	3		T2	13		T3	2
valid_sources[0x5e]	1657385	1			T2	11		T3	1		T61	3
valid_sources[0x5f]	3324983	1			T1	2		T2	22		T3	2
valid_sources[0x60]	2202599	1			T1	5		T2	8		T3	4
valid_sources[0x61]	2946317	1			T2	5		T3	1		T58	1
valid_sources[0x62]	1343253	1			T2	8		T3	2		T73	2
valid_sources[0x63]	2234953	1			T1	1		T2	22		T3	2
valid_sources[0x64]	1419092	1			T2	9		T3	2		T61	1
valid_sources[0x65]	1344513	1			T2	10		T3	2		T59	60
valid_sources[0x66]	1343928	1			T2	14		T3	2		T73	2
valid_sources[0x67]	1985044	1			T1	1		T2	12		T3	7
valid_sources[0x68]	1342533	1			T1	1		T2	11		T3	2
valid_sources[0x69]	1344742	1			T1	1		T2	15		T3	2
valid_sources[0x6a]	1519528	1			T2	14		T3	3		T59	60
valid_sources[0x6b]	1342062	1			T2	15		T3	1		T65	4
valid_sources[0x6c]	1338769	1			T2	16		T3	2		T59	60
valid_sources[0x6d]	2688696	1			T1	1		T2	9		T3	1
valid_sources[0x6e]	1380122	1			T1	2		T2	20		T59	60
valid_sources[0x6f]	1363246	1			T1	2		T2	10		T3	4
valid_sources[0x70]	1470746	1			T1	4		T2	11		T3	2
valid_sources[0x71]	1340366	1			T1	1		T2	13		T3	2
valid_sources[0x72]	1353660	1			T1	1		T2	8		T61	1
valid_sources[0x73]	2022258	1			T1	2		T2	15		T3	5
valid_sources[0x74]	2252462	1			T1	3		T2	15		T3	3
valid_sources[0x75]	3665151	1			T1	2		T2	19		T3	2
valid_sources[0x76]	1341942	1			T2	13		T3	3		T59	60
valid_sources[0x77]	1337397	1			T1	1		T2	12		T59	60
valid_sources[0x78]	3310269	1			T1	1		T2	9		T3	2
valid_sources[0x79]	2230763	1			T2	18		T3	2		T66	8
valid_sources[0x7a]	2692898	1			T1	1		T2	9		T3	1
valid_sources[0x7b]	1430352	1			T2	14		T3	4		T61	2
valid_sources[0x7c]	3770135	1			T1	1		T2	10		T3	2
valid_sources[0x7d]	1346037	1			T2	10		T59	60		T61	3
valid_sources[0x7e]	1351061	1			T1	1		T2	6		T3	4
valid_sources[0x7f]	1338487	1			T2	13		T3	3		T59	60
valid_sources[0x80]	1338989	1			T1	4		T2	9		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

72828559

1

T1

118

T2

776

T3

226

values[0x0]

all_enables

biggest_size

62205740

1

T1

9

T2

558

T3

136

values[0x1]

all_enables

biggest_size

53717716

1

T1

5

T2

580

T3

127