Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175192 |
1 |
|
|
T4 |
80 |
|
T10 |
274 |
|
T11 |
189 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
88694 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65627 |
1 |
|
|
T4 |
79 |
|
T10 |
269 |
|
T11 |
186 |
seven_bytes |
2980 |
1 |
|
|
T16 |
10 |
|
T17 |
16 |
|
T18 |
44 |
six_bytes |
2954 |
1 |
|
|
T16 |
11 |
|
T17 |
10 |
|
T18 |
41 |
five_bytes |
2915 |
1 |
|
|
T16 |
7 |
|
T17 |
8 |
|
T18 |
32 |
four_bytes |
3020 |
1 |
|
|
T16 |
6 |
|
T17 |
12 |
|
T18 |
46 |
three_bytes |
2958 |
1 |
|
|
T16 |
7 |
|
T17 |
9 |
|
T18 |
40 |
two_bytes |
3049 |
1 |
|
|
T16 |
13 |
|
T17 |
13 |
|
T18 |
37 |
one_byte |
2995 |
1 |
|
|
T16 |
7 |
|
T17 |
10 |
|
T18 |
49 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171829 |
1 |
|
|
T4 |
78 |
|
T10 |
264 |
|
T11 |
183 |
auto[1] |
3363 |
1 |
|
|
T4 |
2 |
|
T10 |
10 |
|
T11 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175192 |
1 |
|
|
T4 |
80 |
|
T10 |
274 |
|
T11 |
189 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175178 |
1 |
|
|
T4 |
80 |
|
T10 |
274 |
|
T11 |
188 |
auto[1] |
14 |
1 |
|
|
T11 |
1 |
|
T52 |
1 |
|
T151 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1167 |
1 |
|
|
T4 |
1 |
|
T10 |
5 |
|
T11 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3363 |
1 |
|
|
T4 |
2 |
|
T10 |
10 |
|
T11 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
183845 |
1 |
|
|
T4 |
258 |
|
T10 |
340 |
|
T41 |
57 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
97592 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63180 |
1 |
|
|
T4 |
255 |
|
T10 |
335 |
|
T41 |
55 |
seven_bytes |
3227 |
1 |
|
|
T16 |
19 |
|
T17 |
20 |
|
T18 |
36 |
six_bytes |
3354 |
1 |
|
|
T16 |
17 |
|
T17 |
36 |
|
T18 |
23 |
five_bytes |
3300 |
1 |
|
|
T16 |
11 |
|
T17 |
27 |
|
T18 |
24 |
four_bytes |
3297 |
1 |
|
|
T16 |
18 |
|
T17 |
35 |
|
T18 |
31 |
three_bytes |
3324 |
1 |
|
|
T16 |
17 |
|
T17 |
39 |
|
T18 |
24 |
two_bytes |
3279 |
1 |
|
|
T16 |
16 |
|
T17 |
25 |
|
T18 |
23 |
one_byte |
3292 |
1 |
|
|
T16 |
22 |
|
T17 |
34 |
|
T18 |
30 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180327 |
1 |
|
|
T4 |
252 |
|
T10 |
330 |
|
T41 |
53 |
auto[1] |
3518 |
1 |
|
|
T4 |
6 |
|
T10 |
10 |
|
T41 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
183845 |
1 |
|
|
T4 |
258 |
|
T10 |
340 |
|
T41 |
57 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
183835 |
1 |
|
|
T4 |
258 |
|
T10 |
340 |
|
T41 |
57 |
auto[1] |
10 |
1 |
|
|
T16 |
1 |
|
T52 |
1 |
|
T152 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1223 |
1 |
|
|
T4 |
3 |
|
T10 |
5 |
|
T41 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3518 |
1 |
|
|
T4 |
6 |
|
T10 |
10 |
|
T41 |
4 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
354752 |
1 |
|
|
T4 |
340 |
|
T10 |
800 |
|
T11 |
111 |
auto[1] |
457 |
1 |
|
|
T50 |
1 |
|
T51 |
30 |
|
T52 |
67 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
188455 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
121961 |
1 |
|
|
T4 |
336 |
|
T10 |
785 |
|
T11 |
109 |
seven_bytes |
6398 |
1 |
|
|
T16 |
42 |
|
T17 |
74 |
|
T18 |
57 |
six_bytes |
6464 |
1 |
|
|
T16 |
31 |
|
T17 |
71 |
|
T18 |
69 |
five_bytes |
6485 |
1 |
|
|
T16 |
39 |
|
T17 |
72 |
|
T18 |
62 |
four_bytes |
6424 |
1 |
|
|
T16 |
41 |
|
T17 |
62 |
|
T18 |
63 |
three_bytes |
6318 |
1 |
|
|
T16 |
44 |
|
T17 |
58 |
|
T18 |
57 |
two_bytes |
6339 |
1 |
|
|
T16 |
50 |
|
T17 |
82 |
|
T18 |
66 |
one_byte |
6365 |
1 |
|
|
T16 |
36 |
|
T17 |
45 |
|
T18 |
64 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
348411 |
1 |
|
|
T4 |
332 |
|
T10 |
770 |
|
T11 |
107 |
auto[1] |
6798 |
1 |
|
|
T4 |
8 |
|
T10 |
30 |
|
T11 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
355209 |
1 |
|
|
T4 |
340 |
|
T10 |
800 |
|
T11 |
111 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
355192 |
1 |
|
|
T4 |
340 |
|
T10 |
800 |
|
T11 |
111 |
auto[1] |
17 |
1 |
|
|
T153 |
1 |
|
T154 |
1 |
|
T155 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2315 |
1 |
|
|
T4 |
4 |
|
T10 |
15 |
|
T11 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6798 |
1 |
|
|
T4 |
8 |
|
T10 |
30 |
|
T11 |
4 |