Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	251157146	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

181237501

1

T1

10537

T2

1901

T3

658

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	223930125	1			T1	7221		T2	1514		T3	321
values[0x0]	100034562	1			T1	3770		T2	591		T3	164
values[0x1]	108429960	1			T1	3694		T2	615		T3	174

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	194952835	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

237441812

1

T1

11313

T2

2181

T3

659

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2836688	1			T1	73		T2	10		T54	2
valid_sources[0x01]	1307259	1			T1	73		T2	12		T3	1
valid_sources[0x02]	2197573	1			T1	67		T2	9		T3	9
valid_sources[0x03]	3691980	1			T1	56		T2	11		T54	8
valid_sources[0x04]	1303541	1			T1	50		T2	14		T3	3
valid_sources[0x05]	1308902	1			T1	38		T2	7		T3	1
valid_sources[0x06]	1402101	1			T1	47		T2	11		T3	6
valid_sources[0x07]	1327577	1			T1	54		T2	8		T3	4
valid_sources[0x08]	1344503	1			T1	30		T2	12		T54	4
valid_sources[0x09]	1301694	1			T1	77		T2	12		T3	2
valid_sources[0x0a]	2298733	1			T1	17		T2	12		T54	5
valid_sources[0x0b]	1306324	1			T1	24		T2	8		T3	3
valid_sources[0x0c]	1308417	1			T1	46		T2	10		T3	1
valid_sources[0x0d]	1304739	1			T1	59		T2	11		T3	5
valid_sources[0x0e]	1960876	1			T1	49		T2	11		T3	1
valid_sources[0x0f]	2154856	1			T1	54		T2	11		T3	7
valid_sources[0x10]	1759636	1			T1	58		T2	4		T3	6
valid_sources[0x11]	4533721	1			T1	53		T2	11		T3	3
valid_sources[0x12]	1310407	1			T1	49		T2	18		T3	1
valid_sources[0x13]	1422489	1			T1	47		T2	18		T54	3
valid_sources[0x14]	1305981	1			T1	65		T2	19		T3	2
valid_sources[0x15]	1309604	1			T1	85		T2	10		T3	1
valid_sources[0x16]	1301435	1			T1	82		T2	4		T3	1
valid_sources[0x17]	1310687	1			T1	98		T2	12		T3	1
valid_sources[0x18]	1303373	1			T1	48		T2	8		T54	2
valid_sources[0x19]	1954337	1			T1	108		T2	6		T3	1
valid_sources[0x1a]	2215150	1			T1	55		T2	14		T3	2
valid_sources[0x1b]	1310578	1			T1	45		T2	7		T3	4
valid_sources[0x1c]	1313823	1			T1	109		T2	7		T54	5
valid_sources[0x1d]	1303906	1			T1	52		T2	11		T3	1
valid_sources[0x1e]	1513696	1			T1	104		T2	7		T54	5
valid_sources[0x1f]	1569198	1			T1	101		T2	4		T54	3
valid_sources[0x20]	1325838	1			T1	71		T2	13		T3	2
valid_sources[0x21]	1308136	1			T1	32		T2	9		T3	2
valid_sources[0x22]	1303020	1			T1	59		T2	9		T54	6
valid_sources[0x23]	2085016	1			T1	72		T2	5		T3	1
valid_sources[0x24]	1308552	1			T1	146		T2	14		T3	7
valid_sources[0x25]	1305193	1			T1	24		T2	9		T3	1
valid_sources[0x26]	1528136	1			T1	99		T2	14		T3	2
valid_sources[0x27]	1302927	1			T1	113		T2	7		T3	3
valid_sources[0x28]	2635268	1			T1	61		T2	10		T3	8
valid_sources[0x29]	1306866	1			T1	45		T2	16		T3	5
valid_sources[0x2a]	1393335	1			T1	38		T2	6		T3	2
valid_sources[0x2b]	1419105	1			T1	49		T2	10		T3	7
valid_sources[0x2c]	3613769	1			T1	54		T2	15		T3	1
valid_sources[0x2d]	1349305	1			T1	59		T2	11		T3	3
valid_sources[0x2e]	1436782	1			T1	31		T2	11		T54	4
valid_sources[0x2f]	1308742	1			T1	29		T2	15		T3	6
valid_sources[0x30]	1426195	1			T1	17		T2	12		T3	5
valid_sources[0x31]	1307850	1			T1	70		T2	11		T54	5
valid_sources[0x32]	1314383	1			T1	49		T2	8		T3	9
valid_sources[0x33]	1300898	1			T1	60		T2	5		T3	4
valid_sources[0x34]	1308153	1			T1	28		T2	3		T3	3
valid_sources[0x35]	1307839	1			T1	79		T2	13		T3	4
valid_sources[0x36]	2052346	1			T1	38		T2	12		T3	2
valid_sources[0x37]	1308133	1			T1	43		T2	11		T3	3
valid_sources[0x38]	1955672	1			T1	54		T2	13		T54	1
valid_sources[0x39]	1363291	1			T1	46		T2	11		T54	4
valid_sources[0x3a]	2166555	1			T1	44		T2	11		T3	2
valid_sources[0x3b]	1311559	1			T1	21		T2	9		T3	3
valid_sources[0x3c]	1302943	1			T1	32		T2	15		T3	1
valid_sources[0x3d]	1309814	1			T1	59		T2	8		T3	2
valid_sources[0x3e]	1326444	1			T1	72		T2	8		T54	4
valid_sources[0x3f]	1300585	1			T1	107		T2	10		T3	8
valid_sources[0x40]	1556544	1			T1	93		T2	7		T3	1
valid_sources[0x41]	1308078	1			T1	41		T2	13		T3	1
valid_sources[0x42]	1305465	1			T1	29		T2	13		T3	2
valid_sources[0x43]	1346252	1			T1	54		T2	11		T54	8
valid_sources[0x44]	1304039	1			T1	83		T2	8		T54	6
valid_sources[0x45]	1320909	1			T1	45		T2	8		T54	7
valid_sources[0x46]	1489245	1			T1	78		T2	11		T3	4
valid_sources[0x47]	1335661	1			T1	29		T2	15		T3	1
valid_sources[0x48]	1960579	1			T1	50		T2	5		T3	1
valid_sources[0x49]	1747891	1			T1	30		T2	12		T3	6
valid_sources[0x4a]	1952777	1			T1	41		T2	12		T3	3
valid_sources[0x4b]	4155676	1			T1	22		T2	3		T3	2
valid_sources[0x4c]	3660644	1			T1	61		T2	7		T54	3
valid_sources[0x4d]	1304196	1			T1	77		T2	11		T3	11
valid_sources[0x4e]	1312149	1			T1	60		T2	10		T3	1
valid_sources[0x4f]	1300375	1			T1	88		T2	13		T54	7
valid_sources[0x50]	1310022	1			T1	40		T2	9		T3	4
valid_sources[0x51]	1388075	1			T1	7		T2	7		T3	2
valid_sources[0x52]	1313104	1			T1	89		T2	14		T3	5
valid_sources[0x53]	1307090	1			T1	61		T2	19		T3	3
valid_sources[0x54]	1304710	1			T1	61		T2	6		T3	1
valid_sources[0x55]	1867371	1			T1	90		T2	16		T3	1
valid_sources[0x56]	1306787	1			T1	52		T2	14		T3	2
valid_sources[0x57]	1310009	1			T1	98		T2	9		T3	1
valid_sources[0x58]	1328303	1			T1	95		T2	17		T3	3
valid_sources[0x59]	5620500	1			T1	52		T2	8		T3	2
valid_sources[0x5a]	1308720	1			T1	73		T2	10		T3	3
valid_sources[0x5b]	1305087	1			T1	4		T2	9		T54	7
valid_sources[0x5c]	1759075	1			T1	77		T2	8		T3	9
valid_sources[0x5d]	1348740	1			T1	70		T2	13		T54	5
valid_sources[0x5e]	1308558	1			T1	77		T2	16		T3	1
valid_sources[0x5f]	1306093	1			T1	34		T2	7		T3	10
valid_sources[0x60]	1785843	1			T1	101		T2	9		T3	2
valid_sources[0x61]	1532869	1			T1	52		T2	15		T3	2
valid_sources[0x62]	1314716	1			T1	112		T2	16		T3	4
valid_sources[0x63]	3246260	1			T1	29		T2	11		T3	3
valid_sources[0x64]	3613624	1			T1	51		T2	12		T3	6
valid_sources[0x65]	2163231	1			T1	86		T2	11		T54	9
valid_sources[0x66]	3745737	1			T1	57		T2	10		T3	2
valid_sources[0x67]	1308719	1			T1	37		T2	9		T54	3
valid_sources[0x68]	1311369	1			T1	49		T2	6		T54	5
valid_sources[0x69]	3643258	1			T1	51		T2	14		T54	8
valid_sources[0x6a]	1303618	1			T1	59		T2	12		T3	5
valid_sources[0x6b]	1435335	1			T1	47		T2	12		T3	3
valid_sources[0x6c]	1319725	1			T1	45		T2	6		T3	3
valid_sources[0x6d]	2208450	1			T1	36		T2	10		T3	1
valid_sources[0x6e]	1314359	1			T1	71		T2	10		T3	2
valid_sources[0x6f]	1312101	1			T1	40		T2	10		T3	1
valid_sources[0x70]	1400447	1			T1	36		T2	12		T3	3
valid_sources[0x71]	2358172	1			T1	61		T2	7		T3	1
valid_sources[0x72]	3317651	1			T1	53		T2	10		T3	2
valid_sources[0x73]	1423844	1			T1	34		T2	8		T3	1
valid_sources[0x74]	1306982	1			T1	27		T2	14		T3	3
valid_sources[0x75]	1370943	1			T1	5		T2	14		T3	3
valid_sources[0x76]	2259278	1			T1	27		T2	6		T3	3
valid_sources[0x77]	1305042	1			T1	56		T2	12		T3	3
valid_sources[0x78]	1310544	1			T1	144		T2	9		T3	1
valid_sources[0x79]	1318072	1			T1	64		T2	7		T3	2
valid_sources[0x7a]	1739736	1			T1	52		T2	15		T3	2
valid_sources[0x7b]	1309605	1			T1	13		T2	8		T54	4
valid_sources[0x7c]	1467997	1			T1	90		T2	12		T3	1
valid_sources[0x7d]	1339513	1			T1	34		T2	11		T3	9
valid_sources[0x7e]	1523470	1			T1	40		T2	11		T3	6
valid_sources[0x7f]	1319196	1			T1	52		T2	13		T3	6
valid_sources[0x80]	1426488	1			T1	6		T2	4		T3	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

70270912

1

T1

3606

T2

773

T3

320

values[0x0]

all_enables

biggest_size

59550609

1

T1

3532

T2

552

T3

164

values[0x1]

all_enables

biggest_size

51415980

1

T1

3399

T2

576

T3

174