Unified Coverage Report :: Group :: kmac_env_pkg::app_cg_wrap::app_cg

Group : kmac_env_pkg::app_cg_wrap::app_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
94.44	90.74	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
AppLc_cg	88.89	1	100	1	64	64
AppRom_cg	88.89	1	100	1	64	64
AppKeymgr_cg	94.44	1	100	1	64	64

---

Group Instance : AppLc_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppLc_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppLc_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppLc_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppRom_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
88.89	1	100	1	64	64

---

Summary for Group Instance AppRom_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	2	14	87.50
Crosses	2	0	2	100.00

Variables for Group Instance AppRom_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	1	1	50.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppRom_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

---

Group Instance : AppKeymgr_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
94.44	1	100	1	64	64

---

Summary for Group Instance AppKeymgr_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	16	1	15	93.75
Crosses	2	0	2	100.00

Variables for Group Instance AppKeymgr_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
app_err	2	0	2	100.00	100	1	1	2
data_strb	8	0	8	100.00	100	1	1	0
done	2	0	2	100.00	100	1	1	2
in_keccak_rounds	2	1	1	50.00	100	1	1	2
single_data_beat	2	0	2	100.00	100	1	1	2

Crosses for Group Instance AppKeymgr_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
partial_data_on_last_beat	1	0	1	100.00	100	1	1	0
done_in_keccak_rounds	1	0	1	100.00	100	1	1	0

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

187333

1

T2

300

T36

1523

T39

2401

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	102249	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	60697	1			T2	296		T36	39		T39	68
seven_bytes	3557	1			T36	46		T39	68		T63	47
six_bytes	3505	1			T36	36		T39	73		T63	40
five_bytes	3408	1			T36	35		T39	62		T63	33
four_bytes	3498	1			T36	41		T39	75		T63	36
three_bytes	3528	1			T36	40		T39	59		T63	39
two_bytes	3436	1			T36	35		T39	66		T63	33
one_byte	3455	1			T36	42		T39	63		T63	32

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

183859

1

T2

292

T36

1499

T39

2375

auto[1]

3474

1

T2

8

T36

24

T39

26

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

187333

1

T2

300

T36

1523

T39

2401

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

187316

1

T2

300

T36

1523

T39

2401

auto[1]

17

1

T63

1

T58

1

T174

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1151

1

T2

4

T36

4

T39

2

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

3474

1

T2

8

T36

24

T39

26

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for app_err

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

188186

1

T2

153

T3

40

T36

1095

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	102404	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	61613	1			T2	150		T3	39		T36	30
seven_bytes	3467	1			T36	31		T39	52		T63	26
six_bytes	3502	1			T36	25		T39	53		T63	18
five_bytes	3433	1			T36	24		T39	64		T63	20
four_bytes	3466	1			T36	39		T39	45		T63	24
three_bytes	3385	1			T36	31		T39	38		T63	22
two_bytes	3451	1			T36	27		T39	40		T63	22
one_byte	3465	1			T36	37		T39	49		T63	25

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

184706

1

T2

147

T3

38

T36

1083

auto[1]

3480

1

T2

6

T3

2

T36

12

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

188186

1

T2

153

T3

40

T36

1095

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

188175

1

T2

153

T3

40

T36

1095

auto[1]

11

1

T175

1

T141

1

T176

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

1182

1

T2

3

T3

1

T36

2

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

3480

1

T2

6

T3

2

T36

12

Summary for Variable app_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for app_err

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

359993

1

T2

456

T36

4178

T39

2916

auto[1]

506

1

T58

93

T60

96

T61

57

---

Summary for Variable data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for data_strb

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	195728	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
full_data_beat	118172	1			T2	451		T36	131		T39	82
seven_bytes	6756	1			T36	132		T39	79		T63	55
six_bytes	6771	1			T36	108		T39	86		T63	65
five_bytes	6712	1			T36	115		T39	68		T63	64
four_bytes	6581	1			T36	118		T39	81		T63	53
three_bytes	6707	1			T36	123		T39	67		T63	64
two_bytes	6578	1			T36	111		T39	82		T63	66
one_byte	6494	1			T36	111		T39	81		T63	69

---

Summary for Variable done

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for done

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

353738

1

T2

446

T36

4130

T39

2868

auto[1]

6761

1

T2

10

T36

48

T39

48

---

Summary for Variable in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	1	1	50.00

Automatically Generated Bins for in_keccak_rounds

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

360499

1

T2

456

T36

4178

T39

2916

---

Summary for Variable single_data_beat

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for single_data_beat

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

360475

1

T2

456

T36

4178

T39

2916

auto[1]

24

1

T70

1

T58

1

T64

1

---

Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

2293

1

T2

5

T36

11

T39

11

---

Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
User Defined Cross Bins	1	0	1	100.00

User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins

NAME	COUNT	STATUS
invalid	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

valid

6761

1

T2

10

T36

48

T39

48