Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176847 |
1 |
|
|
T1 |
2762 |
|
T4 |
373 |
|
T9 |
418 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89765 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65755 |
1 |
|
|
T1 |
68 |
|
T4 |
366 |
|
T9 |
12 |
seven_bytes |
3064 |
1 |
|
|
T1 |
82 |
|
T9 |
12 |
|
T5 |
7 |
six_bytes |
3012 |
1 |
|
|
T1 |
63 |
|
T9 |
11 |
|
T5 |
9 |
five_bytes |
2986 |
1 |
|
|
T1 |
78 |
|
T9 |
5 |
|
T5 |
8 |
four_bytes |
3104 |
1 |
|
|
T1 |
71 |
|
T9 |
8 |
|
T5 |
9 |
three_bytes |
3025 |
1 |
|
|
T1 |
84 |
|
T9 |
10 |
|
T5 |
10 |
two_bytes |
3104 |
1 |
|
|
T1 |
55 |
|
T9 |
14 |
|
T5 |
13 |
one_byte |
3032 |
1 |
|
|
T1 |
83 |
|
T9 |
12 |
|
T5 |
12 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173441 |
1 |
|
|
T1 |
2736 |
|
T4 |
359 |
|
T9 |
414 |
auto[1] |
3406 |
1 |
|
|
T1 |
26 |
|
T4 |
14 |
|
T9 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176847 |
1 |
|
|
T1 |
2762 |
|
T4 |
373 |
|
T9 |
418 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176833 |
1 |
|
|
T1 |
2762 |
|
T4 |
373 |
|
T9 |
418 |
auto[1] |
14 |
1 |
|
|
T43 |
1 |
|
T171 |
1 |
|
T55 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1222 |
1 |
|
|
T1 |
7 |
|
T4 |
7 |
|
T12 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3406 |
1 |
|
|
T1 |
26 |
|
T4 |
14 |
|
T9 |
4 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173985 |
1 |
|
|
T1 |
1688 |
|
T4 |
335 |
|
T9 |
346 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
84341 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
69795 |
1 |
|
|
T1 |
34 |
|
T4 |
331 |
|
T9 |
11 |
seven_bytes |
2856 |
1 |
|
|
T1 |
41 |
|
T9 |
8 |
|
T5 |
16 |
six_bytes |
2858 |
1 |
|
|
T1 |
40 |
|
T9 |
8 |
|
T5 |
17 |
five_bytes |
2881 |
1 |
|
|
T1 |
58 |
|
T9 |
8 |
|
T5 |
18 |
four_bytes |
2845 |
1 |
|
|
T1 |
37 |
|
T9 |
7 |
|
T5 |
18 |
three_bytes |
2810 |
1 |
|
|
T1 |
45 |
|
T9 |
12 |
|
T5 |
16 |
two_bytes |
2809 |
1 |
|
|
T1 |
47 |
|
T9 |
6 |
|
T5 |
17 |
one_byte |
2790 |
1 |
|
|
T1 |
40 |
|
T9 |
7 |
|
T5 |
17 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170519 |
1 |
|
|
T1 |
1672 |
|
T4 |
327 |
|
T9 |
340 |
auto[1] |
3466 |
1 |
|
|
T1 |
16 |
|
T4 |
8 |
|
T9 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173985 |
1 |
|
|
T1 |
1688 |
|
T4 |
335 |
|
T9 |
346 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
173976 |
1 |
|
|
T1 |
1688 |
|
T4 |
335 |
|
T9 |
346 |
auto[1] |
9 |
1 |
|
|
T43 |
1 |
|
T52 |
1 |
|
T53 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1258 |
1 |
|
|
T1 |
1 |
|
T4 |
4 |
|
T12 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3466 |
1 |
|
|
T1 |
16 |
|
T4 |
8 |
|
T9 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
357997 |
1 |
|
|
T1 |
3687 |
|
T4 |
438 |
|
T10 |
121 |
auto[1] |
644 |
1 |
|
|
T37 |
18 |
|
T39 |
99 |
|
T40 |
71 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
182542 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
132547 |
1 |
|
|
T1 |
106 |
|
T4 |
430 |
|
T10 |
119 |
seven_bytes |
6223 |
1 |
|
|
T1 |
109 |
|
T9 |
21 |
|
T5 |
18 |
six_bytes |
6249 |
1 |
|
|
T1 |
114 |
|
T9 |
27 |
|
T5 |
41 |
five_bytes |
6228 |
1 |
|
|
T1 |
100 |
|
T9 |
36 |
|
T5 |
22 |
four_bytes |
6204 |
1 |
|
|
T1 |
122 |
|
T9 |
27 |
|
T5 |
28 |
three_bytes |
6278 |
1 |
|
|
T1 |
93 |
|
T9 |
28 |
|
T5 |
18 |
two_bytes |
6193 |
1 |
|
|
T1 |
101 |
|
T9 |
28 |
|
T5 |
25 |
one_byte |
6177 |
1 |
|
|
T1 |
96 |
|
T9 |
26 |
|
T5 |
28 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351817 |
1 |
|
|
T1 |
3637 |
|
T4 |
422 |
|
T10 |
117 |
auto[1] |
6824 |
1 |
|
|
T1 |
50 |
|
T4 |
16 |
|
T10 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
358641 |
1 |
|
|
T1 |
3687 |
|
T4 |
438 |
|
T10 |
121 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
358620 |
1 |
|
|
T1 |
3687 |
|
T4 |
438 |
|
T10 |
121 |
auto[1] |
21 |
1 |
|
|
T5 |
1 |
|
T172 |
1 |
|
T173 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2391 |
1 |
|
|
T1 |
9 |
|
T4 |
8 |
|
T10 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6824 |
1 |
|
|
T1 |
50 |
|
T4 |
16 |
|
T10 |
4 |