Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
158300 |
1 |
|
|
T1 |
1748 |
|
T8 |
1491 |
|
T9 |
1182 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
81420 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
57756 |
1 |
|
|
T1 |
42 |
|
T8 |
48 |
|
T9 |
30 |
seven_bytes |
2685 |
1 |
|
|
T1 |
47 |
|
T8 |
43 |
|
T9 |
27 |
six_bytes |
2731 |
1 |
|
|
T1 |
38 |
|
T8 |
38 |
|
T9 |
32 |
five_bytes |
2749 |
1 |
|
|
T1 |
45 |
|
T8 |
41 |
|
T9 |
36 |
four_bytes |
2677 |
1 |
|
|
T1 |
62 |
|
T8 |
27 |
|
T9 |
25 |
three_bytes |
2766 |
1 |
|
|
T1 |
43 |
|
T8 |
35 |
|
T9 |
45 |
two_bytes |
2724 |
1 |
|
|
T1 |
51 |
|
T8 |
47 |
|
T9 |
28 |
one_byte |
2792 |
1 |
|
|
T1 |
44 |
|
T8 |
35 |
|
T9 |
31 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
155162 |
1 |
|
|
T1 |
1734 |
|
T8 |
1471 |
|
T9 |
1170 |
auto[1] |
3138 |
1 |
|
|
T1 |
14 |
|
T8 |
20 |
|
T9 |
12 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
158300 |
1 |
|
|
T1 |
1748 |
|
T8 |
1491 |
|
T9 |
1182 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
158290 |
1 |
|
|
T1 |
1748 |
|
T8 |
1491 |
|
T9 |
1182 |
auto[1] |
10 |
1 |
|
|
T139 |
1 |
|
T130 |
1 |
|
T166 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1086 |
1 |
|
|
T1 |
2 |
|
T8 |
3 |
|
T9 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3138 |
1 |
|
|
T1 |
14 |
|
T8 |
20 |
|
T9 |
12 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175362 |
1 |
|
|
T1 |
1776 |
|
T8 |
1585 |
|
T9 |
354 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
91281 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
62544 |
1 |
|
|
T1 |
57 |
|
T8 |
43 |
|
T9 |
8 |
seven_bytes |
3179 |
1 |
|
|
T1 |
47 |
|
T8 |
43 |
|
T9 |
13 |
six_bytes |
2950 |
1 |
|
|
T1 |
33 |
|
T8 |
51 |
|
T9 |
12 |
five_bytes |
3110 |
1 |
|
|
T1 |
51 |
|
T8 |
41 |
|
T9 |
10 |
four_bytes |
3017 |
1 |
|
|
T1 |
48 |
|
T8 |
40 |
|
T9 |
13 |
three_bytes |
3165 |
1 |
|
|
T1 |
56 |
|
T8 |
46 |
|
T9 |
6 |
two_bytes |
3041 |
1 |
|
|
T1 |
42 |
|
T8 |
37 |
|
T9 |
7 |
one_byte |
3075 |
1 |
|
|
T1 |
48 |
|
T8 |
49 |
|
T9 |
10 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171982 |
1 |
|
|
T1 |
1752 |
|
T8 |
1559 |
|
T9 |
348 |
auto[1] |
3380 |
1 |
|
|
T1 |
24 |
|
T8 |
26 |
|
T9 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175362 |
1 |
|
|
T1 |
1776 |
|
T8 |
1585 |
|
T9 |
354 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
175353 |
1 |
|
|
T1 |
1776 |
|
T8 |
1585 |
|
T9 |
354 |
auto[1] |
9 |
1 |
|
|
T167 |
1 |
|
T168 |
1 |
|
T169 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1160 |
1 |
|
|
T1 |
4 |
|
T8 |
5 |
|
T9 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3380 |
1 |
|
|
T1 |
24 |
|
T8 |
26 |
|
T9 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339375 |
1 |
|
|
T1 |
4433 |
|
T8 |
3446 |
|
T9 |
960 |
auto[1] |
365 |
1 |
|
|
T20 |
15 |
|
T22 |
14 |
|
T23 |
7 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
179233 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
118181 |
1 |
|
|
T1 |
122 |
|
T8 |
97 |
|
T9 |
25 |
seven_bytes |
6158 |
1 |
|
|
T1 |
126 |
|
T8 |
84 |
|
T9 |
33 |
six_bytes |
5948 |
1 |
|
|
T1 |
119 |
|
T8 |
92 |
|
T9 |
26 |
five_bytes |
6049 |
1 |
|
|
T1 |
123 |
|
T8 |
77 |
|
T9 |
34 |
four_bytes |
6030 |
1 |
|
|
T1 |
105 |
|
T8 |
92 |
|
T9 |
26 |
three_bytes |
6104 |
1 |
|
|
T1 |
112 |
|
T8 |
89 |
|
T9 |
37 |
two_bytes |
6032 |
1 |
|
|
T1 |
114 |
|
T8 |
71 |
|
T9 |
28 |
one_byte |
6005 |
1 |
|
|
T1 |
115 |
|
T8 |
94 |
|
T9 |
23 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333390 |
1 |
|
|
T1 |
4375 |
|
T8 |
3406 |
|
T9 |
952 |
auto[1] |
6350 |
1 |
|
|
T1 |
58 |
|
T8 |
40 |
|
T9 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339740 |
1 |
|
|
T1 |
4433 |
|
T8 |
3446 |
|
T9 |
960 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339718 |
1 |
|
|
T1 |
4432 |
|
T8 |
3446 |
|
T9 |
960 |
auto[1] |
22 |
1 |
|
|
T1 |
1 |
|
T31 |
1 |
|
T78 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2179 |
1 |
|
|
T1 |
14 |
|
T8 |
8 |
|
T9 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6350 |
1 |
|
|
T1 |
58 |
|
T8 |
40 |
|
T9 |
8 |