Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182434 |
1 |
|
|
T54 |
115 |
|
T55 |
1212 |
|
T20 |
824 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
96348 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63220 |
1 |
|
|
T54 |
113 |
|
T55 |
1197 |
|
T20 |
813 |
seven_bytes |
3279 |
1 |
|
|
T38 |
5 |
|
T48 |
49 |
|
T65 |
19 |
six_bytes |
3306 |
1 |
|
|
T38 |
5 |
|
T48 |
59 |
|
T65 |
22 |
five_bytes |
3371 |
1 |
|
|
T38 |
5 |
|
T48 |
47 |
|
T65 |
29 |
four_bytes |
3265 |
1 |
|
|
T38 |
4 |
|
T48 |
47 |
|
T65 |
27 |
three_bytes |
3320 |
1 |
|
|
T38 |
5 |
|
T48 |
47 |
|
T65 |
26 |
two_bytes |
3162 |
1 |
|
|
T38 |
4 |
|
T48 |
41 |
|
T65 |
17 |
one_byte |
3163 |
1 |
|
|
T38 |
4 |
|
T48 |
52 |
|
T65 |
23 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179032 |
1 |
|
|
T54 |
111 |
|
T55 |
1182 |
|
T20 |
802 |
auto[1] |
3402 |
1 |
|
|
T54 |
4 |
|
T55 |
30 |
|
T20 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182434 |
1 |
|
|
T54 |
115 |
|
T55 |
1212 |
|
T20 |
824 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182422 |
1 |
|
|
T54 |
115 |
|
T55 |
1212 |
|
T20 |
824 |
auto[1] |
12 |
1 |
|
|
T105 |
1 |
|
T74 |
1 |
|
T45 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1156 |
1 |
|
|
T54 |
2 |
|
T55 |
15 |
|
T20 |
11 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3402 |
1 |
|
|
T54 |
4 |
|
T55 |
30 |
|
T20 |
22 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185362 |
1 |
|
|
T8 |
44 |
|
T54 |
83 |
|
T55 |
374 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
99796 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
61949 |
1 |
|
|
T8 |
43 |
|
T54 |
82 |
|
T55 |
367 |
seven_bytes |
3245 |
1 |
|
|
T38 |
12 |
|
T48 |
50 |
|
T65 |
56 |
six_bytes |
3399 |
1 |
|
|
T38 |
8 |
|
T48 |
52 |
|
T65 |
36 |
five_bytes |
3392 |
1 |
|
|
T38 |
6 |
|
T48 |
49 |
|
T65 |
38 |
four_bytes |
3350 |
1 |
|
|
T38 |
7 |
|
T48 |
49 |
|
T65 |
46 |
three_bytes |
3385 |
1 |
|
|
T38 |
3 |
|
T48 |
53 |
|
T65 |
40 |
two_bytes |
3423 |
1 |
|
|
T38 |
3 |
|
T48 |
54 |
|
T65 |
40 |
one_byte |
3423 |
1 |
|
|
T38 |
6 |
|
T48 |
71 |
|
T65 |
45 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
181829 |
1 |
|
|
T8 |
42 |
|
T54 |
81 |
|
T55 |
360 |
auto[1] |
3533 |
1 |
|
|
T8 |
2 |
|
T54 |
2 |
|
T55 |
14 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185362 |
1 |
|
|
T8 |
44 |
|
T54 |
83 |
|
T55 |
374 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185346 |
1 |
|
|
T8 |
44 |
|
T54 |
83 |
|
T55 |
374 |
auto[1] |
16 |
1 |
|
|
T20 |
1 |
|
T73 |
1 |
|
T162 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1173 |
1 |
|
|
T8 |
1 |
|
T54 |
1 |
|
T55 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3533 |
1 |
|
|
T8 |
2 |
|
T54 |
2 |
|
T55 |
14 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
357265 |
1 |
|
|
T2 |
54 |
|
T12 |
3 |
|
T8 |
167 |
auto[1] |
529 |
1 |
|
|
T61 |
37 |
|
T62 |
11 |
|
T63 |
54 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
188599 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
124349 |
1 |
|
|
T2 |
53 |
|
T12 |
3 |
|
T8 |
165 |
seven_bytes |
6262 |
1 |
|
|
T38 |
11 |
|
T48 |
139 |
|
T65 |
39 |
six_bytes |
6547 |
1 |
|
|
T38 |
10 |
|
T48 |
158 |
|
T65 |
33 |
five_bytes |
6466 |
1 |
|
|
T38 |
10 |
|
T48 |
146 |
|
T65 |
25 |
four_bytes |
6422 |
1 |
|
|
T38 |
9 |
|
T48 |
125 |
|
T65 |
37 |
three_bytes |
6421 |
1 |
|
|
T38 |
10 |
|
T48 |
148 |
|
T65 |
31 |
two_bytes |
6390 |
1 |
|
|
T38 |
9 |
|
T48 |
143 |
|
T65 |
44 |
one_byte |
6338 |
1 |
|
|
T38 |
16 |
|
T48 |
139 |
|
T65 |
37 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351026 |
1 |
|
|
T2 |
52 |
|
T12 |
3 |
|
T8 |
163 |
auto[1] |
6768 |
1 |
|
|
T2 |
2 |
|
T8 |
4 |
|
T54 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
357794 |
1 |
|
|
T2 |
54 |
|
T12 |
3 |
|
T8 |
167 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
357770 |
1 |
|
|
T2 |
54 |
|
T12 |
3 |
|
T8 |
167 |
auto[1] |
24 |
1 |
|
|
T20 |
1 |
|
T40 |
1 |
|
T130 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2307 |
1 |
|
|
T2 |
1 |
|
T8 |
2 |
|
T54 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6768 |
1 |
|
|
T2 |
2 |
|
T8 |
4 |
|
T54 |
6 |