Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 258404097 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 185623807 1 T1 109225 T2 63668 T3 23772



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 229125372 1 T1 124151 T2 70028 T3 16631
values[0x0] 103212812 1 T1 31150 T2 17563 T3 5928
values[0x1] 111689720 1 T1 32872 T2 18873 T3 6321



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 200787709 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 243240195 1 T1 127585 T2 73551 T3 25151



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1281535 1 T1 724 T2 510 T3 1
valid_sources[0x01] 1272114 1 T1 729 T2 456 T3 1
valid_sources[0x02] 1271847 1 T1 850 T2 489 T11 49
valid_sources[0x03] 1311589 1 T1 683 T2 325 T3 1
valid_sources[0x04] 1265962 1 T1 836 T2 407 T11 74
valid_sources[0x05] 3265604 1 T1 765 T2 385 T3 2
valid_sources[0x06] 3393241 1 T1 763 T2 416 T3 3
valid_sources[0x07] 3232606 1 T1 829 T2 442 T3 2
valid_sources[0x08] 1371336 1 T1 743 T2 391 T3 3
valid_sources[0x09] 1275333 1 T1 822 T2 377 T3 1
valid_sources[0x0a] 1852338 1 T1 754 T2 319 T3 1
valid_sources[0x0b] 1273771 1 T1 789 T2 391 T11 90
valid_sources[0x0c] 1265241 1 T1 676 T2 437 T11 72
valid_sources[0x0d] 1423070 1 T1 790 T2 407 T3 1
valid_sources[0x0e] 1286434 1 T1 668 T2 381 T11 59
valid_sources[0x0f] 1263316 1 T1 795 T2 434 T11 55
valid_sources[0x10] 3595318 1 T1 704 T2 361 T3 1
valid_sources[0x11] 1430749 1 T1 754 T2 369 T3 2
valid_sources[0x12] 1276993 1 T1 708 T2 415 T3 1
valid_sources[0x13] 4131427 1 T1 703 T2 432 T3 1
valid_sources[0x14] 1273591 1 T1 807 T2 487 T11 82
valid_sources[0x15] 1279178 1 T1 746 T2 379 T3 2
valid_sources[0x16] 3579193 1 T1 791 T2 333 T3 1
valid_sources[0x17] 1740569 1 T1 738 T2 388 T3 3
valid_sources[0x18] 1926910 1 T1 735 T2 475 T11 49
valid_sources[0x19] 1293344 1 T1 797 T2 383 T3 1
valid_sources[0x1a] 3235598 1 T1 805 T2 420 T3 1
valid_sources[0x1b] 1261592 1 T1 749 T2 411 T11 41
valid_sources[0x1c] 1278789 1 T1 682 T2 516 T3 2
valid_sources[0x1d] 3617725 1 T1 812 T2 421 T3 1
valid_sources[0x1e] 1374423 1 T1 788 T2 519 T11 53
valid_sources[0x1f] 1318537 1 T1 676 T2 470 T3 2
valid_sources[0x20] 1279581 1 T1 721 T2 498 T11 39
valid_sources[0x21] 1387419 1 T1 717 T2 423 T3 3
valid_sources[0x22] 2203764 1 T1 640 T2 392 T3 1
valid_sources[0x23] 1717333 1 T1 697 T2 394 T11 47
valid_sources[0x24] 3235573 1 T1 731 T2 547 T3 3
valid_sources[0x25] 1274551 1 T1 641 T2 446 T3 3
valid_sources[0x26] 1960416 1 T1 727 T2 456 T3 1
valid_sources[0x27] 2298099 1 T1 671 T2 351 T11 88
valid_sources[0x28] 3722165 1 T1 709 T2 415 T11 40
valid_sources[0x29] 1336177 1 T1 782 T2 474 T3 2
valid_sources[0x2a] 3623148 1 T1 703 T2 496 T3 1
valid_sources[0x2b] 1274859 1 T1 774 T2 431 T3 1
valid_sources[0x2c] 1274026 1 T1 758 T2 424 T3 2
valid_sources[0x2d] 1290253 1 T1 720 T2 389 T11 49
valid_sources[0x2e] 3235340 1 T1 731 T2 467 T3 1
valid_sources[0x2f] 1279680 1 T1 717 T2 404 T3 3
valid_sources[0x30] 1270756 1 T1 644 T2 351 T3 1
valid_sources[0x31] 1293035 1 T1 643 T2 393 T3 3
valid_sources[0x32] 2199390 1 T1 655 T2 471 T3 5
valid_sources[0x33] 1266872 1 T1 768 T2 430 T3 1
valid_sources[0x34] 1268660 1 T1 696 T2 493 T3 1
valid_sources[0x35] 1271401 1 T1 793 T2 465 T3 2
valid_sources[0x36] 2133907 1 T1 754 T2 397 T11 66
valid_sources[0x37] 1276281 1 T1 671 T2 402 T3 2
valid_sources[0x38] 1337043 1 T1 731 T2 449 T3 1
valid_sources[0x39] 1925719 1 T1 694 T2 409 T11 57
valid_sources[0x3a] 1269407 1 T1 758 T2 397 T11 71
valid_sources[0x3b] 2001681 1 T1 783 T2 502 T3 4
valid_sources[0x3c] 1935255 1 T1 748 T2 549 T3 2
valid_sources[0x3d] 1274748 1 T1 789 T2 406 T3 1
valid_sources[0x3e] 1404121 1 T1 811 T2 398 T11 63
valid_sources[0x3f] 3240581 1 T1 797 T2 385 T3 1
valid_sources[0x40] 1924236 1 T1 722 T2 455 T11 51
valid_sources[0x41] 2135812 1 T1 745 T2 400 T3 2
valid_sources[0x42] 1294014 1 T1 766 T2 340 T3 2
valid_sources[0x43] 3210443 1 T1 737 T2 422 T3 1
valid_sources[0x44] 3399392 1 T1 696 T2 310 T3 1
valid_sources[0x45] 1260762 1 T1 713 T2 407 T3 2
valid_sources[0x46] 2112855 1 T1 754 T2 500 T3 1
valid_sources[0x47] 1259541 1 T1 652 T2 323 T3 1
valid_sources[0x48] 1460883 1 T1 688 T2 425 T3 4
valid_sources[0x49] 1271043 1 T1 800 T2 462 T11 68
valid_sources[0x4a] 2216639 1 T1 665 T2 392 T3 1
valid_sources[0x4b] 1274373 1 T1 676 T2 465 T3 1
valid_sources[0x4c] 1275145 1 T1 637 T2 370 T3 3
valid_sources[0x4d] 1276774 1 T1 752 T2 400 T3 1
valid_sources[0x4e] 1919002 1 T1 724 T2 479 T3 3
valid_sources[0x4f] 3250695 1 T1 735 T2 413 T3 2
valid_sources[0x50] 1275677 1 T1 718 T2 353 T11 90
valid_sources[0x51] 1442019 1 T1 766 T2 300 T3 2
valid_sources[0x52] 1266314 1 T1 801 T2 436 T3 1
valid_sources[0x53] 1274556 1 T1 717 T2 372 T3 1
valid_sources[0x54] 2340833 1 T1 685 T2 505 T3 1
valid_sources[0x55] 1808336 1 T1 760 T2 417 T3 2
valid_sources[0x56] 1267369 1 T1 703 T2 429 T3 2
valid_sources[0x57] 1276886 1 T1 716 T2 466 T3 2
valid_sources[0x58] 1267306 1 T1 703 T2 382 T3 2
valid_sources[0x59] 2124197 1 T1 647 T2 445 T3 2
valid_sources[0x5a] 3242963 1 T1 784 T2 420 T11 94
valid_sources[0x5b] 1266121 1 T1 774 T2 518 T3 1
valid_sources[0x5c] 3244759 1 T1 704 T2 452 T3 1
valid_sources[0x5d] 1283145 1 T1 783 T2 497 T3 3
valid_sources[0x5e] 1269666 1 T1 655 T2 364 T11 61
valid_sources[0x5f] 1275111 1 T1 787 T2 454 T11 58
valid_sources[0x60] 1280887 1 T1 764 T2 331 T3 5
valid_sources[0x61] 1282313 1 T1 761 T2 419 T3 1
valid_sources[0x62] 2155371 1 T1 745 T2 535 T3 2
valid_sources[0x63] 1934187 1 T1 701 T2 394 T3 1
valid_sources[0x64] 1274124 1 T1 715 T2 337 T3 3
valid_sources[0x65] 1308611 1 T1 765 T2 406 T3 3
valid_sources[0x66] 1927166 1 T1 707 T2 346 T3 1
valid_sources[0x67] 1292875 1 T1 795 T2 409 T3 2
valid_sources[0x68] 1276336 1 T1 651 T2 275 T3 3
valid_sources[0x69] 1277630 1 T1 742 T2 492 T11 65
valid_sources[0x6a] 1274420 1 T1 707 T2 413 T11 67
valid_sources[0x6b] 1271184 1 T1 708 T2 371 T3 1
valid_sources[0x6c] 3242969 1 T1 727 T2 416 T11 74
valid_sources[0x6d] 1265676 1 T1 668 T2 389 T11 64
valid_sources[0x6e] 2159490 1 T1 705 T2 338 T3 4
valid_sources[0x6f] 1274874 1 T1 739 T2 472 T3 3
valid_sources[0x70] 1276676 1 T1 723 T2 402 T11 77
valid_sources[0x71] 1304127 1 T1 705 T2 347 T3 28507
valid_sources[0x72] 1275442 1 T1 786 T2 388 T11 77
valid_sources[0x73] 1277357 1 T1 717 T2 416 T3 2
valid_sources[0x74] 1271423 1 T1 693 T2 429 T3 1
valid_sources[0x75] 1267808 1 T1 673 T2 517 T3 1
valid_sources[0x76] 1279764 1 T1 793 T2 391 T3 3
valid_sources[0x77] 1279853 1 T1 746 T2 429 T3 3
valid_sources[0x78] 1275029 1 T1 675 T2 477 T3 2
valid_sources[0x79] 2181119 1 T1 774 T2 326 T3 1
valid_sources[0x7a] 3570050 1 T1 705 T2 367 T11 64
valid_sources[0x7b] 4877855 1 T1 635 T2 381 T3 1
valid_sources[0x7c] 3653895 1 T1 683 T2 392 T3 1
valid_sources[0x7d] 1278087 1 T1 718 T2 432 T3 2
valid_sources[0x7e] 1274568 1 T1 773 T2 393 T3 4
valid_sources[0x7f] 1272890 1 T1 706 T2 406 T3 1
valid_sources[0x80] 2308680 1 T1 793 T2 406 T11 65



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 71669040 1 T1 73268 T2 42976 T3 13771
values[0x0] all_enables biggest_size 61191047 1 T1 19320 T2 11006 T3 4957
values[0x1] all_enables biggest_size 52763720 1 T1 16637 T2 9686 T3 5044

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%